FEB_1083 12.12.23 11:22:14
Info
11:22:11:febtest:INFO: FEB 8-2 selected
11:22:11:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:22:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:14:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
11:22:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:23:00:ST3_ModuleSelector:INFO: L4UL001055 M4UL0T1010551B2 42 A
11:23:00:ST3_ModuleSelector:INFO: 27392
11:23:01:febtest:INFO: Testing FEB with SN 1083
11:23:02:smx_tester:INFO: Scanning setup
11:23:02:elinks:INFO: Disabling clock on downlink 0
11:23:02:elinks:INFO: Disabling clock on downlink 1
11:23:02:elinks:INFO: Disabling clock on downlink 2
11:23:02:elinks:INFO: Disabling clock on downlink 3
11:23:02:elinks:INFO: Disabling clock on downlink 4
11:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:02:elinks:INFO: Disabling clock on downlink 0
11:23:02:elinks:INFO: Disabling clock on downlink 1
11:23:02:elinks:INFO: Disabling clock on downlink 2
11:23:02:elinks:INFO: Disabling clock on downlink 3
11:23:02:elinks:INFO: Disabling clock on downlink 4
11:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:02:elinks:INFO: Disabling clock on downlink 0
11:23:02:elinks:INFO: Disabling clock on downlink 1
11:23:02:elinks:INFO: Disabling clock on downlink 2
11:23:02:elinks:INFO: Disabling clock on downlink 3
11:23:02:elinks:INFO: Disabling clock on downlink 4
11:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:02:elinks:INFO: Disabling clock on downlink 0
11:23:02:elinks:INFO: Disabling clock on downlink 1
11:23:02:elinks:INFO: Disabling clock on downlink 2
11:23:02:elinks:INFO: Disabling clock on downlink 3
11:23:02:elinks:INFO: Disabling clock on downlink 4
11:23:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 16
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 17
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 18
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 19
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 20
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 21
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 22
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 23
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28
11:23:02:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29
11:23:03:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30
11:23:03:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31
11:23:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:03:elinks:INFO: Disabling clock on downlink 0
11:23:03:elinks:INFO: Disabling clock on downlink 1
11:23:03:elinks:INFO: Disabling clock on downlink 2
11:23:03:elinks:INFO: Disabling clock on downlink 3
11:23:03:elinks:INFO: Disabling clock on downlink 4
11:23:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:23:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:03:setup_element:INFO: Scanning clock phase
11:23:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:23:03:setup_element:INFO: Clock phase scan results for group 0, downlink 3
11:23:03:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:23:03:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:23:03:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
11:23:03:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
11:23:03:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:23:03:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:23:03:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:23:03:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:23:03:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:23:03:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:23:03:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 3
11:23:03:setup_element:INFO: Scanning data phases
11:23:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:23:09:setup_element:INFO: Data phase scan results for group 0, downlink 3
11:23:09:setup_element:INFO: Eye window for uplink 16: ________________XXX_____________________
Data delay found: 37
11:23:09:setup_element:INFO: Eye window for uplink 17: ___________XXXXX________________________
Data delay found: 33
11:23:09:setup_element:INFO: Eye window for uplink 18: _____________XXXXX______________________
Data delay found: 35
11:23:09:setup_element:INFO: Eye window for uplink 19: __________XXXXX_________________________
Data delay found: 32
11:23:09:setup_element:INFO: Eye window for uplink 20: __________XXXXX_________________________
Data delay found: 32
11:23:09:setup_element:INFO: Eye window for uplink 21: ________XXXXX___________________________
Data delay found: 30
11:23:09:setup_element:INFO: Eye window for uplink 22: ____XXXXX_______________________________
Data delay found: 26
11:23:09:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
11:23:09:setup_element:INFO: Eye window for uplink 24: XX__________________________________XXXX
Data delay found: 18
11:23:09:setup_element:INFO: Eye window for uplink 25: _XXX____________________________________
Data delay found: 22
11:23:09:setup_element:INFO: Eye window for uplink 26: X__________________________________XXXXX
Data delay found: 17
11:23:09:setup_element:INFO: Eye window for uplink 27: XXXXX__________________________________X
Data delay found: 21
11:23:09:setup_element:INFO: Eye window for uplink 28: _________________________________XXXXX__
Data delay found: 15
11:23:09:setup_element:INFO: Eye window for uplink 29: X__________________________________XXXXX
Data delay found: 17
11:23:09:setup_element:INFO: Eye window for uplink 30: XXX__________________________________XXX
Data delay found: 19
11:23:09:setup_element:INFO: Eye window for uplink 31: XX_________________________________XXXXX
Data delay found: 18
11:23:09:setup_element:INFO: Setting the data phase to 37 for uplink 16
11:23:09:setup_element:INFO: Setting the data phase to 33 for uplink 17
11:23:09:setup_element:INFO: Setting the data phase to 35 for uplink 18
11:23:09:setup_element:INFO: Setting the data phase to 32 for uplink 19
11:23:09:setup_element:INFO: Setting the data phase to 32 for uplink 20
11:23:09:setup_element:INFO: Setting the data phase to 30 for uplink 21
11:23:09:setup_element:INFO: Setting the data phase to 26 for uplink 22
11:23:09:setup_element:INFO: Setting the data phase to 23 for uplink 23
11:23:09:setup_element:INFO: Setting the data phase to 18 for uplink 24
11:23:09:setup_element:INFO: Setting the data phase to 22 for uplink 25
11:23:09:setup_element:INFO: Setting the data phase to 17 for uplink 26
11:23:09:setup_element:INFO: Setting the data phase to 21 for uplink 27
11:23:09:setup_element:INFO: Setting the data phase to 15 for uplink 28
11:23:09:setup_element:INFO: Setting the data phase to 17 for uplink 29
11:23:09:setup_element:INFO: Setting the data phase to 19 for uplink 30
11:23:09:setup_element:INFO: Setting the data phase to 18 for uplink 31
11:23:09:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 3
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXXX__
Uplink 21: _____________________________________________________________________XXXXXXXXX__
Uplink 22: _____________________________________________________________________XXXXXX_____
Uplink 23: _____________________________________________________________________XXXXXX_____
Uplink 24: ___________________________________________________________________XXXXXXXXX____
Uplink 25: ___________________________________________________________________XXXXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ___________________________________________________________________XXXXXXXX_____
Uplink 29: ___________________________________________________________________XXXXXXXX_____
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 37
Window Length: 37
Eye Window: ________________XXX_____________________
Uplink 17:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 18:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 19:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 20:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 21:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 22:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 23:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 24:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 25:
Optimal Phase: 22
Window Length: 37
Eye Window: _XXX____________________________________
Uplink 26:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 27:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 28:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 29:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 30:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 31:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
]
11:23:09:setup_element:INFO: Beginning SMX ASICs map scan
11:23:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:23:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
11:23:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
11:23:09:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:23:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 17
11:23:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 16
11:23:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24
11:23:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25
11:23:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 19
11:23:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 18
11:23:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26
11:23:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27
11:23:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 21
11:23:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 20
11:23:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28
11:23:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29
11:23:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 23
11:23:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 22
11:23:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30
11:23:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31
11:23:11:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXXX__
Uplink 21: _____________________________________________________________________XXXXXXXXX__
Uplink 22: _____________________________________________________________________XXXXXX_____
Uplink 23: _____________________________________________________________________XXXXXX_____
Uplink 24: ___________________________________________________________________XXXXXXXXX____
Uplink 25: ___________________________________________________________________XXXXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ___________________________________________________________________XXXXXXXX_____
Uplink 29: ___________________________________________________________________XXXXXXXX_____
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 37
Window Length: 37
Eye Window: ________________XXX_____________________
Uplink 17:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 18:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 19:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 20:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 21:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 22:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 23:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 24:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 25:
Optimal Phase: 22
Window Length: 37
Eye Window: _XXX____________________________________
Uplink 26:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 27:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 28:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 29:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 30:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 31:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
11:23:11:setup_element:INFO: Performing Elink synchronization
11:23:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:23:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
11:23:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
11:23:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
11:23:12:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:23:12:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 3 | 0 | [17] | [(0, 17), (1, 16)]
1 | [0] | 3 | 0 | [24] | [(0, 24), (1, 25)]
2 | [0] | 3 | 0 | [19] | [(0, 19), (1, 18)]
3 | [0] | 3 | 0 | [26] | [(0, 26), (1, 27)]
4 | [0] | 3 | 0 | [21] | [(0, 21), (1, 20)]
5 | [0] | 3 | 0 | [28] | [(0, 28), (1, 29)]
6 | [0] | 3 | 0 | [23] | [(0, 23), (1, 22)]
7 | [0] | 3 | 0 | [30] | [(0, 30), (1, 31)]
11:23:13:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:23:13:febtest:INFO: 17-0 | XA-000-08-002-000-005-253-03 | 34.6 | 1183.3
11:23:13:febtest:INFO: 24-1 | XA-000-08-002-001-008-031-13 | 25.1 | 1212.7
11:23:13:febtest:INFO: 19-2 | XA-000-08-002-000-005-189-06 | 28.2 | 1206.9
11:23:13:febtest:INFO: 26-3 | XA-000-08-002-001-008-039-04 | 34.6 | 1189.2
11:23:14:febtest:INFO: 21-4 | XA-000-08-002-000-005-205-10 | 31.4 | 1201.0
11:23:14:febtest:INFO: 28-5 | XA-000-08-002-001-008-044-04 | 18.7 | 1242.0
11:23:14:febtest:INFO: 23-6 | XA-000-08-002-000-005-224-04 | 31.4 | 1206.9
11:23:14:febtest:INFO: 30-7 | XA-000-08-002-001-008-036-04 | 31.4 | 1201.0
11:23:15:ST3_smx:INFO: Configuring SMX FAST
11:23:16:ST3_smx:INFO: chip: 17-0 37.726682 C 1171.483840 mV
11:23:16:ST3_smx:INFO: Electrons
11:23:17:ST3_smx:INFO: # loops 0
11:23:18:ST3_smx:INFO: # loops 1
11:23:20:ST3_smx:INFO: # loops 2
11:23:21:ST3_smx:INFO: # loops 3
11:23:23:ST3_smx:INFO: # loops 4
11:23:25:ST3_smx:INFO: Total # of broken channels: 0
11:23:25:ST3_smx:INFO: List of broken channels: []
11:23:25:ST3_smx:INFO: Total # of broken channels: 0
11:23:25:ST3_smx:INFO: List of broken channels: []
11:23:25:ST3_smx:INFO: Configuring SMX FAST
11:23:27:ST3_smx:INFO: chip: 24-1 28.225000 C 1212.728715 mV
11:23:27:ST3_smx:INFO: Electrons
11:23:27:ST3_smx:INFO: # loops 0
11:23:28:ST3_smx:INFO: # loops 1
11:23:30:ST3_smx:INFO: # loops 2
11:23:32:ST3_smx:INFO: # loops 3
11:23:33:ST3_smx:INFO: # loops 4
11:23:35:ST3_smx:INFO: Total # of broken channels: 0
11:23:35:ST3_smx:INFO: List of broken channels: []
11:23:35:ST3_smx:INFO: Total # of broken channels: 0
11:23:35:ST3_smx:INFO: List of broken channels: []
11:23:35:ST3_smx:INFO: Configuring SMX FAST
11:23:37:ST3_smx:INFO: chip: 19-2 21.902970 C 1242.040240 mV
11:23:37:ST3_smx:INFO: Electrons
11:23:37:ST3_smx:INFO: # loops 0
11:23:39:ST3_smx:INFO: # loops 1
11:23:40:ST3_smx:INFO: # loops 2
11:23:42:ST3_smx:INFO: # loops 3
11:23:43:ST3_smx:INFO: # loops 4
11:23:45:ST3_smx:INFO: Total # of broken channels: 0
11:23:45:ST3_smx:INFO: List of broken channels: []
11:23:45:ST3_smx:INFO: Total # of broken channels: 1
11:23:45:ST3_smx:INFO: List of broken channels: [48]
11:23:45:ST3_smx:INFO: Configuring SMX FAST
11:23:47:ST3_smx:INFO: chip: 26-3 37.726682 C 1177.390875 mV
11:23:47:ST3_smx:INFO: Electrons
11:23:47:ST3_smx:INFO: # loops 0
11:23:49:ST3_smx:INFO: # loops 1
11:23:50:ST3_smx:INFO: # loops 2
11:23:52:ST3_smx:INFO: # loops 3
11:23:54:ST3_smx:INFO: # loops 4
11:23:55:ST3_smx:INFO: Total # of broken channels: 0
11:23:55:ST3_smx:INFO: List of broken channels: []
11:23:55:ST3_smx:INFO: Total # of broken channels: 0
11:23:55:ST3_smx:INFO: List of broken channels: []
11:23:56:ST3_smx:INFO: Configuring SMX FAST
11:23:58:ST3_smx:INFO: chip: 21-4 44.073563 C 1165.571835 mV
11:23:58:ST3_smx:INFO: Electrons
11:23:58:ST3_smx:INFO: # loops 0
11:23:59:ST3_smx:INFO: # loops 1
11:24:01:ST3_smx:INFO: # loops 2
11:24:02:ST3_smx:INFO: # loops 3
11:24:04:ST3_smx:INFO: # loops 4
11:24:05:ST3_smx:INFO: Total # of broken channels: 0
11:24:05:ST3_smx:INFO: List of broken channels: []
11:24:05:ST3_smx:INFO: Total # of broken channels: 0
11:24:05:ST3_smx:INFO: List of broken channels: []
11:24:06:ST3_smx:INFO: Configuring SMX FAST
11:24:08:ST3_smx:INFO: chip: 28-5 18.745682 C 1247.887635 mV
11:24:08:ST3_smx:INFO: Electrons
11:24:08:ST3_smx:INFO: # loops 0
11:24:09:ST3_smx:INFO: # loops 1
11:24:11:ST3_smx:INFO: # loops 2
11:24:12:ST3_smx:INFO: # loops 3
11:24:15:ST3_smx:INFO: # loops 4
11:24:17:ST3_smx:INFO: Total # of broken channels: 0
11:24:17:ST3_smx:INFO: List of broken channels: []
11:24:17:ST3_smx:INFO: Total # of broken channels: 0
11:24:17:ST3_smx:INFO: List of broken channels: []
11:24:17:ST3_smx:INFO: Configuring SMX FAST
11:24:19:ST3_smx:INFO: chip: 23-6 40.898880 C 1189.190035 mV
11:24:19:ST3_smx:INFO: Electrons
11:24:19:ST3_smx:INFO: # loops 0
11:24:21:ST3_smx:INFO: # loops 1
11:24:22:ST3_smx:INFO: # loops 2
11:24:24:ST3_smx:INFO: # loops 3
11:24:25:ST3_smx:INFO: # loops 4
11:24:27:ST3_smx:INFO: Total # of broken channels: 0
11:24:27:ST3_smx:INFO: List of broken channels: []
11:24:27:ST3_smx:INFO: Total # of broken channels: 0
11:24:27:ST3_smx:INFO: List of broken channels: []
11:24:27:ST3_smx:INFO: Configuring SMX FAST
11:24:29:ST3_smx:INFO: chip: 30-7 21.902970 C 1242.040240 mV
11:24:29:ST3_smx:INFO: Electrons
11:24:29:ST3_smx:INFO: # loops 0
11:24:31:ST3_smx:INFO: # loops 1
11:24:32:ST3_smx:INFO: # loops 2
11:24:34:ST3_smx:INFO: # loops 3
11:24:36:ST3_smx:INFO: # loops 4
11:24:37:ST3_smx:INFO: Total # of broken channels: 0
11:24:37:ST3_smx:INFO: List of broken channels: []
11:24:37:ST3_smx:INFO: Total # of broken channels: 0
11:24:37:ST3_smx:INFO: List of broken channels: []
11:24:38:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:24:38:febtest:INFO: 17-0 | XA-000-08-002-000-005-253-03 | 40.9 | 1177.4
11:24:38:febtest:INFO: 24-1 | XA-000-08-002-001-008-031-13 | 28.2 | 1212.7
11:24:38:febtest:INFO: 19-2 | XA-000-08-002-000-005-189-06 | 21.9 | 1247.9
11:24:39:febtest:INFO: 26-3 | XA-000-08-002-001-008-039-04 | 37.7 | 1177.4
11:24:39:febtest:INFO: 21-4 | XA-000-08-002-000-005-205-10 | 44.1 | 1165.6
11:24:39:febtest:INFO: 28-5 | XA-000-08-002-001-008-044-04 | 18.7 | 1247.9
11:24:39:febtest:INFO: 23-6 | XA-000-08-002-000-005-224-04 | 40.9 | 1189.2
11:24:40:febtest:INFO: 30-7 | XA-000-08-002-001-008-036-04 | 21.9 | 1242.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_12_12-11_22_14
OPERATOR : Kerstin S.; Olga B.; Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL001055 M4UL0T1010551B2 42 A
FEB_SN : 1083
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 27392
MODULE_NAME: L4UL001055 M4UL0T1010551B2 42 A
MODULE_TYPE:
MODULE_LADDER: L4UL001055
MODULE_MODULE: M4UL0T1010551B2
MODULE_SIZE: 42
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.451', '1.8700', '1.851', '0.4835', '7.000', '1.5490', '7.000', '1.5490']
VI_after__Init : ['2.450', '1.9890', '1.850', '0.5871', '7.000', '1.5500', '7.000', '1.5500']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:27:39:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1083/TestDate_2023_12_12-11_22_14/