FEB_1083    21.11.23 10:46:41

TextEdit.txt
            10:46:02:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:46:02:febtest:INFO:	FEB8.2 selected
10:46:10:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
10:46:29:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:46:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:46:41:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:46:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:46:41:febtest:INFO:	Tsting FEB with SN 1083
10:46:43:smx_tester:INFO:	Scanning setup
10:46:43:elinks:INFO:	Disabling clock on downlink 0
10:46:43:elinks:INFO:	Disabling clock on downlink 1
10:46:43:elinks:INFO:	Disabling clock on downlink 2
10:46:43:elinks:INFO:	Disabling clock on downlink 3
10:46:43:elinks:INFO:	Disabling clock on downlink 4
10:46:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:46:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:46:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:46:43:elinks:INFO:	Disabling clock on downlink 0
10:46:43:elinks:INFO:	Disabling clock on downlink 1
10:46:43:elinks:INFO:	Disabling clock on downlink 2
10:46:43:elinks:INFO:	Disabling clock on downlink 3
10:46:43:elinks:INFO:	Disabling clock on downlink 4
10:46:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:46:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:46:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:46:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:46:43:elinks:INFO:	Disabling clock on downlink 0
10:46:43:elinks:INFO:	Disabling clock on downlink 1
10:46:43:elinks:INFO:	Disabling clock on downlink 2
10:46:43:elinks:INFO:	Disabling clock on downlink 3
10:46:43:elinks:INFO:	Disabling clock on downlink 4
10:46:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:46:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:46:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:46:43:elinks:INFO:	Disabling clock on downlink 0
10:46:43:elinks:INFO:	Disabling clock on downlink 1
10:46:43:elinks:INFO:	Disabling clock on downlink 2
10:46:43:elinks:INFO:	Disabling clock on downlink 3
10:46:43:elinks:INFO:	Disabling clock on downlink 4
10:46:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:46:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:46:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:46:43:elinks:INFO:	Disabling clock on downlink 0
10:46:43:elinks:INFO:	Disabling clock on downlink 1
10:46:43:elinks:INFO:	Disabling clock on downlink 2
10:46:43:elinks:INFO:	Disabling clock on downlink 3
10:46:43:elinks:INFO:	Disabling clock on downlink 4
10:46:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:46:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:46:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:46:43:setup_element:INFO:	Scanning clock phase
10:46:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:46:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:46:44:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:46:44:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
10:46:44:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
10:46:44:setup_element:INFO:	Eye window for uplink 10: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:46:44:setup_element:INFO:	Eye window for uplink 11: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:46:44:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:46:44:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:46:44:setup_element:INFO:	Eye window for uplink 14: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:46:44:setup_element:INFO:	Eye window for uplink 15: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:46:44:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 1
10:46:44:setup_element:INFO:	Scanning data phases
10:46:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:46:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:46:49:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:46:49:setup_element:INFO:	Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
10:46:49:setup_element:INFO:	Eye window for uplink 9 : ___________________________________XXXXX
Data delay found: 17
10:46:49:setup_element:INFO:	Eye window for uplink 10: ________________________________XXXXX___
Data delay found: 14
10:46:49:setup_element:INFO:	Eye window for uplink 11: X__________________________________XXXXX
Data delay found: 17
10:46:49:setup_element:INFO:	Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
10:46:49:setup_element:INFO:	Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
10:46:49:setup_element:INFO:	Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
10:46:49:setup_element:INFO:	Eye window for uplink 15: X__________________________________XXXXX
Data delay found: 17
10:46:49:setup_element:INFO:	Setting the data phase to 12 for uplink 8
10:46:49:setup_element:INFO:	Setting the data phase to 17 for uplink 9
10:46:49:setup_element:INFO:	Setting the data phase to 14 for uplink 10
10:46:49:setup_element:INFO:	Setting the data phase to 17 for uplink 11
10:46:49:setup_element:INFO:	Setting the data phase to 11 for uplink 12
10:46:49:setup_element:INFO:	Setting the data phase to 14 for uplink 13
10:46:49:setup_element:INFO:	Setting the data phase to 14 for uplink 14
10:46:49:setup_element:INFO:	Setting the data phase to 17 for uplink 15
10:46:49:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 70
    Eye Windows:
      Uplink  8: ________________________________________________________________________________
      Uplink  9: ________________________________________________________________________________
      Uplink 10: X_______________________________________________________________________XXXXXXXX
      Uplink 11: X_______________________________________________________________________XXXXXXXX
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: X_______________________________________________________________________XXXXXXXX
      Uplink 15: X_______________________________________________________________________XXXXXXXX
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 9:
      Optimal Phase: 17
      Window Length: 35
      Eye Window: ___________________________________XXXXX
    Uplink 10:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 11:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 12:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 13:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 14:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 15:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
]
10:46:49:setup_element:INFO:	Beginning SMX ASICs map scan
10:46:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:46:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:46:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:46:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:46:49:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:46:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:46:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:46:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:46:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:46:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:46:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:46:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:46:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:46:52:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 70
    Eye Windows:
      Uplink  8: ________________________________________________________________________________
      Uplink  9: ________________________________________________________________________________
      Uplink 10: X_______________________________________________________________________XXXXXXXX
      Uplink 11: X_______________________________________________________________________XXXXXXXX
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: X_______________________________________________________________________XXXXXXXX
      Uplink 15: X_______________________________________________________________________XXXXXXXX
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 9:
      Optimal Phase: 17
      Window Length: 35
      Eye Window: ___________________________________XXXXX
    Uplink 10:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 11:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 12:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 13:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 14:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 15:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX

10:46:52:setup_element:INFO:	Performing Elink synchronization
10:46:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:46:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:46:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:46:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:46:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:46:52:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
10:46:52:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  1  |  0  |    [8]    |   [(0, 8), (1, 9)] 
   3  |   [0]   |  1  |  0  |   [10]    |  [(0, 10), (1, 11)]
   5  |   [0]   |  1  |  0  |   [12]    |  [(0, 12), (1, 13)]
   7  |   [0]   |  1  |  0  |   [14]    |  [(0, 14), (1, 15)]
10:46:53:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:46:53:febtest:INFO:	0-1 | XA-000-08-002-001-008-031-13 |  21.9 | 1230.3
10:46:53:febtest:INFO:	0-3 | XA-000-08-002-001-008-039-04 |  37.7 | 1171.5
10:46:53:febtest:INFO:	0-5 | XA-000-08-002-001-008-044-04 |  25.1 | 1224.5
10:46:54:febtest:INFO:	0-7 | XA-000-08-002-001-008-036-04 |  31.4 | 1201.0
10:46:54:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:46:58:ST3_smx:INFO:	chip: 0-1 	 28.225000 C 	 1206.851500 mV
10:46:58:ST3_smx:INFO:		Electrons
10:46:58:ST3_smx:INFO:	# loops 0
10:46:59:ST3_smx:INFO:	# loops 1
10:47:01:ST3_smx:INFO:	# loops 2
10:47:02:ST3_smx:INFO:	# loops 3
10:47:04:ST3_smx:INFO:	# loops 4
10:47:06:ST3_smx:INFO:	Total # of broken channels: 0
10:47:06:ST3_smx:INFO:	List of broken channels: []
10:47:06:ST3_smx:INFO:	Total # of broken channels: 1
10:47:06:ST3_smx:INFO:	List of broken channels: [31]
10:47:06:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:47:10:ST3_smx:INFO:	chip: 0-3 	 37.726682 C 	 1171.483840 mV
10:47:10:ST3_smx:INFO:		Electrons
10:47:10:ST3_smx:INFO:	# loops 0
10:47:12:ST3_smx:INFO:	# loops 1
10:47:13:ST3_smx:INFO:	# loops 2
10:47:15:ST3_smx:INFO:	# loops 3
10:47:16:ST3_smx:INFO:	# loops 4
10:47:18:ST3_smx:INFO:	Total # of broken channels: 0
10:47:18:ST3_smx:INFO:	List of broken channels: []
10:47:18:ST3_smx:INFO:	Total # of broken channels: 0
10:47:18:ST3_smx:INFO:	List of broken channels: []
10:47:18:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:47:22:ST3_smx:INFO:	chip: 0-5 	 21.902970 C 	 1230.330540 mV
10:47:22:ST3_smx:INFO:		Electrons
10:47:22:ST3_smx:INFO:	# loops 0
10:47:24:ST3_smx:INFO:	# loops 1
10:47:25:ST3_smx:INFO:	# loops 2
10:47:27:ST3_smx:INFO:	# loops 3
10:47:28:ST3_smx:INFO:	# loops 4
10:47:30:ST3_smx:INFO:	Total # of broken channels: 0
10:47:30:ST3_smx:INFO:	List of broken channels: []
10:47:30:ST3_smx:INFO:	Total # of broken channels: 0
10:47:30:ST3_smx:INFO:	List of broken channels: []
10:47:30:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:47:34:ST3_smx:INFO:	chip: 0-7 	 18.745682 C 	 1242.040240 mV
10:47:34:ST3_smx:INFO:		Electrons
10:47:34:ST3_smx:INFO:	# loops 0
10:47:36:ST3_smx:INFO:	# loops 1
10:47:38:ST3_smx:INFO:	# loops 2
10:47:39:ST3_smx:INFO:	# loops 3
10:47:41:ST3_smx:INFO:	# loops 4
10:47:43:ST3_smx:INFO:	Total # of broken channels: 0
10:47:43:ST3_smx:INFO:	List of broken channels: []
10:47:43:ST3_smx:INFO:	Total # of broken channels: 2
10:47:43:ST3_smx:INFO:	List of broken channels: [13, 49]
10:47:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:47:44:febtest:INFO:	0-1 | XA-000-08-002-001-008-031-13 |  28.2 | 1206.9
10:47:44:febtest:INFO:	0-3 | XA-000-08-002-001-008-039-04 |  37.7 | 1171.5
10:47:44:febtest:INFO:	0-5 | XA-000-08-002-001-008-044-04 |  25.1 | 1230.3
10:47:44:febtest:INFO:	0-7 | XA-000-08-002-001-008-036-04 |  18.7 | 1242.0
############################################################
#                   S U M M A R Y                          #
############################################################
Traceback (most recent call last):
  File "febtest.py", line 329, in DoFEB_MicrocableTest
    self.ReportList = self.reporter.PrintFEB_MicrocableReport()
  File "/home/cbm/ST3_v2.29/lib/ST3_reporter.py", line 292, in PrintFEB_MicrocableReport
    mylist += CrtFEB_MicrocableReport()
  File "/home/cbm/ST3_v2.29/lib/ST3_reporter.py", line 213, in CrtFEB_MicrocableReport
    print_list.append( "SET_ID:\t"  + str(out_dict["SET_ID"]) )
KeyError: 'SET_ID'
10:47:48:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1083/TestDate_2023_11_21-10_46_41/