
FEB_1086 01.12.23 09:57:30
TextEdit.txt
09:54:56:ST3_Shared:INFO: Listo of operators:Alois Alzheimer 09:54:56:ST3_Shared:INFO: Listo of operators:Robert V.; 09:55:02:febtest:INFO: FEB 8-2 selected 09:55:02:smx_tester:INFO: Setting Elink clock mode to 160 MHz 09:55:10:febtest:INFO: FEB 8-2 selected 09:55:10:smx_tester:INFO: Setting Elink clock mode to 160 MHz 09:55:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:55:25:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 09:55:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:55:49:ST3_ModuleSelector:INFO: P 0804 L55 M01 09:55:49:ST3_ModuleSelector:INFO: 15403 09:55:49:febtest:INFO: Testing FEB with SN 1086 09:55:51:smx_tester:INFO: Scanning setup 09:55:51:elinks:INFO: Disabling clock on downlink 0 09:55:51:elinks:INFO: Disabling clock on downlink 1 09:55:51:elinks:INFO: Disabling clock on downlink 2 09:55:51:elinks:INFO: Disabling clock on downlink 3 09:55:51:elinks:INFO: Disabling clock on downlink 4 09:55:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:55:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:55:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:55:51:elinks:INFO: Disabling clock on downlink 0 09:55:51:elinks:INFO: Disabling clock on downlink 1 09:55:51:elinks:INFO: Disabling clock on downlink 2 09:55:51:elinks:INFO: Disabling clock on downlink 3 09:55:51:elinks:INFO: Disabling clock on downlink 4 09:55:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:55:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:55:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:55:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:55:51:elinks:INFO: Disabling clock on downlink 0 09:55:51:elinks:INFO: Disabling clock on downlink 1 09:55:51:elinks:INFO: Disabling clock on downlink 2 09:55:51:elinks:INFO: Disabling clock on downlink 3 09:55:51:elinks:INFO: Disabling clock on downlink 4 09:55:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:55:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:55:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:55:51:elinks:INFO: Disabling clock on downlink 0 09:55:51:elinks:INFO: Disabling clock on downlink 1 09:55:51:elinks:INFO: Disabling clock on downlink 2 09:55:51:elinks:INFO: Disabling clock on downlink 3 09:55:51:elinks:INFO: Disabling clock on downlink 4 09:55:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:55:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:55:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:55:51:elinks:INFO: Disabling clock on downlink 0 09:55:51:elinks:INFO: Disabling clock on downlink 1 09:55:51:elinks:INFO: Disabling clock on downlink 2 09:55:51:elinks:INFO: Disabling clock on downlink 3 09:55:51:elinks:INFO: Disabling clock on downlink 4 09:55:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:55:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:55:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:55:52:setup_element:INFO: Scanning clock phase 09:55:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:55:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:55:52:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:55:52:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX Clock Delay: 36 09:55:52:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX Clock Delay: 36 09:55:52:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX Clock Delay: 36 09:55:52:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX Clock Delay: 36 09:55:52:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:55:52:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:55:52:setup_element:INFO: Eye window for uplink 6 : X__________________________________________________________________________XXXXX Clock Delay: 37 09:55:52:setup_element:INFO: Eye window for uplink 7 : X__________________________________________________________________________XXXXX Clock Delay: 37 09:55:52:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:55:52:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:55:52:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:55:52:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:55:52:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:55:52:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:55:52:setup_element:INFO: Eye window for uplink 14: XX______________________________________________________________________________ Clock Delay: 40 09:55:52:setup_element:INFO: Eye window for uplink 15: XX______________________________________________________________________________ Clock Delay: 40 09:55:52:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1 09:55:52:setup_element:INFO: Scanning data phases 09:55:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:55:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:55:57:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:55:57:setup_element:INFO: Eye window for uplink 0 : _________XXXXX__________________________ Data delay found: 31 09:55:57:setup_element:INFO: Eye window for uplink 1 : _____XXXXX______________________________ Data delay found: 27 09:55:57:setup_element:INFO: Eye window for uplink 2 : _____XXXXXX_____________________________ Data delay found: 27 09:55:57:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________ Data delay found: 25 09:55:57:setup_element:INFO: Eye window for uplink 4 : _XXXXXX_________________________________ Data delay found: 23 09:55:57:setup_element:INFO: Eye window for uplink 5 : XXX__________________________________XXX Data delay found: 19 09:55:57:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________ Data delay found: 22 09:55:57:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX Data delay found: 17 09:55:57:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________ Data delay found: 8 09:55:57:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____ Data delay found: 13 09:55:57:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 09:55:57:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 09:55:57:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________ Data delay found: 9 09:55:57:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____ Data delay found: 12 09:55:57:setup_element:INFO: Eye window for uplink 14: ______________________________XXXX______ Data delay found: 11 09:55:57:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___ Data delay found: 14 09:55:57:setup_element:INFO: Setting the data phase to 31 for uplink 0 09:55:57:setup_element:INFO: Setting the data phase to 27 for uplink 1 09:55:57:setup_element:INFO: Setting the data phase to 27 for uplink 2 09:55:57:setup_element:INFO: Setting the data phase to 25 for uplink 3 09:55:57:setup_element:INFO: Setting the data phase to 23 for uplink 4 09:55:57:setup_element:INFO: Setting the data phase to 19 for uplink 5 09:55:57:setup_element:INFO: Setting the data phase to 22 for uplink 6 09:55:57:setup_element:INFO: Setting the data phase to 17 for uplink 7 09:55:57:setup_element:INFO: Setting the data phase to 8 for uplink 8 09:55:57:setup_element:INFO: Setting the data phase to 13 for uplink 9 09:55:57:setup_element:INFO: Setting the data phase to 8 for uplink 10 09:55:57:setup_element:INFO: Setting the data phase to 12 for uplink 11 09:55:58:setup_element:INFO: Setting the data phase to 9 for uplink 12 09:55:58:setup_element:INFO: Setting the data phase to 12 for uplink 13 09:55:58:setup_element:INFO: Setting the data phase to 11 for uplink 14 09:55:58:setup_element:INFO: Setting the data phase to 14 for uplink 15 09:55:58:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 36 Window Length: 69 Eye Windows: Uplink 0: __________________________________________________________________________XXXXXX Uplink 1: __________________________________________________________________________XXXXXX Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: _________________________________________________________________________XXXXXX_ Uplink 5: _________________________________________________________________________XXXXXX_ Uplink 6: X__________________________________________________________________________XXXXX Uplink 7: X__________________________________________________________________________XXXXX Uplink 8: ________________________________________________________________________XXXXXXXX Uplink 9: ________________________________________________________________________XXXXXXXX Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: ________________________________________________________________________XXXXXXXX Uplink 13: ________________________________________________________________________XXXXXXXX Uplink 14: XX______________________________________________________________________________ Uplink 15: XX______________________________________________________________________________ Data phase characteristics: Uplink 0: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 1: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 2: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 4: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 5: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 13: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 14: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ ] 09:55:58:setup_element:INFO: Beginning SMX ASICs map scan 09:55:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:55:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:55:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:55:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:55:58:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:55:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:55:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:55:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:55:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:55:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:55:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:55:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:55:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:55:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:55:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:55:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:55:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:55:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:55:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:55:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:55:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:56:00:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 36 Window Length: 69 Eye Windows: Uplink 0: __________________________________________________________________________XXXXXX Uplink 1: __________________________________________________________________________XXXXXX Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: _________________________________________________________________________XXXXXX_ Uplink 5: _________________________________________________________________________XXXXXX_ Uplink 6: X__________________________________________________________________________XXXXX Uplink 7: X__________________________________________________________________________XXXXX Uplink 8: ________________________________________________________________________XXXXXXXX Uplink 9: ________________________________________________________________________XXXXXXXX Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: ________________________________________________________________________XXXXXXXX Uplink 13: ________________________________________________________________________XXXXXXXX Uplink 14: XX______________________________________________________________________________ Uplink 15: XX______________________________________________________________________________ Data phase characteristics: Uplink 0: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 1: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 2: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 4: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 5: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 13: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 14: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ 09:56:00:setup_element:INFO: Performing Elink synchronization 09:56:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:56:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:56:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:56:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:56:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:56:00:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:56:01:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 09:56:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:56:02:febtest:INFO: 1-0 | XA-000-08-002-000-007-011-06 | 28.2 | 1171.5 09:56:02:febtest:INFO: 8-1 | XA-000-08-002-000-008-165-06 | 18.7 | 1206.9 09:56:02:febtest:INFO: 3-2 | XA-000-08-002-000-007-088-04 | 6.1 | 1259.6 09:56:02:febtest:INFO: 10-3 | XA-000-08-002-001-007-234-15 | 21.9 | 1201.0 09:56:02:febtest:INFO: 5-4 | XA-000-08-002-000-007-010-06 | 18.7 | 1206.9 09:56:03:febtest:INFO: 12-5 | XA-000-08-002-001-007-238-15 | 25.1 | 1195.1 09:56:03:febtest:INFO: 7-6 | XA-000-08-002-000-008-168-06 | 15.6 | 1224.5 09:56:03:febtest:INFO: 14-7 | XA-000-08-002-001-007-251-08 | 9.3 | 1236.2 09:56:03:ST3_smx:INFO: Configuring SMX FAST 09:56:05:ST3_smx:INFO: chip: 1-0 31.389742 C 1165.571835 mV 09:56:05:ST3_smx:INFO: Electrons 09:56:05:ST3_smx:INFO: # loops 0 09:56:07:ST3_smx:INFO: # loops 1 09:56:09:ST3_smx:INFO: # loops 2 09:56:10:ST3_smx:INFO: # loops 3 09:56:12:ST3_smx:INFO: # loops 4 09:56:13:ST3_smx:INFO: Total # of broken channels: 0 09:56:13:ST3_smx:INFO: List of broken channels: [] 09:56:13:ST3_smx:INFO: Total # of broken channels: 0 09:56:13:ST3_smx:INFO: List of broken channels: [] 09:56:14:ST3_smx:INFO: Configuring SMX FAST 09:56:16:ST3_smx:INFO: chip: 8-1 31.389742 C 1171.483840 mV 09:56:16:ST3_smx:INFO: Electrons 09:56:16:ST3_smx:INFO: # loops 0 09:56:17:ST3_smx:INFO: # loops 1 09:56:19:ST3_smx:INFO: # loops 2 09:56:21:ST3_smx:INFO: # loops 3 09:56:22:ST3_smx:INFO: # loops 4 09:56:24:ST3_smx:INFO: Total # of broken channels: 0 09:56:24:ST3_smx:INFO: List of broken channels: [] 09:56:24:ST3_smx:INFO: Total # of broken channels: 0 09:56:24:ST3_smx:INFO: List of broken channels: [] 09:56:24:ST3_smx:INFO: Configuring SMX FAST 09:56:26:ST3_smx:INFO: chip: 3-2 15.590880 C 1224.468235 mV 09:56:26:ST3_smx:INFO: Electrons 09:56:26:ST3_smx:INFO: # loops 0 09:56:28:ST3_smx:INFO: # loops 1 09:56:29:ST3_smx:INFO: # loops 2 09:56:31:ST3_smx:INFO: # loops 3 09:56:33:ST3_smx:INFO: # loops 4 09:56:34:ST3_smx:INFO: Total # of broken channels: 0 09:56:34:ST3_smx:INFO: List of broken channels: [] 09:56:34:ST3_smx:INFO: Total # of broken channels: 0 09:56:34:ST3_smx:INFO: List of broken channels: [] 09:56:35:ST3_smx:INFO: Configuring SMX FAST 09:56:37:ST3_smx:INFO: chip: 10-3 25.062742 C 1200.969315 mV 09:56:37:ST3_smx:INFO: Electrons 09:56:37:ST3_smx:INFO: # loops 0 09:56:38:ST3_smx:INFO: # loops 1 09:56:40:ST3_smx:INFO: # loops 2 09:56:41:ST3_smx:INFO: # loops 3 09:56:43:ST3_smx:INFO: # loops 4 09:56:45:ST3_smx:INFO: Total # of broken channels: 0 09:56:45:ST3_smx:INFO: List of broken channels: [] 09:56:45:ST3_smx:INFO: Total # of broken channels: 0 09:56:45:ST3_smx:INFO: List of broken channels: [] 09:56:45:ST3_smx:INFO: Configuring SMX FAST 09:56:47:ST3_smx:INFO: chip: 5-4 25.062742 C 1200.969315 mV 09:56:47:ST3_smx:INFO: Electrons 09:56:47:ST3_smx:INFO: # loops 0 09:56:49:ST3_smx:INFO: # loops 1 09:56:50:ST3_smx:INFO: # loops 2 09:56:52:ST3_smx:INFO: # loops 3 09:56:53:ST3_smx:INFO: # loops 4 09:56:55:ST3_smx:INFO: Total # of broken channels: 0 09:56:55:ST3_smx:INFO: List of broken channels: [] 09:56:55:ST3_smx:INFO: Total # of broken channels: 0 09:56:55:ST3_smx:INFO: List of broken channels: [] 09:56:55:ST3_smx:INFO: Configuring SMX FAST 09:56:57:ST3_smx:INFO: chip: 12-5 31.389742 C 1177.390875 mV 09:56:57:ST3_smx:INFO: Electrons 09:56:57:ST3_smx:INFO: # loops 0 09:56:59:ST3_smx:INFO: # loops 1 09:57:00:ST3_smx:INFO: # loops 2 09:57:02:ST3_smx:INFO: # loops 3 09:57:04:ST3_smx:INFO: # loops 4 09:57:05:ST3_smx:INFO: Total # of broken channels: 0 09:57:05:ST3_smx:INFO: List of broken channels: [] 09:57:05:ST3_smx:INFO: Total # of broken channels: 0 09:57:05:ST3_smx:INFO: List of broken channels: [] 09:57:06:ST3_smx:INFO: Configuring SMX FAST 09:57:08:ST3_smx:INFO: chip: 7-6 21.902970 C 1212.728715 mV 09:57:08:ST3_smx:INFO: Electrons 09:57:08:ST3_smx:INFO: # loops 0 09:57:09:ST3_smx:INFO: # loops 1 09:57:11:ST3_smx:INFO: # loops 2 09:57:13:ST3_smx:INFO: # loops 3 09:57:14:ST3_smx:INFO: # loops 4 09:57:16:ST3_smx:INFO: Total # of broken channels: 0 09:57:16:ST3_smx:INFO: List of broken channels: [] 09:57:16:ST3_smx:INFO: Total # of broken channels: 0 09:57:16:ST3_smx:INFO: List of broken channels: [] 09:57:16:ST3_smx:INFO: Configuring SMX FAST 09:57:18:ST3_smx:INFO: chip: 14-7 25.062742 C 1195.082160 mV 09:57:18:ST3_smx:INFO: Electrons 09:57:18:ST3_smx:INFO: # loops 0 09:57:20:ST3_smx:INFO: # loops 1 09:57:21:ST3_smx:INFO: # loops 2 09:57:23:ST3_smx:INFO: # loops 3 09:57:25:ST3_smx:INFO: # loops 4 09:57:26:ST3_smx:INFO: Total # of broken channels: 0 09:57:26:ST3_smx:INFO: List of broken channels: [] 09:57:26:ST3_smx:INFO: Total # of broken channels: 1 09:57:26:ST3_smx:INFO: List of broken channels: [38] 09:57:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:57:27:febtest:INFO: 1-0 | XA-000-08-002-000-007-011-06 | 31.4 | 1165.6 09:57:28:febtest:INFO: 8-1 | XA-000-08-002-000-008-165-06 | 31.4 | 1171.5 09:57:28:febtest:INFO: 3-2 | XA-000-08-002-000-007-088-04 | 18.7 | 1224.5 09:57:28:febtest:INFO: 10-3 | XA-000-08-002-001-007-234-15 | 25.1 | 1201.0 09:57:28:febtest:INFO: 5-4 | XA-000-08-002-000-007-010-06 | 28.2 | 1201.0 09:57:29:febtest:INFO: 12-5 | XA-000-08-002-001-007-238-15 | 31.4 | 1171.5 09:57:29:febtest:INFO: 7-6 | XA-000-08-002-000-008-168-06 | 21.9 | 1212.7 09:57:29:febtest:INFO: 14-7 | XA-000-08-002-001-007-251-08 | 28.2 | 1195.1 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2023_12_01-09_55_25 OPERATOR : Robert V.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : P 0804 L55 M01 FEB_SN : 1086 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 15403 MODULE_NAME: P 0804 L55 M01 MODULE_TYPE: MODULE_LADDER: L4UL601034 MODULE_MODULE: M4UL6B0010340A2 MODULE_SIZE: 62 MODULE_GRADE: C --------------------------------------- VI_before_Init : ['2.450', '1.7880', '1.851', '0.5695', '7.000', '1.5480', '7.000', '1.5480'] VI_after__Init : ['2.450', '1.9710', '1.850', '0.4819', '7.000', '1.5490', '7.000', '1.5490'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 09:57:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:57:30:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 09:57:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:57:34:ST3_ModuleSelector:INFO: P 0804 L55 M01 09:57:34:ST3_ModuleSelector:INFO: 15403 09:57:34:febtest:INFO: Testing FEB with SN 1086 09:57:35:smx_tester:INFO: Scanning setup 09:57:35:elinks:INFO: Disabling clock on downlink 0 09:57:35:elinks:INFO: Disabling clock on downlink 1 09:57:35:elinks:INFO: Disabling clock on downlink 2 09:57:36:elinks:INFO: Disabling clock on downlink 3 09:57:36:elinks:INFO: Disabling clock on downlink 4 09:57:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:57:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:57:36:elinks:INFO: Disabling clock on downlink 0 09:57:36:elinks:INFO: Disabling clock on downlink 1 09:57:36:elinks:INFO: Disabling clock on downlink 2 09:57:36:elinks:INFO: Disabling clock on downlink 3 09:57:36:elinks:INFO: Disabling clock on downlink 4 09:57:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:57:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:57:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:57:36:elinks:INFO: Disabling clock on downlink 0 09:57:36:elinks:INFO: Disabling clock on downlink 1 09:57:36:elinks:INFO: Disabling clock on downlink 2 09:57:36:elinks:INFO: Disabling clock on downlink 3 09:57:36:elinks:INFO: Disabling clock on downlink 4 09:57:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:57:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:57:36:elinks:INFO: Disabling clock on downlink 0 09:57:36:elinks:INFO: Disabling clock on downlink 1 09:57:36:elinks:INFO: Disabling clock on downlink 2 09:57:36:elinks:INFO: Disabling clock on downlink 3 09:57:36:elinks:INFO: Disabling clock on downlink 4 09:57:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:57:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:57:36:elinks:INFO: Disabling clock on downlink 0 09:57:36:elinks:INFO: Disabling clock on downlink 1 09:57:36:elinks:INFO: Disabling clock on downlink 2 09:57:36:elinks:INFO: Disabling clock on downlink 3 09:57:36:elinks:INFO: Disabling clock on downlink 4 09:57:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:57:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:57:36:setup_element:INFO: Scanning clock phase 09:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:57:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:57:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:57:36:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX Clock Delay: 36 09:57:36:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX Clock Delay: 36 09:57:36:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 6 : X__________________________________________________________________________XXXXX Clock Delay: 37 09:57:36:setup_element:INFO: Eye window for uplink 7 : X__________________________________________________________________________XXXXX Clock Delay: 37 09:57:36:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:57:36:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:57:37:setup_element:INFO: Eye window for uplink 14: X_________________________________________________________________________XXXXXX Clock Delay: 37 09:57:37:setup_element:INFO: Eye window for uplink 15: X_________________________________________________________________________XXXXXX Clock Delay: 37 09:57:37:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1 09:57:37:setup_element:INFO: Scanning data phases 09:57:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:57:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:57:41:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:57:41:setup_element:INFO: Eye window for uplink 0 : ________XXXXXX__________________________ Data delay found: 30 09:57:41:setup_element:INFO: Eye window for uplink 1 : _____XXXXX______________________________ Data delay found: 27 09:57:41:setup_element:INFO: Eye window for uplink 2 : ____XXXXXX______________________________ Data delay found: 26 09:57:41:setup_element:INFO: Eye window for uplink 3 : __XXXXX_________________________________ Data delay found: 24 09:57:42:setup_element:INFO: Eye window for uplink 4 : _XXXXX__________________________________ Data delay found: 23 09:57:42:setup_element:INFO: Eye window for uplink 5 : XX__________________________________XXXX Data delay found: 18 09:57:42:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X Data delay found: 21 09:57:42:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_ Data delay found: 16 09:57:42:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________ Data delay found: 8 09:57:42:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____ Data delay found: 13 09:57:42:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 09:57:42:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______ Data delay found: 11 09:57:42:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX_________ Data delay found: 8 09:57:42:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXX_____ Data delay found: 11 09:57:42:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______ Data delay found: 11 09:57:42:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___ Data delay found: 14 09:57:42:setup_element:INFO: Setting the data phase to 30 for uplink 0 09:57:42:setup_element:INFO: Setting the data phase to 27 for uplink 1 09:57:42:setup_element:INFO: Setting the data phase to 26 for uplink 2 09:57:42:setup_element:INFO: Setting the data phase to 24 for uplink 3 09:57:42:setup_element:INFO: Setting the data phase to 23 for uplink 4 09:57:42:setup_element:INFO: Setting the data phase to 18 for uplink 5 09:57:42:setup_element:INFO: Setting the data phase to 21 for uplink 6 09:57:42:setup_element:INFO: Setting the data phase to 16 for uplink 7 09:57:42:setup_element:INFO: Setting the data phase to 8 for uplink 8 09:57:42:setup_element:INFO: Setting the data phase to 13 for uplink 9 09:57:42:setup_element:INFO: Setting the data phase to 8 for uplink 10 09:57:42:setup_element:INFO: Setting the data phase to 11 for uplink 11 09:57:42:setup_element:INFO: Setting the data phase to 8 for uplink 12 09:57:42:setup_element:INFO: Setting the data phase to 11 for uplink 13 09:57:42:setup_element:INFO: Setting the data phase to 11 for uplink 14 09:57:42:setup_element:INFO: Setting the data phase to 14 for uplink 15 09:57:42:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 36 Window Length: 71 Eye Windows: Uplink 0: __________________________________________________________________________XXXXXX Uplink 1: __________________________________________________________________________XXXXXX Uplink 2: ________________________________________________________________________XXXXXXXX Uplink 3: ________________________________________________________________________XXXXXXXX Uplink 4: _________________________________________________________________________XXXXXX_ Uplink 5: _________________________________________________________________________XXXXXX_ Uplink 6: X__________________________________________________________________________XXXXX Uplink 7: X__________________________________________________________________________XXXXX Uplink 8: ________________________________________________________________________XXXXXXXX Uplink 9: ________________________________________________________________________XXXXXXXX Uplink 10: ________________________________________________________________________XXXXXXX_ Uplink 11: ________________________________________________________________________XXXXXXX_ Uplink 12: ________________________________________________________________________XXXXXXX_ Uplink 13: ________________________________________________________________________XXXXXXX_ Uplink 14: X_________________________________________________________________________XXXXXX Uplink 15: X_________________________________________________________________________XXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 1: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 2: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 3: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 4: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 5: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 6: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 7: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 12: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 14: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ ] 09:57:42:setup_element:INFO: Beginning SMX ASICs map scan 09:57:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:57:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:57:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:57:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:57:42:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:57:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:57:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:57:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:57:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:57:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:57:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:57:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:57:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:57:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:57:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:57:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:57:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:57:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:57:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:57:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:57:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:57:44:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 36 Window Length: 71 Eye Windows: Uplink 0: __________________________________________________________________________XXXXXX Uplink 1: __________________________________________________________________________XXXXXX Uplink 2: ________________________________________________________________________XXXXXXXX Uplink 3: ________________________________________________________________________XXXXXXXX Uplink 4: _________________________________________________________________________XXXXXX_ Uplink 5: _________________________________________________________________________XXXXXX_ Uplink 6: X__________________________________________________________________________XXXXX Uplink 7: X__________________________________________________________________________XXXXX Uplink 8: ________________________________________________________________________XXXXXXXX Uplink 9: ________________________________________________________________________XXXXXXXX Uplink 10: ________________________________________________________________________XXXXXXX_ Uplink 11: ________________________________________________________________________XXXXXXX_ Uplink 12: ________________________________________________________________________XXXXXXX_ Uplink 13: ________________________________________________________________________XXXXXXX_ Uplink 14: X_________________________________________________________________________XXXXXX Uplink 15: X_________________________________________________________________________XXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 1: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 2: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 3: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 4: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 5: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 6: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 7: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 12: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 14: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ 09:57:44:setup_element:INFO: Performing Elink synchronization 09:57:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:57:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:57:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:57:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:57:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:57:44:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:57:44:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14 09:57:45:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:57:46:febtest:INFO: 1-0 | XA-000-08-002-000-007-011-06 | 31.4 | 1171.5 09:57:46:febtest:INFO: 8-1 | XA-000-08-002-000-008-165-06 | 21.9 | 1201.0 09:57:46:febtest:INFO: 3-2 | XA-000-08-002-000-007-088-04 | 9.3 | 1259.6 09:57:46:febtest:INFO: 10-3 | XA-000-08-002-001-007-234-15 | 21.9 | 1212.7 09:57:46:febtest:INFO: 5-4 | XA-000-08-002-000-007-010-06 | 25.1 | 1206.9 09:57:47:febtest:INFO: 12-5 | XA-000-08-002-001-007-238-15 | 34.6 | 1165.6 09:57:47:febtest:INFO: 7-6 | XA-000-08-002-000-008-168-06 | 18.7 | 1224.5 09:57:47:febtest:INFO: 14-7 | XA-000-08-002-001-007-251-08 | 15.6 | 1242.0 09:57:47:ST3_smx:INFO: Configuring SMX FAST 09:57:49:ST3_smx:INFO: chip: 1-0 34.556970 C 1165.571835 mV 09:57:49:ST3_smx:INFO: Electrons 09:57:49:ST3_smx:INFO: # loops 0 09:57:51:ST3_smx:INFO: # loops 1 09:57:52:ST3_smx:INFO: # loops 2 09:57:54:ST3_smx:INFO: # loops 3 09:57:56:ST3_smx:INFO: # loops 4 09:57:58:ST3_smx:INFO: Total # of broken channels: 0 09:57:58:ST3_smx:INFO: List of broken channels: [] 09:57:58:ST3_smx:INFO: Total # of broken channels: 0 09:57:58:ST3_smx:INFO: List of broken channels: [] 09:57:58:ST3_smx:INFO: Configuring SMX FAST 09:58:00:ST3_smx:INFO: chip: 8-1 31.389742 C 1171.483840 mV 09:58:00:ST3_smx:INFO: Electrons 09:58:00:ST3_smx:INFO: # loops 0 09:58:01:ST3_smx:INFO: # loops 1 09:58:03:ST3_smx:INFO: # loops 2 09:58:05:ST3_smx:INFO: # loops 3 09:58:06:ST3_smx:INFO: # loops 4 09:58:08:ST3_smx:INFO: Total # of broken channels: 0 09:58:08:ST3_smx:INFO: List of broken channels: [] 09:58:08:ST3_smx:INFO: Total # of broken channels: 0 09:58:08:ST3_smx:INFO: List of broken channels: [] 09:58:08:ST3_smx:INFO: Configuring SMX FAST 09:58:10:ST3_smx:INFO: chip: 3-2 18.745682 C 1224.468235 mV 09:58:10:ST3_smx:INFO: Electrons 09:58:10:ST3_smx:INFO: # loops 0 09:58:12:ST3_smx:INFO: # loops 1 09:58:13:ST3_smx:INFO: # loops 2 09:58:15:ST3_smx:INFO: # loops 3 09:58:16:ST3_smx:INFO: # loops 4 09:58:18:ST3_smx:INFO: Total # of broken channels: 0 09:58:18:ST3_smx:INFO: List of broken channels: [] 09:58:18:ST3_smx:INFO: Total # of broken channels: 0 09:58:18:ST3_smx:INFO: List of broken channels: [] 09:58:18:ST3_smx:INFO: Configuring SMX FAST 09:58:20:ST3_smx:INFO: chip: 10-3 25.062742 C 1200.969315 mV 09:58:20:ST3_smx:INFO: Electrons 09:58:20:ST3_smx:INFO: # loops 0 09:58:22:ST3_smx:INFO: # loops 1 09:58:24:ST3_smx:INFO: # loops 2 09:58:25:ST3_smx:INFO: # loops 3 09:58:27:ST3_smx:INFO: # loops 4 09:58:28:ST3_smx:INFO: Total # of broken channels: 0 09:58:28:ST3_smx:INFO: List of broken channels: [] 09:58:28:ST3_smx:INFO: Total # of broken channels: 0 09:58:28:ST3_smx:INFO: List of broken channels: [] 09:58:29:ST3_smx:INFO: Configuring SMX FAST 09:58:31:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV 09:58:31:ST3_smx:INFO: Electrons 09:58:31:ST3_smx:INFO: # loops 0 09:58:33:ST3_smx:INFO: # loops 1 09:58:34:ST3_smx:INFO: # loops 2 09:58:36:ST3_smx:INFO: # loops 3 09:58:37:ST3_smx:INFO: # loops 4 09:58:39:ST3_smx:INFO: Total # of broken channels: 0 09:58:39:ST3_smx:INFO: List of broken channels: [] 09:58:39:ST3_smx:INFO: Total # of broken channels: 0 09:58:39:ST3_smx:INFO: List of broken channels: [] 09:58:39:ST3_smx:INFO: Configuring SMX FAST 09:58:41:ST3_smx:INFO: chip: 12-5 34.556970 C 1177.390875 mV 09:58:41:ST3_smx:INFO: Electrons 09:58:41:ST3_smx:INFO: # loops 0 09:58:43:ST3_smx:INFO: # loops 1 09:58:44:ST3_smx:INFO: # loops 2 09:58:46:ST3_smx:INFO: # loops 3 09:58:48:ST3_smx:INFO: # loops 4 09:58:49:ST3_smx:INFO: Total # of broken channels: 0 09:58:49:ST3_smx:INFO: List of broken channels: [] 09:58:49:ST3_smx:INFO: Total # of broken channels: 0 09:58:49:ST3_smx:INFO: List of broken channels: [] 09:58:50:ST3_smx:INFO: Configuring SMX FAST 09:58:51:ST3_smx:INFO: chip: 7-6 25.062742 C 1212.728715 mV 09:58:51:ST3_smx:INFO: Electrons 09:58:51:ST3_smx:INFO: # loops 0 09:58:53:ST3_smx:INFO: # loops 1 09:58:55:ST3_smx:INFO: # loops 2 09:58:56:ST3_smx:INFO: # loops 3 09:58:58:ST3_smx:INFO: # loops 4 09:58:59:ST3_smx:INFO: Total # of broken channels: 0 09:58:59:ST3_smx:INFO: List of broken channels: [] 09:58:59:ST3_smx:INFO: Total # of broken channels: 0 09:58:59:ST3_smx:INFO: List of broken channels: [] 09:59:00:ST3_smx:INFO: Configuring SMX FAST 09:59:02:ST3_smx:INFO: chip: 14-7 28.225000 C 1195.082160 mV 09:59:02:ST3_smx:INFO: Electrons 09:59:02:ST3_smx:INFO: # loops 0 09:59:03:ST3_smx:INFO: # loops 1 09:59:05:ST3_smx:INFO: # loops 2 09:59:07:ST3_smx:INFO: # loops 3 09:59:08:ST3_smx:INFO: # loops 4 09:59:10:ST3_smx:INFO: Total # of broken channels: 0 09:59:10:ST3_smx:INFO: List of broken channels: [] 09:59:10:ST3_smx:INFO: Total # of broken channels: 1 09:59:10:ST3_smx:INFO: List of broken channels: [38] 09:59:10:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:59:11:febtest:INFO: 1-0 | XA-000-08-002-000-007-011-06 | 34.6 | 1165.6 09:59:11:febtest:INFO: 8-1 | XA-000-08-002-000-008-165-06 | 34.6 | 1171.5 09:59:11:febtest:INFO: 3-2 | XA-000-08-002-000-007-088-04 | 21.9 | 1224.5 09:59:11:febtest:INFO: 10-3 | XA-000-08-002-001-007-234-15 | 25.1 | 1201.0 09:59:12:febtest:INFO: 5-4 | XA-000-08-002-000-007-010-06 | 28.2 | 1201.0 09:59:12:febtest:INFO: 12-5 | XA-000-08-002-001-007-238-15 | 34.6 | 1177.4 09:59:12:febtest:INFO: 7-6 | XA-000-08-002-000-008-168-06 | 25.1 | 1212.7 09:59:12:febtest:INFO: 14-7 | XA-000-08-002-001-007-251-08 | 28.2 | 1195.1 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2023_12_01-09_57_30 OPERATOR : Robert V.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : P 0804 L55 M01 FEB_SN : 1086 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 15403 MODULE_NAME: P 0804 L55 M01 MODULE_TYPE: MODULE_LADDER: L4UL601034 MODULE_MODULE: M4UL6B0010340A2 MODULE_SIZE: 62 MODULE_GRADE: C --------------------------------------- VI_before_Init : ['2.450', '1.8070', '1.851', '0.5583', '7.000', '1.5490', '7.000', '1.5490'] VI_after__Init : ['2.450', '1.9730', '1.850', '0.6088', '7.000', '1.5490', '7.000', '1.5490'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 09:59:19:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1086/TestDate_2023_12_01-09_57_30/