FEB_1087    22.01.24 10:42:31

TextEdit.txt
            10:42:23:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:42:23:febtest:INFO:	FEB 8-2 selected
10:42:23:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:42:26:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
10:42:27:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; Robert V.; 
10:42:30:febtest:INFO:	FEB 8-2 selected
10:42:30:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:42:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:31:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:42:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:31:febtest:INFO:	Testing FEB with SN 1087
10:42:32:smx_tester:INFO:	Scanning setup
10:42:32:elinks:INFO:	Disabling clock on downlink 0
10:42:32:elinks:INFO:	Disabling clock on downlink 1
10:42:32:elinks:INFO:	Disabling clock on downlink 2
10:42:32:elinks:INFO:	Disabling clock on downlink 3
10:42:32:elinks:INFO:	Disabling clock on downlink 4
10:42:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:42:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:42:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:42:33:elinks:INFO:	Disabling clock on downlink 0
10:42:33:elinks:INFO:	Disabling clock on downlink 1
10:42:33:elinks:INFO:	Disabling clock on downlink 2
10:42:33:elinks:INFO:	Disabling clock on downlink 3
10:42:33:elinks:INFO:	Disabling clock on downlink 4
10:42:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:42:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:42:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:42:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:42:33:elinks:INFO:	Disabling clock on downlink 0
10:42:33:elinks:INFO:	Disabling clock on downlink 1
10:42:33:elinks:INFO:	Disabling clock on downlink 2
10:42:33:elinks:INFO:	Disabling clock on downlink 3
10:42:33:elinks:INFO:	Disabling clock on downlink 4
10:42:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:42:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:42:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:42:33:elinks:INFO:	Disabling clock on downlink 0
10:42:33:elinks:INFO:	Disabling clock on downlink 1
10:42:33:elinks:INFO:	Disabling clock on downlink 2
10:42:33:elinks:INFO:	Disabling clock on downlink 3
10:42:33:elinks:INFO:	Disabling clock on downlink 4
10:42:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:42:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:42:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:42:33:elinks:INFO:	Disabling clock on downlink 0
10:42:33:elinks:INFO:	Disabling clock on downlink 1
10:42:33:elinks:INFO:	Disabling clock on downlink 2
10:42:33:elinks:INFO:	Disabling clock on downlink 3
10:42:33:elinks:INFO:	Disabling clock on downlink 4
10:42:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:42:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:42:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:42:33:setup_element:INFO:	Scanning clock phase
10:42:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:42:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:34:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:42:34:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:34:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:34:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:42:34:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:42:34:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:34:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:34:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:42:34:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:42:34:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
10:42:34:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
10:42:34:setup_element:INFO:	Scanning data phases
10:42:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:42:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:39:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:42:39:setup_element:INFO:	Eye window for uplink 0 : _____________XXXX_______________________
Data delay found: 34
10:42:39:setup_element:INFO:	Eye window for uplink 1 : XXXXXXXXXXXXXXX_____________________XXXX
Data delay found: 25
10:42:39:setup_element:INFO:	Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
10:42:39:setup_element:INFO:	Eye window for uplink 3 : ________XXXX____________________________
Data delay found: 29
10:42:39:setup_element:INFO:	Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
10:42:39:setup_element:INFO:	Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
10:42:39:setup_element:INFO:	Eye window for uplink 6 : XXX________________________XXXXXXXXXXXXX
Data delay found: 14
10:42:39:setup_element:INFO:	Eye window for uplink 7 : ___________________________XXXXXXXXXXXXX
Data delay found: 13
10:42:39:setup_element:INFO:	Eye window for uplink 8 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
10:42:39:setup_element:INFO:	Eye window for uplink 9 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
10:42:39:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
10:42:39:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
10:42:39:setup_element:INFO:	Eye window for uplink 12: _____________________________XXXX_______
Data delay found: 10
10:42:39:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
10:42:39:setup_element:INFO:	Eye window for uplink 14: ______________________________XXXXXXXXXX
Data delay found: 14
10:42:39:setup_element:INFO:	Eye window for uplink 15: ________________________________XXXXXXXX
Data delay found: 15
10:42:39:setup_element:INFO:	Setting the data phase to 34 for uplink 0
10:42:39:setup_element:INFO:	Setting the data phase to 25 for uplink 1
10:42:39:setup_element:INFO:	Setting the data phase to 32 for uplink 2
10:42:39:setup_element:INFO:	Setting the data phase to 29 for uplink 3
10:42:39:setup_element:INFO:	Setting the data phase to 27 for uplink 4
10:42:39:setup_element:INFO:	Setting the data phase to 23 for uplink 5
10:42:39:setup_element:INFO:	Setting the data phase to 14 for uplink 6
10:42:39:setup_element:INFO:	Setting the data phase to 13 for uplink 7
10:42:39:setup_element:INFO:	Setting the data phase to 9 for uplink 8
10:42:39:setup_element:INFO:	Setting the data phase to 9 for uplink 9
10:42:39:setup_element:INFO:	Setting the data phase to 8 for uplink 10
10:42:39:setup_element:INFO:	Setting the data phase to 12 for uplink 11
10:42:39:setup_element:INFO:	Setting the data phase to 10 for uplink 12
10:42:39:setup_element:INFO:	Setting the data phase to 13 for uplink 13
10:42:39:setup_element:INFO:	Setting the data phase to 14 for uplink 14
10:42:39:setup_element:INFO:	Setting the data phase to 15 for uplink 15
10:42:39:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: ________________________________________________________________________________
      Uplink  5: ________________________________________________________________________________
      Uplink  6: ________________________________________________________________________________
      Uplink  7: ________________________________________________________________________________
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ________________________________________________________________________________
      Uplink 13: ________________________________________________________________________________
      Uplink 14: ________________________________________________________________________________
      Uplink 15: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 1:
      Optimal Phase: 25
      Window Length: 21
      Eye Window: XXXXXXXXXXXXXXX_____________________XXXX
    Uplink 2:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 3:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 14
      Window Length: 24
      Eye Window: XXX________________________XXXXXXXXXXXXX
    Uplink 7:
      Optimal Phase: 13
      Window Length: 27
      Eye Window: ___________________________XXXXXXXXXXXXX
    Uplink 8:
      Optimal Phase: 9
      Window Length: 20
      Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX
    Uplink 9:
      Optimal Phase: 9
      Window Length: 20
      Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 14
      Window Length: 30
      Eye Window: ______________________________XXXXXXXXXX
    Uplink 15:
      Optimal Phase: 15
      Window Length: 32
      Eye Window: ________________________________XXXXXXXX
]
10:42:39:setup_element:INFO:	Beginning SMX ASICs map scan
10:42:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:42:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:42:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:42:39:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:42:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:42:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:42:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:42:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:42:39:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:42:39:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:42:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:42:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:42:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:42:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:42:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:42:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:42:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:42:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:42:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:42:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:42:41:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: ________________________________________________________________________________
      Uplink  5: ________________________________________________________________________________
      Uplink  6: ________________________________________________________________________________
      Uplink  7: ________________________________________________________________________________
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ________________________________________________________________________________
      Uplink 13: ________________________________________________________________________________
      Uplink 14: ________________________________________________________________________________
      Uplink 15: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 1:
      Optimal Phase: 25
      Window Length: 21
      Eye Window: XXXXXXXXXXXXXXX_____________________XXXX
    Uplink 2:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 3:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 14
      Window Length: 24
      Eye Window: XXX________________________XXXXXXXXXXXXX
    Uplink 7:
      Optimal Phase: 13
      Window Length: 27
      Eye Window: ___________________________XXXXXXXXXXXXX
    Uplink 8:
      Optimal Phase: 9
      Window Length: 20
      Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX
    Uplink 9:
      Optimal Phase: 9
      Window Length: 20
      Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 14
      Window Length: 30
      Eye Window: ______________________________XXXXXXXXXX
    Uplink 15:
      Optimal Phase: 15
      Window Length: 32
      Eye Window: ________________________________XXXXXXXX

10:42:41:setup_element:INFO:	Performing Elink synchronization
10:42:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:42:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:42:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:42:41:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:42:41:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:42:42:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
10:42:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:42:43:febtest:INFO:	1-0 | XA-000-08-002-001-006-235-02 |  44.1 | 1177.4
10:42:43:febtest:INFO:	8-1 | XA-000-08-002-001-006-229-02 |  34.6 | 1236.2
10:42:43:febtest:INFO:	3-2 | XA-000-08-002-001-006-238-02 |  47.3 | 1171.5
10:42:43:febtest:INFO:	10-3 | XA-000-08-002-001-006-232-02 |  40.9 | 1195.1
10:42:44:febtest:INFO:	5-4 | XA-000-08-002-001-006-234-02 |  40.9 | 1195.1
10:42:44:febtest:INFO:	12-5 | XA-000-08-002-001-006-236-02 |  25.1 | 1242.0
10:42:44:febtest:INFO:	7-6 | XA-000-08-002-001-006-227-02 |  28.2 | 1247.9
10:42:44:febtest:INFO:	14-7 | XA-000-08-002-001-006-243-05 |  47.3 | 1177.4
10:42:44:ST3_smx:INFO:	Configuring SMX FAST
10:42:46:ST3_smx:INFO:	chip: 1-0 	 44.073563 C 	 1177.390875 mV
10:42:46:ST3_smx:INFO:		Electrons
10:42:46:ST3_smx:INFO:	# loops 0
10:42:48:ST3_smx:INFO:	# loops 1
10:42:50:ST3_smx:INFO:	# loops 2
10:42:51:ST3_smx:INFO:	# loops 3
10:42:53:ST3_smx:INFO:	# loops 4
10:42:55:ST3_smx:INFO:	Total # of broken channels: 0
10:42:55:ST3_smx:INFO:	List of broken channels: []
10:42:55:ST3_smx:INFO:	Total # of broken channels: 0
10:42:55:ST3_smx:INFO:	List of broken channels: []
10:42:56:ST3_smx:INFO:	Configuring SMX FAST
10:42:58:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1230.330540 mV
10:42:58:ST3_smx:INFO:		Electrons
10:42:58:ST3_smx:INFO:	# loops 0
10:42:59:ST3_smx:INFO:	# loops 1
10:43:01:ST3_smx:INFO:	# loops 2
10:43:02:ST3_smx:INFO:	# loops 3
10:43:04:ST3_smx:INFO:	# loops 4
10:43:06:ST3_smx:INFO:	Total # of broken channels: 0
10:43:06:ST3_smx:INFO:	List of broken channels: []
10:43:06:ST3_smx:INFO:	Total # of broken channels: 0
10:43:06:ST3_smx:INFO:	List of broken channels: []
10:43:06:ST3_smx:INFO:	Configuring SMX FAST
10:43:08:ST3_smx:INFO:	chip: 3-2 	 47.250730 C 	 1171.483840 mV
10:43:08:ST3_smx:INFO:		Electrons
10:43:08:ST3_smx:INFO:	# loops 0
10:43:10:ST3_smx:INFO:	# loops 1
10:43:11:ST3_smx:INFO:	# loops 2
10:43:13:ST3_smx:INFO:	# loops 3
10:43:15:ST3_smx:INFO:	# loops 4
10:43:16:ST3_smx:INFO:	Total # of broken channels: 0
10:43:16:ST3_smx:INFO:	List of broken channels: []
10:43:16:ST3_smx:INFO:	Total # of broken channels: 0
10:43:16:ST3_smx:INFO:	List of broken channels: []
10:43:17:ST3_smx:INFO:	Configuring SMX FAST
10:43:19:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1177.390875 mV
10:43:19:ST3_smx:INFO:		Electrons
10:43:19:ST3_smx:INFO:	# loops 0
10:43:20:ST3_smx:INFO:	# loops 1
10:43:22:ST3_smx:INFO:	# loops 2
10:43:23:ST3_smx:INFO:	# loops 3
10:43:25:ST3_smx:INFO:	# loops 4
10:43:27:ST3_smx:INFO:	Total # of broken channels: 0
10:43:27:ST3_smx:INFO:	List of broken channels: []
10:43:27:ST3_smx:INFO:	Total # of broken channels: 0
10:43:27:ST3_smx:INFO:	List of broken channels: []
10:43:27:ST3_smx:INFO:	Configuring SMX FAST
10:43:29:ST3_smx:INFO:	chip: 5-4 	 47.250730 C 	 1183.292940 mV
10:43:29:ST3_smx:INFO:		Electrons
10:43:29:ST3_smx:INFO:	# loops 0
10:43:31:ST3_smx:INFO:	# loops 1
10:43:33:ST3_smx:INFO:	# loops 2
10:43:35:ST3_smx:INFO:	# loops 3
10:43:36:ST3_smx:INFO:	# loops 4
10:43:38:ST3_smx:INFO:	Total # of broken channels: 0
10:43:38:ST3_smx:INFO:	List of broken channels: []
10:43:38:ST3_smx:INFO:	Total # of broken channels: 0
10:43:38:ST3_smx:INFO:	List of broken channels: []
10:43:38:ST3_smx:INFO:	Configuring SMX FAST
10:43:40:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1224.468235 mV
10:43:40:ST3_smx:INFO:		Electrons
10:43:40:ST3_smx:INFO:	# loops 0
10:43:42:ST3_smx:INFO:	# loops 1
10:43:44:ST3_smx:INFO:	# loops 2
10:43:45:ST3_smx:INFO:	# loops 3
10:43:47:ST3_smx:INFO:	# loops 4
10:43:48:ST3_smx:INFO:	Total # of broken channels: 0
10:43:48:ST3_smx:INFO:	List of broken channels: []
10:43:48:ST3_smx:INFO:	Total # of broken channels: 0
10:43:48:ST3_smx:INFO:	List of broken channels: []
10:43:49:ST3_smx:INFO:	Configuring SMX FAST
10:43:51:ST3_smx:INFO:	chip: 7-6 	 40.898880 C 	 1200.969315 mV
10:43:51:ST3_smx:INFO:		Electrons
10:43:51:ST3_smx:INFO:	# loops 0
10:43:52:ST3_smx:INFO:	# loops 1
10:43:54:ST3_smx:INFO:	# loops 2
10:43:56:ST3_smx:INFO:	# loops 3
10:43:57:ST3_smx:INFO:	# loops 4
10:43:59:ST3_smx:INFO:	Total # of broken channels: 0
10:43:59:ST3_smx:INFO:	List of broken channels: []
10:43:59:ST3_smx:INFO:	Total # of broken channels: 0
10:43:59:ST3_smx:INFO:	List of broken channels: []
10:43:59:ST3_smx:INFO:	Configuring SMX FAST
10:44:01:ST3_smx:INFO:	chip: 14-7 	 44.073563 C 	 1189.190035 mV
10:44:01:ST3_smx:INFO:		Electrons
10:44:01:ST3_smx:INFO:	# loops 0
10:44:03:ST3_smx:INFO:	# loops 1
10:44:05:ST3_smx:INFO:	# loops 2
10:44:06:ST3_smx:INFO:	# loops 3
10:44:08:ST3_smx:INFO:	# loops 4
10:44:09:ST3_smx:INFO:	Total # of broken channels: 0
10:44:09:ST3_smx:INFO:	List of broken channels: []
10:44:09:ST3_smx:INFO:	Total # of broken channels: 0
10:44:09:ST3_smx:INFO:	List of broken channels: []
10:44:10:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:44:10:febtest:INFO:	1-0 | XA-000-08-002-001-006-235-02 |  44.1 | 1177.4
10:44:11:febtest:INFO:	8-1 | XA-000-08-002-001-006-229-02 |  34.6 | 1230.3
10:44:11:febtest:INFO:	3-2 | XA-000-08-002-001-006-238-02 |  47.3 | 1171.5
10:44:11:febtest:INFO:	10-3 | XA-000-08-002-001-006-232-02 |  44.1 | 1177.4
10:44:11:febtest:INFO:	5-4 | XA-000-08-002-001-006-234-02 |  47.3 | 1177.4
10:44:12:febtest:INFO:	12-5 | XA-000-08-002-001-006-236-02 |  31.4 | 1224.5
10:44:12:febtest:INFO:	7-6 | XA-000-08-002-001-006-227-02 |  40.9 | 1201.0
10:44:12:febtest:INFO:	14-7 | XA-000-08-002-001-006-243-05 |  44.1 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-10_42_31
OPERATOR  : Oleksandr S.; Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 108710:44:29:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1087/TestDate_2024_01_22-10_42_31/

FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.8830', '1.849', '0.6216', '7.000', '1.5800', '7.000', '1.5800']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']