FEB_1087 26.01.24 09:20:27
Info
09:19:18:febtest:INFO: FEB 8-2 selected
09:19:18:smx_tester:INFO: Setting Elink clock mode to 160 MHz
09:19:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:19:23:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
09:19:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:19:49:ST3_ModuleSelector:INFO: L4DL600119 M4DL6T1001191A2 124 D
09:19:49:ST3_ModuleSelector:INFO: 28154
09:19:49:febtest:INFO: Testing FEB with SN 1087
09:19:51:smx_tester:INFO: Scanning setup
09:19:51:elinks:INFO: Disabling clock on downlink 0
09:19:51:elinks:INFO: Disabling clock on downlink 1
09:19:51:elinks:INFO: Disabling clock on downlink 2
09:19:51:elinks:INFO: Disabling clock on downlink 3
09:19:51:elinks:INFO: Disabling clock on downlink 4
09:19:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:19:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:51:elinks:INFO: Disabling clock on downlink 0
09:19:51:elinks:INFO: Disabling clock on downlink 1
09:19:51:elinks:INFO: Disabling clock on downlink 2
09:19:51:elinks:INFO: Disabling clock on downlink 3
09:19:51:elinks:INFO: Disabling clock on downlink 4
09:19:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:19:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:51:elinks:INFO: Disabling clock on downlink 0
09:19:51:elinks:INFO: Disabling clock on downlink 1
09:19:51:elinks:INFO: Disabling clock on downlink 2
09:19:51:elinks:INFO: Disabling clock on downlink 3
09:19:51:elinks:INFO: Disabling clock on downlink 4
09:19:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:19:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:52:elinks:INFO: Disabling clock on downlink 0
09:19:52:elinks:INFO: Disabling clock on downlink 1
09:19:52:elinks:INFO: Disabling clock on downlink 2
09:19:52:elinks:INFO: Disabling clock on downlink 3
09:19:52:elinks:INFO: Disabling clock on downlink 4
09:19:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:19:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:52:elinks:INFO: Disabling clock on downlink 0
09:19:52:elinks:INFO: Disabling clock on downlink 1
09:19:52:elinks:INFO: Disabling clock on downlink 2
09:19:52:elinks:INFO: Disabling clock on downlink 3
09:19:52:elinks:INFO: Disabling clock on downlink 4
09:19:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:19:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:52:ST3_emu:ERROR: # of setup_elements is ZERO!
09:20:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:20:27:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
09:20:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:20:30:ST3_ModuleSelector:INFO: L4DL600119 M4DL6T1001191A2 124 D
09:20:30:ST3_ModuleSelector:INFO: 28154
09:20:30:febtest:INFO: Testing FEB with SN 1087
09:20:32:smx_tester:INFO: Scanning setup
09:20:32:elinks:INFO: Disabling clock on downlink 0
09:20:32:elinks:INFO: Disabling clock on downlink 1
09:20:32:elinks:INFO: Disabling clock on downlink 2
09:20:32:elinks:INFO: Disabling clock on downlink 3
09:20:32:elinks:INFO: Disabling clock on downlink 4
09:20:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:20:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:20:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:20:32:elinks:INFO: Disabling clock on downlink 0
09:20:32:elinks:INFO: Disabling clock on downlink 1
09:20:32:elinks:INFO: Disabling clock on downlink 2
09:20:32:elinks:INFO: Disabling clock on downlink 3
09:20:32:elinks:INFO: Disabling clock on downlink 4
09:20:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:20:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:20:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:20:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:20:32:elinks:INFO: Disabling clock on downlink 0
09:20:32:elinks:INFO: Disabling clock on downlink 1
09:20:32:elinks:INFO: Disabling clock on downlink 2
09:20:32:elinks:INFO: Disabling clock on downlink 3
09:20:32:elinks:INFO: Disabling clock on downlink 4
09:20:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:20:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:20:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:20:33:elinks:INFO: Disabling clock on downlink 0
09:20:33:elinks:INFO: Disabling clock on downlink 1
09:20:33:elinks:INFO: Disabling clock on downlink 2
09:20:33:elinks:INFO: Disabling clock on downlink 3
09:20:33:elinks:INFO: Disabling clock on downlink 4
09:20:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:20:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:20:33:elinks:INFO: Disabling clock on downlink 0
09:20:33:elinks:INFO: Disabling clock on downlink 1
09:20:33:elinks:INFO: Disabling clock on downlink 2
09:20:33:elinks:INFO: Disabling clock on downlink 3
09:20:33:elinks:INFO: Disabling clock on downlink 4
09:20:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:20:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:20:33:setup_element:INFO: Scanning clock phase
09:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:20:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:20:33:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:20:33:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:20:33:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:20:33:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:20:33:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:20:33:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:20:33:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:20:33:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:20:33:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:20:33:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
09:20:33:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
09:20:33:setup_element:INFO: Scanning data phases
09:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:20:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:20:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:20:39:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:20:39:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXX_____________________XXXX
Data delay found: 25
09:20:39:setup_element:INFO: Eye window for uplink 2 : __________XXXX__________________________
Data delay found: 31
09:20:39:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________
Data delay found: 29
09:20:39:setup_element:INFO: Eye window for uplink 4 : ____XXXXXX______________________________
Data delay found: 26
09:20:39:setup_element:INFO: Eye window for uplink 5 : _XXXXX_________________________________X
Data delay found: 22
09:20:39:setup_element:INFO: Eye window for uplink 6 : XXX__________________________________XXX
Data delay found: 19
09:20:39:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
09:20:39:setup_element:INFO: Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
09:20:39:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
09:20:39:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
09:20:39:setup_element:INFO: Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
09:20:39:setup_element:INFO: Eye window for uplink 12: ____________________________XXXX_____XXX
Data delay found: 13
09:20:39:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX_XXX
Data delay found: 15
09:20:39:setup_element:INFO: Eye window for uplink 14: ______________________________XXXX______
Data delay found: 11
09:20:39:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___
Data delay found: 13
09:20:39:setup_element:INFO: Setting the data phase to 34 for uplink 0
09:20:39:setup_element:INFO: Setting the data phase to 25 for uplink 1
09:20:39:setup_element:INFO: Setting the data phase to 31 for uplink 2
09:20:39:setup_element:INFO: Setting the data phase to 29 for uplink 3
09:20:39:setup_element:INFO: Setting the data phase to 26 for uplink 4
09:20:39:setup_element:INFO: Setting the data phase to 22 for uplink 5
09:20:39:setup_element:INFO: Setting the data phase to 19 for uplink 6
09:20:39:setup_element:INFO: Setting the data phase to 15 for uplink 7
09:20:39:setup_element:INFO: Setting the data phase to 7 for uplink 8
09:20:39:setup_element:INFO: Setting the data phase to 13 for uplink 9
09:20:39:setup_element:INFO: Setting the data phase to 8 for uplink 10
09:20:39:setup_element:INFO: Setting the data phase to 12 for uplink 11
09:20:39:setup_element:INFO: Setting the data phase to 13 for uplink 12
09:20:39:setup_element:INFO: Setting the data phase to 15 for uplink 13
09:20:39:setup_element:INFO: Setting the data phase to 11 for uplink 14
09:20:39:setup_element:INFO: Setting the data phase to 13 for uplink 15
09:20:39:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: ________________________________________________________________________________
Uplink 7: ________________________________________________________________________________
Uplink 8: ______________________________________________________________________XXXXXXXXX_
Uplink 9: ______________________________________________________________________XXXXXXXXX_
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ________________________________________________________________________________
Uplink 13: ________________________________________________________________________________
Uplink 14: ________________________________________________________________________________
Uplink 15: ________________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 25
Window Length: 21
Eye Window: XXXXXXXXXXXXXXX_____________________XXXX
Uplink 2:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 3:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 5:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 6:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 12:
Optimal Phase: 13
Window Length: 28
Eye Window: ____________________________XXXX_____XXX
Uplink 13:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXXX_XXX
Uplink 14:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
]
09:20:39:setup_element:INFO: Beginning SMX ASICs map scan
09:20:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:20:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:20:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:20:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:20:39:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:20:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:20:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:20:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:20:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:20:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:20:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:20:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:20:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:20:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:20:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:20:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:20:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:20:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:20:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:20:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:20:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:20:42:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: ________________________________________________________________________________
Uplink 7: ________________________________________________________________________________
Uplink 8: ______________________________________________________________________XXXXXXXXX_
Uplink 9: ______________________________________________________________________XXXXXXXXX_
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ________________________________________________________________________________
Uplink 13: ________________________________________________________________________________
Uplink 14: ________________________________________________________________________________
Uplink 15: ________________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 25
Window Length: 21
Eye Window: XXXXXXXXXXXXXXX_____________________XXXX
Uplink 2:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 3:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 5:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 6:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 12:
Optimal Phase: 13
Window Length: 28
Eye Window: ____________________________XXXX_____XXX
Uplink 13:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXXX_XXX
Uplink 14:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
09:20:42:setup_element:INFO: Performing Elink synchronization
09:20:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:20:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:20:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:20:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:20:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:20:42:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:20:42:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
09:20:43:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:20:43:febtest:INFO: 1-0 | XA-000-08-002-001-006-235-02 | 31.4 | 1195.1
09:20:44:febtest:INFO: 8-1 | XA-000-08-002-001-006-229-02 | 25.1 | 1242.0
09:20:44:febtest:INFO: 3-2 | XA-000-08-002-001-006-238-02 | 25.1 | 1224.5
09:20:44:febtest:INFO: 10-3 | XA-000-08-002-001-006-232-02 | 34.6 | 1195.1
09:20:44:febtest:INFO: 5-4 | XA-000-08-002-001-006-234-02 | 34.6 | 1195.1
09:20:44:febtest:INFO: 12-5 | XA-000-08-002-001-006-236-02 | 21.9 | 1236.2
09:20:45:febtest:INFO: 7-6 | XA-000-08-002-001-006-227-02 | 25.1 | 1242.0
09:20:45:febtest:INFO: 14-7 | XA-000-08-002-001-006-243-05 | 40.9 | 1183.3
09:20:46:ST3_smx:INFO: Configuring SMX FAST
09:20:47:ST3_smx:INFO: chip: 1-0 37.726682 C 1177.390875 mV
09:20:47:ST3_smx:INFO: Electrons
09:20:48:ST3_smx:INFO: # loops 0
09:20:49:ST3_smx:INFO: # loops 1
09:20:51:ST3_smx:INFO: # loops 2
09:20:52:ST3_smx:INFO: # loops 3
09:20:54:ST3_smx:INFO: # loops 4
09:20:56:ST3_smx:INFO: Total # of broken channels: 0
09:20:56:ST3_smx:INFO: List of broken channels: []
09:20:56:ST3_smx:INFO: Total # of broken channels: 0
09:20:56:ST3_smx:INFO: List of broken channels: []
09:20:56:ST3_smx:INFO: Configuring SMX FAST
09:20:58:ST3_smx:INFO: chip: 8-1 31.389742 C 1224.468235 mV
09:20:58:ST3_smx:INFO: Electrons
09:20:58:ST3_smx:INFO: # loops 0
09:21:00:ST3_smx:INFO: # loops 1
09:21:01:ST3_smx:INFO: # loops 2
09:21:03:ST3_smx:INFO: # loops 3
09:21:05:ST3_smx:INFO: # loops 4
09:21:06:ST3_smx:INFO: Total # of broken channels: 0
09:21:06:ST3_smx:INFO: List of broken channels: []
09:21:06:ST3_smx:INFO: Total # of broken channels: 0
09:21:06:ST3_smx:INFO: List of broken channels: []
09:21:07:ST3_smx:INFO: Configuring SMX FAST
09:21:09:ST3_smx:INFO: chip: 3-2 40.898880 C 1177.390875 mV
09:21:09:ST3_smx:INFO: Electrons
09:21:09:ST3_smx:INFO: # loops 0
09:21:10:ST3_smx:INFO: # loops 1
09:21:12:ST3_smx:INFO: # loops 2
09:21:14:ST3_smx:INFO: # loops 3
09:21:15:ST3_smx:INFO: # loops 4
09:21:17:ST3_smx:INFO: Total # of broken channels: 0
09:21:17:ST3_smx:INFO: List of broken channels: []
09:21:17:ST3_smx:INFO: Total # of broken channels: 0
09:21:17:ST3_smx:INFO: List of broken channels: []
09:21:17:ST3_smx:INFO: Configuring SMX FAST
09:21:19:ST3_smx:INFO: chip: 10-3 40.898880 C 1177.390875 mV
09:21:19:ST3_smx:INFO: Electrons
09:21:19:ST3_smx:INFO: # loops 0
09:21:21:ST3_smx:INFO: # loops 1
09:21:23:ST3_smx:INFO: # loops 2
09:21:24:ST3_smx:INFO: # loops 3
09:21:26:ST3_smx:INFO: # loops 4
09:21:28:ST3_smx:INFO: Total # of broken channels: 0
09:21:28:ST3_smx:INFO: List of broken channels: []
09:21:28:ST3_smx:INFO: Total # of broken channels: 0
09:21:28:ST3_smx:INFO: List of broken channels: []
09:21:28:ST3_smx:INFO: Configuring SMX FAST
09:21:30:ST3_smx:INFO: chip: 5-4 40.898880 C 1183.292940 mV
09:21:30:ST3_smx:INFO: Electrons
09:21:30:ST3_smx:INFO: # loops 0
09:21:31:ST3_smx:INFO: # loops 1
09:21:33:ST3_smx:INFO: # loops 2
09:21:35:ST3_smx:INFO: # loops 3
09:21:36:ST3_smx:INFO: # loops 4
09:21:38:ST3_smx:INFO: Total # of broken channels: 0
09:21:38:ST3_smx:INFO: List of broken channels: []
09:21:38:ST3_smx:INFO: Total # of broken channels: 0
09:21:38:ST3_smx:INFO: List of broken channels: []
09:21:39:ST3_smx:INFO: Configuring SMX FAST
09:21:41:ST3_smx:INFO: chip: 12-5 28.225000 C 1224.468235 mV
09:21:41:ST3_smx:INFO: Electrons
09:21:41:ST3_smx:INFO: # loops 0
09:21:42:ST3_smx:INFO: # loops 1
09:21:44:ST3_smx:INFO: # loops 2
09:21:45:ST3_smx:INFO: # loops 3
09:21:47:ST3_smx:INFO: # loops 4
09:21:49:ST3_smx:INFO: Total # of broken channels: 0
09:21:49:ST3_smx:INFO: List of broken channels: []
09:21:49:ST3_smx:INFO: Total # of broken channels: 0
09:21:49:ST3_smx:INFO: List of broken channels: []
09:21:49:ST3_smx:INFO: Configuring SMX FAST
09:21:51:ST3_smx:INFO: chip: 7-6 37.726682 C 1206.851500 mV
09:21:51:ST3_smx:INFO: Electrons
09:21:51:ST3_smx:INFO: # loops 0
09:21:53:ST3_smx:INFO: # loops 1
09:21:54:ST3_smx:INFO: # loops 2
09:21:56:ST3_smx:INFO: # loops 3
09:21:58:ST3_smx:INFO: # loops 4
09:22:00:ST3_smx:INFO: Total # of broken channels: 0
09:22:00:ST3_smx:INFO: List of broken channels: []
09:22:00:ST3_smx:INFO: Total # of broken channels: 0
09:22:00:ST3_smx:INFO: List of broken channels: []
09:22:00:ST3_smx:INFO: Configuring SMX FAST
09:22:02:ST3_smx:INFO: chip: 14-7 40.898880 C 1195.082160 mV
09:22:02:ST3_smx:INFO: Electrons
09:22:02:ST3_smx:INFO: # loops 0
09:22:04:ST3_smx:INFO: # loops 1
09:22:05:ST3_smx:INFO: # loops 2
09:22:07:ST3_smx:INFO: # loops 3
09:22:09:ST3_smx:INFO: # loops 4
09:22:10:ST3_smx:INFO: Total # of broken channels: 0
09:22:10:ST3_smx:INFO: List of broken channels: []
09:22:10:ST3_smx:INFO: Total # of broken channels: 0
09:22:10:ST3_smx:INFO: List of broken channels: []
09:22:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:22:11:febtest:INFO: 1-0 | XA-000-08-002-001-006-235-02 | 40.9 | 1177.4
09:22:12:febtest:INFO: 8-1 | XA-000-08-002-001-006-229-02 | 31.4 | 1230.3
09:22:12:febtest:INFO: 3-2 | XA-000-08-002-001-006-238-02 | 44.1 | 1177.4
09:22:12:febtest:INFO: 10-3 | XA-000-08-002-001-006-232-02 | 40.9 | 1177.4
09:22:12:febtest:INFO: 5-4 | XA-000-08-002-001-006-234-02 | 44.1 | 1183.3
09:22:13:febtest:INFO: 12-5 | XA-000-08-002-001-006-236-02 | 28.2 | 1224.5
09:22:13:febtest:INFO: 7-6 | XA-000-08-002-001-006-227-02 | 37.7 | 1206.9
09:22:13:febtest:INFO: 14-7 | XA-000-08-002-001-006-243-05 | 40.9 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_26-09_20_27
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D
FEB_SN : 1087
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 28154
MODULE_NAME: L4DL600119 M4DL6T1001191A2 124 D
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['2.450', '1.7760', '1.850', '0.4001', '0.000', '0.0000', '7.000', '1.5820']
VI_after__Init : ['2.450', '2.0050', '1.850', '0.3996', '0.000', '0.0000', '7.000', '1.5820']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:22:19:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1087/TestDate_2024_01_26-09_20_27/