09:08:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:08:58:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:08:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:09:23:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2T1001161A2 42 A

09:09:23:ST3_ModuleSelector:INFO:	21322

09:09:23:febtest:INFO:	Testing FEB with SN 1088
09:09:26:smx_tester:INFO:	Scanning setup
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:09:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:27:setup_element:INFO:	Scanning clock phase
09:09:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:27:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:09:27:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:09:27:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:09:27:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:09:27:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:09:27:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:09:27:setup_element:INFO:	Scanning data phases
09:09:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:33:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:09:33:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:09:33:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
09:09:33:setup_element:INFO:	Eye window for uplink 2 : ________XXXX____________________________
Data delay found: 29
09:09:33:setup_element:INFO:	Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
09:09:33:setup_element:INFO:	Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
09:09:33:setup_element:INFO:	Eye window for uplink 5 : XXXXX___________________________________
Data delay found: 22
09:09:33:setup_element:INFO:	Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
09:09:33:setup_element:INFO:	Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
09:09:33:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
09:09:33:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXX_____
Data delay found: 12
09:09:33:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
09:09:33:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
09:09:33:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
09:09:33:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
09:09:33:setup_element:INFO:	Eye window for uplink 14: _____________________________XXX________
Data delay found: 10
09:09:33:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
09:09:33:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:09:33:setup_element:INFO:	Setting the data phase to 30 for uplink 1
09:09:33:setup_element:INFO:	Setting the data phase to 29 for uplink 2
09:09:33:setup_element:INFO:	Setting the data phase to 27 for uplink 3
09:09:33:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:09:33:setup_element:INFO:	Setting the data phase to 22 for uplink 5
09:09:33:setup_element:INFO:	Setting the data phase to 22 for uplink 6
09:09:33:setup_element:INFO:	Setting the data phase to 18 for uplink 7
09:09:33:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:09:33:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:09:33:setup_element:INFO:	Setting the data phase to 9 for uplink 10
09:09:33:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:09:33:setup_element:INFO:	Setting the data phase to 9 for uplink 12
09:09:33:setup_element:INFO:	Setting the data phase to 12 for uplink 13
09:09:33:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:09:33:setup_element:INFO:	Setting the data phase to 11 for uplink 15
09:09:33:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXX__
      Uplink  7: _________________________________________________________________________XXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 37
      Eye Window: _____________________________XXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
]
09:09:33:setup_element:INFO:	Beginning SMX ASICs map scan
09:09:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:09:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:09:33:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:09:33:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:09:33:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:09:33:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:09:33:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:09:33:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:09:33:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:09:33:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:09:33:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:09:33:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:09:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:09:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:09:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:09:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:09:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:09:34:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:09:34:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:09:35:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXX__
      Uplink  7: _________________________________________________________________________XXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 37
      Eye Window: _____________________________XXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______

09:09:35:setup_element:INFO:	Performing Elink synchronization
09:09:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:35:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:09:35:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:09:35:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:09:35:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:09:36:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
09:09:37:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:09:37:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  25.1 | 1224.5
09:09:37:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1206.9
09:09:37:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  31.4 | 1206.9
09:09:38:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  21.9 | 1236.2
09:09:38:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  40.9 | 1171.5
09:09:38:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |   9.3 | 1282.9
09:09:38:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  44.1 | 1159.7
09:09:38:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  21.9 | 1218.6
09:09:39:ST3_smx:INFO:	Configuring SMX FAST
09:09:41:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1212.728715 mV
09:09:41:ST3_smx:INFO:		Electrons
09:09:41:ST3_smx:INFO:	# loops 0
09:09:43:ST3_smx:INFO:	# loops 1
09:09:45:ST3_smx:INFO:	# loops 2
09:09:46:ST3_smx:INFO:	# loops 3
09:09:48:ST3_smx:INFO:	# loops 4
09:09:50:ST3_smx:INFO:	Total # of broken channels: 0
09:09:50:ST3_smx:INFO:	List of broken channels: []
09:09:50:ST3_smx:INFO:	Total # of broken channels: 0
09:09:50:ST3_smx:INFO:	List of broken channels: []
09:09:50:ST3_smx:INFO:	Configuring SMX FAST
09:09:52:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1224.468235 mV
09:09:52:ST3_smx:INFO:		Electrons
09:09:52:ST3_smx:INFO:	# loops 0
09:09:54:ST3_smx:INFO:	# loops 1
09:09:56:ST3_smx:INFO:	# loops 2
09:09:57:ST3_smx:INFO:	# loops 3
09:09:59:ST3_smx:INFO:	# loops 4
09:10:01:ST3_smx:INFO:	Total # of broken channels: 0
09:10:01:ST3_smx:INFO:	List of broken channels: []
09:10:01:ST3_smx:INFO:	Total # of broken channels: 0
09:10:01:ST3_smx:INFO:	List of broken channels: []
09:10:01:ST3_smx:INFO:	Configuring SMX FAST
09:10:03:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1183.292940 mV
09:10:03:ST3_smx:INFO:		Electrons
09:10:03:ST3_smx:INFO:	# loops 0
09:10:05:ST3_smx:INFO:	# loops 1
09:10:06:ST3_smx:INFO:	# loops 2
09:10:08:ST3_smx:INFO:	# loops 3
09:10:10:ST3_smx:INFO:	# loops 4
09:10:11:ST3_smx:INFO:	Total # of broken channels: 0
09:10:11:ST3_smx:INFO:	List of broken channels: []
09:10:11:ST3_smx:INFO:	Total # of broken channels: 6
09:10:11:ST3_smx:INFO:	List of broken channels: [55, 71, 77, 87, 97, 101]
09:10:12:ST3_smx:INFO:	Configuring SMX FAST
09:10:14:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1224.468235 mV
09:10:14:ST3_smx:INFO:		Electrons
09:10:14:ST3_smx:INFO:	# loops 0
09:10:15:ST3_smx:INFO:	# loops 1
09:10:17:ST3_smx:INFO:	# loops 2
09:10:18:ST3_smx:INFO:	# loops 3
09:10:20:ST3_smx:INFO:	# loops 4
09:10:22:ST3_smx:INFO:	Total # of broken channels: 0
09:10:22:ST3_smx:INFO:	List of broken channels: []
09:10:22:ST3_smx:INFO:	Total # of broken channels: 1
09:10:22:ST3_smx:INFO:	List of broken channels: [23]
09:10:22:ST3_smx:INFO:	Configuring SMX FAST
09:10:24:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1189.190035 mV
09:10:24:ST3_smx:INFO:		Electrons
09:10:24:ST3_smx:INFO:	# loops 0
09:10:26:ST3_smx:INFO:	# loops 1
09:10:27:ST3_smx:INFO:	# loops 2
09:10:29:ST3_smx:INFO:	# loops 3
09:10:30:ST3_smx:INFO:	# loops 4
09:10:32:ST3_smx:INFO:	Total # of broken channels: 0
09:10:32:ST3_smx:INFO:	List of broken channels: []
09:10:32:ST3_smx:INFO:	Total # of broken channels: 0
09:10:32:ST3_smx:INFO:	List of broken channels: []
09:10:32:ST3_smx:INFO:	Configuring SMX FAST
09:10:34:ST3_smx:INFO:	chip: 12-5 	 18.745682 C 	 1247.887635 mV
09:10:34:ST3_smx:INFO:		Electrons
09:10:34:ST3_smx:INFO:	# loops 0
09:10:36:ST3_smx:INFO:	# loops 1
09:10:38:ST3_smx:INFO:	# loops 2
09:10:39:ST3_smx:INFO:	# loops 3
09:10:41:ST3_smx:INFO:	# loops 4
09:10:42:ST3_smx:INFO:	Total # of broken channels: 0
09:10:42:ST3_smx:INFO:	List of broken channels: []
09:10:42:ST3_smx:INFO:	Total # of broken channels: 0
09:10:42:ST3_smx:INFO:	List of broken channels: []
09:10:43:ST3_smx:INFO:	Configuring SMX FAST
09:10:44:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1171.483840 mV
09:10:44:ST3_smx:INFO:		Electrons
09:10:44:ST3_smx:INFO:	# loops 0
09:10:46:ST3_smx:INFO:	# loops 1
09:10:48:ST3_smx:INFO:	# loops 2
09:10:49:ST3_smx:INFO:	# loops 3
09:10:51:ST3_smx:INFO:	# loops 4
09:10:52:ST3_smx:INFO:	Total # of broken channels: 0
09:10:52:ST3_smx:INFO:	List of broken channels: []
09:10:52:ST3_smx:INFO:	Total # of broken channels: 0
09:10:52:ST3_smx:INFO:	List of broken channels: []
09:10:53:ST3_smx:INFO:	Configuring SMX FAST
09:10:55:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1195.082160 mV
09:10:55:ST3_smx:INFO:		Electrons
09:10:55:ST3_smx:INFO:	# loops 0
09:10:56:ST3_smx:INFO:	# loops 1
09:10:58:ST3_smx:INFO:	# loops 2
09:11:00:ST3_smx:INFO:	# loops 3
09:11:01:ST3_smx:INFO:	# loops 4
09:11:03:ST3_smx:INFO:	Total # of broken channels: 0
09:11:03:ST3_smx:INFO:	List of broken channels: []
09:11:03:ST3_smx:INFO:	Total # of broken channels: 0
09:11:03:ST3_smx:INFO:	List of broken channels: []
09:11:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:11:04:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  31.4 | 1212.7
09:11:04:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1224.5
09:11:04:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  40.9 | 1183.3
09:11:05:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  28.2 | 1224.5
09:11:05:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  37.7 | 1189.2
09:11:05:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |  18.7 | 1253.7
09:11:05:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  47.3 | 1171.5
09:11:06:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  34.6 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_05-09_08_58
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 1088
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	21322

MODULE_NAME:	L4DL200116 M4DL2T1001161A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L4DL200116
MODULE_MODULE:	M4DL2T1001161A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.8100', '1.850', '0.5943']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9800', '1.850', '0.3204']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:11:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:16:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:11:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:17:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2T1001161A2 42 A

09:11:17:ST3_ModuleSelector:INFO:	21322

09:11:18:febtest:INFO:	Testing FEB with SN 1088
09:11:20:smx_tester:INFO:	Scanning setup
09:11:20:elinks:INFO:	Disabling clock on downlink 0
09:11:20:elinks:INFO:	Disabling clock on downlink 1
09:11:20:elinks:INFO:	Disabling clock on downlink 2
09:11:20:elinks:INFO:	Disabling clock on downlink 3
09:11:20:elinks:INFO:	Disabling clock on downlink 4
09:11:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:11:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:20:elinks:INFO:	Disabling clock on downlink 0
09:11:20:elinks:INFO:	Disabling clock on downlink 1
09:11:20:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:elinks:INFO:	Disabling clock on downlink 0
09:11:21:elinks:INFO:	Disabling clock on downlink 1
09:11:21:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:elinks:INFO:	Disabling clock on downlink 0
09:11:21:elinks:INFO:	Disabling clock on downlink 1
09:11:21:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:elinks:INFO:	Disabling clock on downlink 0
09:11:21:elinks:INFO:	Disabling clock on downlink 1
09:11:21:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:setup_element:INFO:	Scanning clock phase
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:21:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:11:21:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:11:21:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:11:21:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
09:11:21:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
09:11:21:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:21:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:21:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:11:22:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:11:22:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________X_________
Clock Delay: 30
09:11:22:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________X_________
Clock Delay: 30
09:11:22:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:11:22:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:11:22:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:11:22:setup_element:INFO:	Scanning data phases
09:11:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:27:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:11:27:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:11:27:setup_element:INFO:	Eye window for uplink 1 : ________XXXX____________________________
Data delay found: 29
09:11:27:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
09:11:27:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXX______________________________
Data delay found: 26
09:11:27:setup_element:INFO:	Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
09:11:27:setup_element:INFO:	Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
09:11:27:setup_element:INFO:	Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
09:11:27:setup_element:INFO:	Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
09:11:27:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
09:11:27:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:11:27:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
09:11:27:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
09:11:27:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXX_________
Data delay found: 8
09:11:27:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
09:11:27:setup_element:INFO:	Eye window for uplink 14: ___________________________XXXXXX_______
Data delay found: 9
09:11:27:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
09:11:27:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:11:27:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:11:27:setup_element:INFO:	Setting the data phase to 29 for uplink 2
09:11:27:setup_element:INFO:	Setting the data phase to 26 for uplink 3
09:11:27:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:11:27:setup_element:INFO:	Setting the data phase to 21 for uplink 5
09:11:27:setup_element:INFO:	Setting the data phase to 22 for uplink 6
09:11:27:setup_element:INFO:	Setting the data phase to 18 for uplink 7
09:11:27:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:11:27:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:11:27:setup_element:INFO:	Setting the data phase to 8 for uplink 10
09:11:27:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:11:27:setup_element:INFO:	Setting the data phase to 8 for uplink 12
09:11:27:setup_element:INFO:	Setting the data phase to 11 for uplink 13
09:11:27:setup_element:INFO:	Setting the data phase to 9 for uplink 14
09:11:27:setup_element:INFO:	Setting the data phase to 11 for uplink 15
09:11:27:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: ________________________________________________________________________________
      Uplink  3: ________________________________________________________________________________
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: ______________________________________________________________________X_________
      Uplink 13: ______________________________________________________________________X_________
      Uplink 14: ______________________________________________________________________XXXXXXXXX_
      Uplink 15: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 36
      Eye Window: ___________________________XXXX_________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 14:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
]
09:11:27:setup_element:INFO:	Beginning SMX ASICs map scan
09:11:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:27:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:11:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:11:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:11:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:11:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:11:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:11:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:11:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:11:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:11:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:11:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:11:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:11:28:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:11:28:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:11:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:11:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:11:30:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: ________________________________________________________________________________
      Uplink  3: ________________________________________________________________________________
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: ______________________________________________________________________X_________
      Uplink 13: ______________________________________________________________________X_________
      Uplink 14: ______________________________________________________________________XXXXXXXXX_
      Uplink 15: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 36
      Eye Window: ___________________________XXXX_________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 14:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______

09:11:30:setup_element:INFO:	Performing Elink synchronization
09:11:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:30:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:11:30:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:30:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
09:11:32:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:11:32:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  28.2 | 1230.3
09:11:32:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1212.7
09:11:32:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  34.6 | 1206.9
09:11:33:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  25.1 | 1247.9
09:11:33:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  40.9 | 1177.4
09:11:33:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |   9.3 | 1277.1
09:11:33:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  44.1 | 1165.6
09:11:33:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  25.1 | 1218.6
09:11:34:ST3_smx:INFO:	Configuring SMX FAST
09:11:36:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1212.728715 mV
09:11:36:ST3_smx:INFO:		Electrons
09:11:36:ST3_smx:INFO:	# loops 0
09:11:38:ST3_smx:INFO:	# loops 1
09:11:39:ST3_smx:INFO:	# loops 2
09:11:41:ST3_smx:INFO:	# loops 3
09:11:43:ST3_smx:INFO:	# loops 4
09:11:44:ST3_smx:INFO:	Total # of broken channels: 0
09:11:44:ST3_smx:INFO:	List of broken channels: []
09:11:44:ST3_smx:INFO:	Total # of broken channels: 0
09:11:44:ST3_smx:INFO:	List of broken channels: []
09:11:45:ST3_smx:INFO:	Configuring SMX FAST
09:11:46:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1224.468235 mV
09:11:46:ST3_smx:INFO:		Electrons
09:11:46:ST3_smx:INFO:	# loops 0
09:11:48:ST3_smx:INFO:	# loops 1
09:11:50:ST3_smx:INFO:	# loops 2
09:11:51:ST3_smx:INFO:	# loops 3
09:11:53:ST3_smx:INFO:	# loops 4
09:11:55:ST3_smx:INFO:	Total # of broken channels: 0
09:11:55:ST3_smx:INFO:	List of broken channels: []
09:11:55:ST3_smx:INFO:	Total # of broken channels: 0
09:11:55:ST3_smx:INFO:	List of broken channels: []
09:11:55:ST3_smx:INFO:	Configuring SMX FAST
09:11:57:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1177.390875 mV
09:11:57:ST3_smx:INFO:		Electrons
09:11:57:ST3_smx:INFO:	# loops 0
09:11:58:ST3_smx:INFO:	# loops 1
09:12:00:ST3_smx:INFO:	# loops 2
09:12:02:ST3_smx:INFO:	# loops 3
09:12:03:ST3_smx:INFO:	# loops 4
09:12:05:ST3_smx:INFO:	Total # of broken channels: 0
09:12:05:ST3_smx:INFO:	List of broken channels: []
09:12:05:ST3_smx:INFO:	Total # of broken channels: 0
09:12:05:ST3_smx:INFO:	List of broken channels: []
09:12:05:ST3_smx:INFO:	Configuring SMX FAST
09:12:07:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1218.600960 mV
09:12:07:ST3_smx:INFO:		Electrons
09:12:07:ST3_smx:INFO:	# loops 0
09:12:09:ST3_smx:INFO:	# loops 1
09:12:10:ST3_smx:INFO:	# loops 2
09:12:12:ST3_smx:INFO:	# loops 3
09:12:13:ST3_smx:INFO:	# loops 4
09:12:15:ST3_smx:INFO:	Total # of broken channels: 0
09:12:15:ST3_smx:INFO:	List of broken channels: []
09:12:15:ST3_smx:INFO:	Total # of broken channels: 0
09:12:15:ST3_smx:INFO:	List of broken channels: []
09:12:15:ST3_smx:INFO:	Configuring SMX FAST
09:12:17:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1189.190035 mV
09:12:17:ST3_smx:INFO:		Electrons
09:12:17:ST3_smx:INFO:	# loops 0
09:12:19:ST3_smx:INFO:	# loops 1
09:12:21:ST3_smx:INFO:	# loops 2
09:12:22:ST3_smx:INFO:	# loops 3
09:12:24:ST3_smx:INFO:	# loops 4
09:12:25:ST3_smx:INFO:	Total # of broken channels: 0
09:12:25:ST3_smx:INFO:	List of broken channels: []
09:12:25:ST3_smx:INFO:	Total # of broken channels: 0
09:12:25:ST3_smx:INFO:	List of broken channels: []
09:12:26:ST3_smx:INFO:	Configuring SMX FAST
09:12:28:ST3_smx:INFO:	chip: 12-5 	 21.902970 C 	 1247.887635 mV
09:12:28:ST3_smx:INFO:		Electrons
09:12:28:ST3_smx:INFO:	# loops 0
09:12:30:ST3_smx:INFO:	# loops 1
09:12:32:ST3_smx:INFO:	# loops 2
09:12:33:ST3_smx:INFO:	# loops 3
09:12:35:ST3_smx:INFO:	# loops 4
09:12:37:ST3_smx:INFO:	Total # of broken channels: 0
09:12:37:ST3_smx:INFO:	List of broken channels: []
09:12:37:ST3_smx:INFO:	Total # of broken channels: 0
09:12:37:ST3_smx:INFO:	List of broken channels: []
09:12:37:ST3_smx:INFO:	Configuring SMX FAST
09:12:39:ST3_smx:INFO:	chip: 7-6 	 47.250730 C 	 1171.483840 mV
09:12:39:ST3_smx:INFO:		Electrons
09:12:39:ST3_smx:INFO:	# loops 0
09:12:41:ST3_smx:INFO:	# loops 1
09:12:42:ST3_smx:INFO:	# loops 2
09:12:44:ST3_smx:INFO:	# loops 3
09:12:46:ST3_smx:INFO:	# loops 4
09:12:48:ST3_smx:INFO:	Total # of broken channels: 0
09:12:48:ST3_smx:INFO:	List of broken channels: []
09:12:48:ST3_smx:INFO:	Total # of broken channels: 0
09:12:48:ST3_smx:INFO:	List of broken channels: []
09:12:48:ST3_smx:INFO:	Configuring SMX FAST
09:12:50:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1195.082160 mV
09:12:50:ST3_smx:INFO:		Electrons
09:12:50:ST3_smx:INFO:	# loops 0
09:12:52:ST3_smx:INFO:	# loops 1
09:12:53:ST3_smx:INFO:	# loops 2
09:12:55:ST3_smx:INFO:	# loops 3
09:12:57:ST3_smx:INFO:	# loops 4
09:12:58:ST3_smx:INFO:	Total # of broken channels: 0
09:12:58:ST3_smx:INFO:	List of broken channels: []
09:12:58:ST3_smx:INFO:	Total # of broken channels: 0
09:12:58:ST3_smx:INFO:	List of broken channels: []
09:12:59:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:13:00:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  34.6 | 1212.7
09:13:00:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1224.5
09:13:00:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  44.1 | 1183.3
09:13:00:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  31.4 | 1224.5
09:13:00:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  40.9 | 1189.2
09:13:01:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |  21.9 | 1253.7
09:13:01:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  47.3 | 1171.5
09:13:01:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  37.7 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_05-09_11_16
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 1088
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	21322

MODULE_NAME:	L4DL200116 M4DL2T1001161A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L4DL200116
MODULE_MODULE:	M4DL2T1001161A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.8150', '1.850', '0.5719']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9900', '1.850', '0.3206']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:14:10:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1088/TestDate_2024_02_05-09_11_16/