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FEB_1089 23.01.24 13:15:24
TextEdit.txt
13:15:21:febtest:INFO: FEB 8-2 selected
13:15:21:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:15:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:15:25:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:15:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:15:25:febtest:INFO: Testing FEB with SN 1089
13:15:26:smx_tester:INFO: Scanning setup
13:15:26:elinks:INFO: Disabling clock on downlink 0
13:15:26:elinks:INFO: Disabling clock on downlink 1
13:15:26:elinks:INFO: Disabling clock on downlink 2
13:15:26:elinks:INFO: Disabling clock on downlink 3
13:15:26:elinks:INFO: Disabling clock on downlink 4
13:15:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:15:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:15:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:15:26:elinks:INFO: Disabling clock on downlink 0
13:15:26:elinks:INFO: Disabling clock on downlink 1
13:15:26:elinks:INFO: Disabling clock on downlink 2
13:15:26:elinks:INFO: Disabling clock on downlink 3
13:15:26:elinks:INFO: Disabling clock on downlink 4
13:15:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:15:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:15:26:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:15:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:15:26:elinks:INFO: Disabling clock on downlink 0
13:15:26:elinks:INFO: Disabling clock on downlink 1
13:15:26:elinks:INFO: Disabling clock on downlink 2
13:15:26:elinks:INFO: Disabling clock on downlink 3
13:15:26:elinks:INFO: Disabling clock on downlink 4
13:15:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:15:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:15:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:15:26:elinks:INFO: Disabling clock on downlink 0
13:15:26:elinks:INFO: Disabling clock on downlink 1
13:15:26:elinks:INFO: Disabling clock on downlink 2
13:15:27:elinks:INFO: Disabling clock on downlink 3
13:15:27:elinks:INFO: Disabling clock on downlink 4
13:15:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:15:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:15:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:15:27:elinks:INFO: Disabling clock on downlink 0
13:15:27:elinks:INFO: Disabling clock on downlink 1
13:15:27:elinks:INFO: Disabling clock on downlink 2
13:15:27:elinks:INFO: Disabling clock on downlink 3
13:15:27:elinks:INFO: Disabling clock on downlink 4
13:15:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:15:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:15:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:15:27:setup_element:INFO: Scanning clock phase
13:15:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:15:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:15:27:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:15:27:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:15:27:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:15:27:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:15:27:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:15:27:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:27:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:27:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXX___
Clock Delay: 34
13:15:27:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXX___
Clock Delay: 34
13:15:27:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:15:27:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:15:27:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:27:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:27:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:27:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:27:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:15:27:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:15:27:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
13:15:27:setup_element:INFO: Scanning data phases
13:15:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:15:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:15:33:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:15:33:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
13:15:33:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
13:15:33:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
13:15:33:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
13:15:33:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________
Data delay found: 25
13:15:33:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX
Data delay found: 20
13:15:33:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
13:15:33:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
13:15:33:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXX____________
Data delay found: 5
13:15:33:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
13:15:33:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXX_______
Data delay found: 9
13:15:33:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
13:15:33:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
13:15:33:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
13:15:33:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________
Data delay found: 8
13:15:33:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______
Data delay found: 10
13:15:33:setup_element:INFO: Setting the data phase to 33 for uplink 0
13:15:33:setup_element:INFO: Setting the data phase to 29 for uplink 1
13:15:33:setup_element:INFO: Setting the data phase to 29 for uplink 2
13:15:33:setup_element:INFO: Setting the data phase to 26 for uplink 3
13:15:33:setup_element:INFO: Setting the data phase to 25 for uplink 4
13:15:33:setup_element:INFO: Setting the data phase to 20 for uplink 5
13:15:33:setup_element:INFO: Setting the data phase to 21 for uplink 6
13:15:33:setup_element:INFO: Setting the data phase to 17 for uplink 7
13:15:33:setup_element:INFO: Setting the data phase to 5 for uplink 8
13:15:33:setup_element:INFO: Setting the data phase to 10 for uplink 9
13:15:33:setup_element:INFO: Setting the data phase to 9 for uplink 10
13:15:33:setup_element:INFO: Setting the data phase to 13 for uplink 11
13:15:33:setup_element:INFO: Setting the data phase to 9 for uplink 12
13:15:33:setup_element:INFO: Setting the data phase to 12 for uplink 13
13:15:33:setup_element:INFO: Setting the data phase to 8 for uplink 14
13:15:33:setup_element:INFO: Setting the data phase to 10 for uplink 15
13:15:33:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ______________________________________________________________________XXXXXXX___
Uplink 3: ______________________________________________________________________XXXXXXX___
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: ________________________________________________________________________XXXXX___
Uplink 7: ________________________________________________________________________XXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 15:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
]
13:15:33:setup_element:INFO: Beginning SMX ASICs map scan
13:15:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:15:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:15:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:15:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:15:33:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:15:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:15:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:15:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:15:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:15:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:15:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:15:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:15:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:15:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:15:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:15:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:15:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:15:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:15:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:15:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:15:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:15:36:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ______________________________________________________________________XXXXXXX___
Uplink 3: ______________________________________________________________________XXXXXXX___
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: ________________________________________________________________________XXXXX___
Uplink 7: ________________________________________________________________________XXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXX___
Uplink 15: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 15:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
13:15:36:setup_element:INFO: Performing Elink synchronization
13:15:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:15:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:15:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:15:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:15:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:15:36:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:15:36:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
13:15:37:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:15:37:febtest:INFO: 1-0 | XA-000-08-002-000-002-110-06 | 63.2 | 1106.2
13:15:37:febtest:INFO: 8-1 | XA-000-08-002-000-002-117-01 | 53.6 | 1130.0
13:15:38:febtest:INFO: 3-2 | XA-000-08-002-000-002-115-01 | 50.4 | 1153.7
13:15:38:febtest:INFO: 10-3 | XA-000-08-002-000-002-112-01 | 25.1 | 1230.3
13:15:38:febtest:INFO: 5-4 | XA-000-08-002-000-002-121-01 | 63.2 | 1106.2
13:15:38:febtest:INFO: 12-5 | XA-000-08-002-000-002-122-01 | 50.4 | 1147.8
13:15:39:febtest:INFO: 7-6 | XA-000-08-002-000-002-111-06 | 60.0 | 1124.0
13:15:39:febtest:INFO: 14-7 | XA-000-08-002-000-002-125-01 | 53.6 | 1130.0
13:15:39:ST3_smx:INFO: Configuring SMX FAST
13:15:41:ST3_smx:INFO: chip: 1-0 63.173842 C 1106.178435 mV
13:15:41:ST3_smx:INFO: Electrons
13:15:41:ST3_smx:INFO: # loops 0
13:15:43:ST3_smx:INFO: # loops 1
13:15:44:ST3_smx:INFO: # loops 2
13:15:46:ST3_smx:INFO: # loops 3
13:15:47:ST3_smx:INFO: # loops 4
13:15:49:ST3_smx:INFO: Total # of broken channels: 0
13:15:49:ST3_smx:INFO: List of broken channels: []
13:15:49:ST3_smx:INFO: Total # of broken channels: 0
13:15:49:ST3_smx:INFO: List of broken channels: []
13:15:50:ST3_smx:INFO: Configuring SMX FAST
13:15:52:ST3_smx:INFO: chip: 8-1 63.173842 C 1106.178435 mV
13:15:52:ST3_smx:INFO: Electrons
13:15:52:ST3_smx:INFO: # loops 0
13:15:53:ST3_smx:INFO: # loops 1
13:15:55:ST3_smx:INFO: # loops 2
13:15:57:ST3_smx:INFO: # loops 3
13:15:58:ST3_smx:INFO: # loops 4
13:16:00:ST3_smx:INFO: Total # of broken channels: 0
13:16:00:ST3_smx:INFO: List of broken channels: []
13:16:00:ST3_smx:INFO: Total # of broken channels: 0
13:16:00:ST3_smx:INFO: List of broken channels: []
13:16:00:ST3_smx:INFO: Configuring SMX FAST
13:16:02:ST3_smx:INFO: chip: 3-2 53.612520 C 1147.806000 mV
13:16:02:ST3_smx:INFO: Electrons
13:16:02:ST3_smx:INFO: # loops 0
13:16:04:ST3_smx:INFO: # loops 1
13:16:06:ST3_smx:INFO: # loops 2
13:16:07:ST3_smx:INFO: # loops 3
13:16:09:ST3_smx:INFO: # loops 4
13:16:11:ST3_smx:INFO: Total # of broken channels: 0
13:16:11:ST3_smx:INFO: List of broken channels: []
13:16:11:ST3_smx:INFO: Total # of broken channels: 0
13:16:11:ST3_smx:INFO: List of broken channels: []
13:16:11:ST3_smx:INFO: Configuring SMX FAST
13:16:13:ST3_smx:INFO: chip: 10-3 40.898880 C 1183.292940 mV
13:16:13:ST3_smx:INFO: Electrons
13:16:13:ST3_smx:INFO: # loops 0
13:16:15:ST3_smx:INFO: # loops 1
13:16:16:ST3_smx:INFO: # loops 2
13:16:18:ST3_smx:INFO: # loops 3
13:16:20:ST3_smx:INFO: # loops 4
13:16:21:ST3_smx:INFO: Total # of broken channels: 0
13:16:21:ST3_smx:INFO: List of broken channels: []
13:16:21:ST3_smx:INFO: Total # of broken channels: 0
13:16:21:ST3_smx:INFO: List of broken channels: []
13:16:22:ST3_smx:INFO: Configuring SMX FAST
13:16:24:ST3_smx:INFO: chip: 5-4 69.560482 C 1094.240115 mV
13:16:24:ST3_smx:INFO: Electrons
13:16:24:ST3_smx:INFO: # loops 0
13:16:25:ST3_smx:INFO: # loops 1
13:16:27:ST3_smx:INFO: # loops 2
13:16:29:ST3_smx:INFO: # loops 3
13:16:30:ST3_smx:INFO: # loops 4
13:16:32:ST3_smx:INFO: Total # of broken channels: 0
13:16:32:ST3_smx:INFO: List of broken channels: []
13:16:32:ST3_smx:INFO: Total # of broken channels: 0
13:16:32:ST3_smx:INFO: List of broken channels: []
13:16:32:ST3_smx:INFO: Configuring SMX FAST
13:16:34:ST3_smx:INFO: chip: 12-5 56.797143 C 1135.937260 mV
13:16:34:ST3_smx:INFO: Electrons
13:16:34:ST3_smx:INFO: # loops 0
13:16:36:ST3_smx:INFO: # loops 1
13:16:37:ST3_smx:INFO: # loops 2
13:16:39:ST3_smx:INFO: # loops 3
13:16:41:ST3_smx:INFO: # loops 4
13:16:42:ST3_smx:INFO: Total # of broken channels: 0
13:16:42:ST3_smx:INFO: List of broken channels: []
13:16:42:ST3_smx:INFO: Total # of broken channels: 0
13:16:42:ST3_smx:INFO: List of broken channels: []
13:16:43:ST3_smx:INFO: Configuring SMX FAST
13:16:45:ST3_smx:INFO: chip: 7-6 69.560482 C 1100.211760 mV
13:16:45:ST3_smx:INFO: Electrons
13:16:45:ST3_smx:INFO: # loops 0
13:16:46:ST3_smx:INFO: # loops 1
13:16:48:ST3_smx:INFO: # loops 2
13:16:49:ST3_smx:INFO: # loops 3
13:16:51:ST3_smx:INFO: # loops 4
13:16:53:ST3_smx:INFO: Total # of broken channels: 0
13:16:53:ST3_smx:INFO: List of broken channels: []
13:16:53:ST3_smx:INFO: Total # of broken channels: 0
13:16:53:ST3_smx:INFO: List of broken channels: []
13:16:53:ST3_smx:INFO: Configuring SMX FAST
13:16:55:ST3_smx:INFO: chip: 14-7 63.173842 C 1112.140140 mV
13:16:55:ST3_smx:INFO: Electrons
13:16:55:ST3_smx:INFO: # loops 0
13:16:57:ST3_smx:INFO: # loops 1
13:16:58:ST3_smx:INFO: # loops 2
13:17:00:ST3_smx:INFO: # loops 3
13:17:02:ST3_smx:INFO: # loops 4
13:17:03:ST3_smx:INFO: Total # of broken channels: 0
13:17:03:ST3_smx:INFO: List of broken channels: []
13:17:03:ST3_smx:INFO: Total # of broken channels: 0
13:17:03:ST3_smx:INFO: List of broken channels: []
13:17:04:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:17:04:febtest:INFO: 1-0 | XA-000-08-002-000-002-110-06 | 63.2 | 1112.1
13:17:04:febtest:INFO: 8-1 | XA-000-08-002-000-002-117-01 | 63.2 | 1106.2
13:17:05:febtest:INFO: 3-2 | XA-000-08-002-000-002-115-01 | 53.6 | 1147.8
13:17:05:febtest:INFO: 10-3 | XA-000-08-002-000-002-112-01 | 40.9 | 1189.2
13:17:05:febtest:INFO: 5-4 | XA-000-08-002-000-002-121-01 | 69.6 | 1094.2
13:17:05:febtest:INFO: 12-5 | XA-000-08-002-000-002-122-01 | 56.8 | 1135.9
13:17:06:febtest:INFO: 7-6 | XA-000-08-002-000-002-111-06 | 69.6 | 1100.2
13:17:06:febtest:INFO: 14-7 | XA-000-08-002-000-002-125-01 | 63.2 | 1118.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_23-13_15_24
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B2010322A2 62 C
FEB_SN : 1089
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '1.5020', '1.847', '1.6170', '7.000', '1.5730', '7.000', '1.5730']
VI_after__Init : ['2.450', '1.9790', '1.850', '0.5865', '7.000', '1.5790', '7.000', '1.5790']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:17:10:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1089/TestDate_2024_01_23-13_15_24/