
FEB_1089 30.01.24 08:28:24
TextEdit.txt
08:28:23:febtest:INFO: FEB 8-2 selected 08:28:23:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:28:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:28:24:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:28:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:28:41:ST3_ModuleSelector:INFO: L4DL200116 M4DL2T2001162A2 62 A 08:28:41:ST3_ModuleSelector:INFO: 10363 08:28:42:febtest:INFO: Testing FEB with SN 1089 08:28:44:smx_tester:INFO: Scanning setup 08:28:44:elinks:INFO: Disabling clock on downlink 0 08:28:44:elinks:INFO: Disabling clock on downlink 1 08:28:44:elinks:INFO: Disabling clock on downlink 2 08:28:44:elinks:INFO: Disabling clock on downlink 3 08:28:44:elinks:INFO: Disabling clock on downlink 4 08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:28:44:elinks:INFO: Disabling clock on downlink 0 08:28:44:elinks:INFO: Disabling clock on downlink 1 08:28:44:elinks:INFO: Disabling clock on downlink 2 08:28:44:elinks:INFO: Disabling clock on downlink 3 08:28:44:elinks:INFO: Disabling clock on downlink 4 08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 08:28:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:28:44:elinks:INFO: Disabling clock on downlink 0 08:28:44:elinks:INFO: Disabling clock on downlink 1 08:28:44:elinks:INFO: Disabling clock on downlink 2 08:28:44:elinks:INFO: Disabling clock on downlink 3 08:28:44:elinks:INFO: Disabling clock on downlink 4 08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:28:44:elinks:INFO: Disabling clock on downlink 0 08:28:44:elinks:INFO: Disabling clock on downlink 1 08:28:44:elinks:INFO: Disabling clock on downlink 2 08:28:44:elinks:INFO: Disabling clock on downlink 3 08:28:44:elinks:INFO: Disabling clock on downlink 4 08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:28:44:elinks:INFO: Disabling clock on downlink 0 08:28:44:elinks:INFO: Disabling clock on downlink 1 08:28:44:elinks:INFO: Disabling clock on downlink 2 08:28:44:elinks:INFO: Disabling clock on downlink 3 08:28:44:elinks:INFO: Disabling clock on downlink 4 08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:28:44:setup_element:INFO: Scanning clock phase 08:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:28:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:28:45:setup_element:INFO: Clock phase scan results for group 0, downlink 1 08:28:45:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:28:45:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:28:45:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:28:45:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:28:45:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:28:45:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:28:45:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:28:45:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:28:45:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:28:45:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:28:45:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:28:45:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:28:45:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:28:45:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:28:45:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:28:45:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:28:45:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1 08:28:45:setup_element:INFO: Scanning data phases 08:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:28:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:28:51:setup_element:INFO: Data phase scan results for group 0, downlink 1 08:28:51:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________ Data delay found: 33 08:28:51:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________ Data delay found: 28 08:28:51:setup_element:INFO: Eye window for uplink 2 : _______XXXX_____________________________ Data delay found: 28 08:28:51:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________ Data delay found: 26 08:28:51:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________ Data delay found: 25 08:28:51:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX Data delay found: 20 08:28:51:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX Data delay found: 20 08:28:51:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXX_ Data delay found: 17 08:28:51:setup_element:INFO: Eye window for uplink 8 : _______________________XXXX_____________ Data delay found: 4 08:28:51:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______ Data delay found: 10 08:28:51:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________ Data delay found: 9 08:28:51:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____ Data delay found: 13 08:28:51:setup_element:INFO: Eye window for uplink 12: ____________________________XXXX________ Data delay found: 9 08:28:51:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXX____ Data delay found: 12 08:28:51:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________ Data delay found: 8 08:28:51:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______ Data delay found: 10 08:28:51:setup_element:INFO: Setting the data phase to 33 for uplink 0 08:28:51:setup_element:INFO: Setting the data phase to 28 for uplink 1 08:28:51:setup_element:INFO: Setting the data phase to 28 for uplink 2 08:28:51:setup_element:INFO: Setting the data phase to 26 for uplink 3 08:28:51:setup_element:INFO: Setting the data phase to 25 for uplink 4 08:28:51:setup_element:INFO: Setting the data phase to 20 for uplink 5 08:28:51:setup_element:INFO: Setting the data phase to 20 for uplink 6 08:28:51:setup_element:INFO: Setting the data phase to 17 for uplink 7 08:28:51:setup_element:INFO: Setting the data phase to 4 for uplink 8 08:28:51:setup_element:INFO: Setting the data phase to 10 for uplink 9 08:28:51:setup_element:INFO: Setting the data phase to 9 for uplink 10 08:28:51:setup_element:INFO: Setting the data phase to 13 for uplink 11 08:28:51:setup_element:INFO: Setting the data phase to 9 for uplink 12 08:28:51:setup_element:INFO: Setting the data phase to 12 for uplink 13 08:28:51:setup_element:INFO: Setting the data phase to 8 for uplink 14 08:28:51:setup_element:INFO: Setting the data phase to 10 for uplink 15 08:28:51:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXX__ Uplink 1: _______________________________________________________________________XXXXXXX__ Uplink 2: ______________________________________________________________________XXXXXXX___ Uplink 3: ______________________________________________________________________XXXXXXX___ Uplink 4: _____________________________________________________________________XXXXXXXX___ Uplink 5: _____________________________________________________________________XXXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ____________________________________________________________________XXXXXXXX____ Uplink 9: ____________________________________________________________________XXXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXXX__ Uplink 11: _____________________________________________________________________XXXXXXXXX__ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 28 Window Length: 36 Eye Window: _______XXXX_____________________________ Uplink 3: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 8: Optimal Phase: 4 Window Length: 36 Eye Window: _______________________XXXX_____________ Uplink 9: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 10: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 11: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 12: Optimal Phase: 9 Window Length: 36 Eye Window: ____________________________XXXX________ Uplink 13: Optimal Phase: 12 Window Length: 34 Eye Window: ______________________________XXXXXX____ Uplink 14: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 15: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ ] 08:28:51:setup_element:INFO: Beginning SMX ASICs map scan 08:28:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:28:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:28:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:28:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:28:51:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:28:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 08:28:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 08:28:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 08:28:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 08:28:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 08:28:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 08:28:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 08:28:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 08:28:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 08:28:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 08:28:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 08:28:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 08:28:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 08:28:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 08:28:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 08:28:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 08:28:54:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXX__ Uplink 1: _______________________________________________________________________XXXXXXX__ Uplink 2: ______________________________________________________________________XXXXXXX___ Uplink 3: ______________________________________________________________________XXXXXXX___ Uplink 4: _____________________________________________________________________XXXXXXXX___ Uplink 5: _____________________________________________________________________XXXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ____________________________________________________________________XXXXXXXX____ Uplink 9: ____________________________________________________________________XXXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXXX__ Uplink 11: _____________________________________________________________________XXXXXXXXX__ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 28 Window Length: 36 Eye Window: _______XXXX_____________________________ Uplink 3: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 8: Optimal Phase: 4 Window Length: 36 Eye Window: _______________________XXXX_____________ Uplink 9: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 10: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 11: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 12: Optimal Phase: 9 Window Length: 36 Eye Window: ____________________________XXXX________ Uplink 13: Optimal Phase: 12 Window Length: 34 Eye Window: ______________________________XXXXXX____ Uplink 14: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 15: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ 08:28:54:setup_element:INFO: Performing Elink synchronization 08:28:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:28:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:28:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:28:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:28:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 08:28:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:28:54:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 08:28:55:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:28:55:febtest:INFO: 1-0 | XA-000-08-002-000-002-110-06 | 60.0 | 1124.0 08:28:56:febtest:INFO: 8-1 | XA-000-08-002-000-002-117-01 | 56.8 | 1130.0 08:28:56:febtest:INFO: 3-2 | XA-000-08-002-000-002-115-01 | 47.3 | 1159.7 08:28:56:febtest:INFO: 10-3 | XA-000-08-002-000-002-112-01 | 28.2 | 1236.2 08:28:56:febtest:INFO: 5-4 | XA-000-08-002-000-002-121-01 | 53.6 | 1141.9 08:28:57:febtest:INFO: 12-5 | XA-000-08-002-000-002-122-01 | 50.4 | 1147.8 08:28:57:febtest:INFO: 7-6 | XA-000-08-002-000-002-111-06 | 53.6 | 1147.8 08:28:57:febtest:INFO: 14-7 | XA-000-08-002-000-002-125-01 | 56.8 | 1135.9 08:28:58:ST3_smx:INFO: Configuring SMX FAST 08:29:00:ST3_smx:INFO: chip: 1-0 59.984250 C 1124.048640 mV 08:29:00:ST3_smx:INFO: Electrons 08:29:00:ST3_smx:INFO: # loops 0 08:29:01:ST3_smx:INFO: # loops 1 08:29:03:ST3_smx:INFO: # loops 2 08:29:04:ST3_smx:INFO: # loops 3 08:29:06:ST3_smx:INFO: # loops 4 08:29:07:ST3_smx:INFO: Total # of broken channels: 1 08:29:07:ST3_smx:INFO: List of broken channels: [95] 08:29:07:ST3_smx:INFO: Total # of broken channels: 1 08:29:07:ST3_smx:INFO: List of broken channels: [95] 08:29:08:ST3_smx:INFO: Configuring SMX FAST 08:29:10:ST3_smx:INFO: chip: 8-1 63.173842 C 1112.140140 mV 08:29:10:ST3_smx:INFO: Electrons 08:29:10:ST3_smx:INFO: # loops 0 08:29:11:ST3_smx:INFO: # loops 1 08:29:13:ST3_smx:INFO: # loops 2 08:29:15:ST3_smx:INFO: # loops 3 08:29:16:ST3_smx:INFO: # loops 4 08:29:18:ST3_smx:INFO: Total # of broken channels: 0 08:29:18:ST3_smx:INFO: List of broken channels: [] 08:29:18:ST3_smx:INFO: Total # of broken channels: 0 08:29:18:ST3_smx:INFO: List of broken channels: [] 08:29:18:ST3_smx:INFO: Configuring SMX FAST 08:29:20:ST3_smx:INFO: chip: 3-2 50.430383 C 1159.654860 mV 08:29:20:ST3_smx:INFO: Electrons 08:29:20:ST3_smx:INFO: # loops 0 08:29:22:ST3_smx:INFO: # loops 1 08:29:23:ST3_smx:INFO: # loops 2 08:29:25:ST3_smx:INFO: # loops 3 08:29:26:ST3_smx:INFO: # loops 4 08:29:28:ST3_smx:INFO: Total # of broken channels: 0 08:29:28:ST3_smx:INFO: List of broken channels: [] 08:29:28:ST3_smx:INFO: Total # of broken channels: 0 08:29:28:ST3_smx:INFO: List of broken channels: [] 08:29:28:ST3_smx:INFO: Configuring SMX FAST 08:29:31:ST3_smx:INFO: chip: 10-3 40.898880 C 1189.190035 mV 08:29:31:ST3_smx:INFO: Electrons 08:29:31:ST3_smx:INFO: # loops 0 08:29:32:ST3_smx:INFO: # loops 1 08:29:34:ST3_smx:INFO: # loops 2 08:29:35:ST3_smx:INFO: # loops 3 08:29:37:ST3_smx:INFO: # loops 4 08:29:39:ST3_smx:INFO: Total # of broken channels: 0 08:29:39:ST3_smx:INFO: List of broken channels: [] 08:29:39:ST3_smx:INFO: Total # of broken channels: 0 08:29:39:ST3_smx:INFO: List of broken channels: [] 08:29:39:ST3_smx:INFO: Configuring SMX FAST 08:29:41:ST3_smx:INFO: chip: 5-4 66.365920 C 1106.178435 mV 08:29:41:ST3_smx:INFO: Electrons 08:29:41:ST3_smx:INFO: # loops 0 08:29:42:ST3_smx:INFO: # loops 1 08:29:44:ST3_smx:INFO: # loops 2 08:29:45:ST3_smx:INFO: # loops 3 08:29:47:ST3_smx:INFO: # loops 4 08:29:49:ST3_smx:INFO: Total # of broken channels: 0 08:29:49:ST3_smx:INFO: List of broken channels: [] 08:29:49:ST3_smx:INFO: Total # of broken channels: 0 08:29:49:ST3_smx:INFO: List of broken channels: [] 08:29:49:ST3_smx:INFO: Configuring SMX FAST 08:29:51:ST3_smx:INFO: chip: 12-5 56.797143 C 1141.874115 mV 08:29:51:ST3_smx:INFO: Electrons 08:29:51:ST3_smx:INFO: # loops 0 08:29:52:ST3_smx:INFO: # loops 1 08:29:54:ST3_smx:INFO: # loops 2 08:29:56:ST3_smx:INFO: # loops 3 08:29:57:ST3_smx:INFO: # loops 4 08:29:59:ST3_smx:INFO: Total # of broken channels: 0 08:29:59:ST3_smx:INFO: List of broken channels: [] 08:29:59:ST3_smx:INFO: Total # of broken channels: 0 08:29:59:ST3_smx:INFO: List of broken channels: [] 08:29:59:ST3_smx:INFO: Configuring SMX FAST 08:30:01:ST3_smx:INFO: chip: 7-6 63.173842 C 1129.995435 mV 08:30:01:ST3_smx:INFO: Electrons 08:30:01:ST3_smx:INFO: # loops 0 08:30:02:ST3_smx:INFO: # loops 1 08:30:04:ST3_smx:INFO: # loops 2 08:30:05:ST3_smx:INFO: # loops 3 08:30:07:ST3_smx:INFO: # loops 4 08:30:09:ST3_smx:INFO: Total # of broken channels: 0 08:30:09:ST3_smx:INFO: List of broken channels: [] 08:30:09:ST3_smx:INFO: Total # of broken channels: 0 08:30:09:ST3_smx:INFO: List of broken channels: [] 08:30:09:ST3_smx:INFO: Configuring SMX FAST 08:30:11:ST3_smx:INFO: chip: 14-7 63.173842 C 1118.096875 mV 08:30:11:ST3_smx:INFO: Electrons 08:30:11:ST3_smx:INFO: # loops 0 08:30:12:ST3_smx:INFO: # loops 1 08:30:14:ST3_smx:INFO: # loops 2 08:30:16:ST3_smx:INFO: # loops 3 08:30:18:ST3_smx:INFO: # loops 4 08:30:19:ST3_smx:INFO: Total # of broken channels: 0 08:30:19:ST3_smx:INFO: List of broken channels: [] 08:30:19:ST3_smx:INFO: Total # of broken channels: 1 08:30:19:ST3_smx:INFO: List of broken channels: [77] 08:30:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:30:20:febtest:INFO: 1-0 | XA-000-08-002-000-002-110-06 | 63.2 | 1124.0 08:30:20:febtest:INFO: 8-1 | XA-000-08-002-000-002-117-01 | 63.2 | 1112.1 08:30:21:febtest:INFO: 3-2 | XA-000-08-002-000-002-115-01 | 53.6 | 1159.7 08:30:21:febtest:INFO: 10-3 | XA-000-08-002-000-002-112-01 | 40.9 | 1189.2 08:30:21:febtest:INFO: 5-4 | XA-000-08-002-000-002-121-01 | 69.6 | 1106.2 08:30:21:febtest:INFO: 12-5 | XA-000-08-002-000-002-122-01 | 56.8 | 1141.9 08:30:22:febtest:INFO: 7-6 | XA-000-08-002-000-002-111-06 | 63.2 | 1124.0 08:30:22:febtest:INFO: 14-7 | XA-000-08-002-000-002-125-01 | 63.2 | 1118.1 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_01_30-08_28_24 OPERATOR : Olga B.; Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4DL200116 M4DL2T2001162A2 62 A FEB_SN : 1089 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 10363 MODULE_NAME: L4DL200116 M4DL2T2001162A2 62 A MODULE_TYPE: MODULE_LADDER: L4DL200116 MODULE_MODULE: M4DL2T2001162A2 MODULE_SIZE: 62 MODULE_GRADE: A --------------------------------------- VI_before_Init : ['2.450', '1.8670', '1.850', '0.4518', '0.000', '0.0000', '7.000', '1.5810'] VI_after__Init : ['2.450', '2.0290', '1.850', '0.5718', '0.000', '0.0000', '7.000', '1.5820'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 08:30:24:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1089/TestDate_2024_01_30-08_28_24/