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FEB_1090 29.01.24 11:14:10
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11:14:08:febtest:INFO: FEB 8-2 selected
11:14:08:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:14:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:14:10:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
11:14:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:14:11:febtest:INFO: Testing FEB with SN 1090
11:14:13:smx_tester:INFO: Scanning setup
11:14:13:elinks:INFO: Disabling clock on downlink 0
11:14:13:elinks:INFO: Disabling clock on downlink 1
11:14:13:elinks:INFO: Disabling clock on downlink 2
11:14:13:elinks:INFO: Disabling clock on downlink 3
11:14:13:elinks:INFO: Disabling clock on downlink 4
11:14:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:14:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:13:elinks:INFO: Disabling clock on downlink 0
11:14:13:elinks:INFO: Disabling clock on downlink 1
11:14:13:elinks:INFO: Disabling clock on downlink 2
11:14:13:elinks:INFO: Disabling clock on downlink 3
11:14:13:elinks:INFO: Disabling clock on downlink 4
11:14:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:14:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:14:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:13:elinks:INFO: Disabling clock on downlink 0
11:14:13:elinks:INFO: Disabling clock on downlink 1
11:14:13:elinks:INFO: Disabling clock on downlink 2
11:14:13:elinks:INFO: Disabling clock on downlink 3
11:14:13:elinks:INFO: Disabling clock on downlink 4
11:14:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:14:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:13:elinks:INFO: Disabling clock on downlink 0
11:14:13:elinks:INFO: Disabling clock on downlink 1
11:14:13:elinks:INFO: Disabling clock on downlink 2
11:14:13:elinks:INFO: Disabling clock on downlink 3
11:14:13:elinks:INFO: Disabling clock on downlink 4
11:14:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:14:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:13:elinks:INFO: Disabling clock on downlink 0
11:14:13:elinks:INFO: Disabling clock on downlink 1
11:14:13:elinks:INFO: Disabling clock on downlink 2
11:14:13:elinks:INFO: Disabling clock on downlink 3
11:14:13:elinks:INFO: Disabling clock on downlink 4
11:14:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:14:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:14:setup_element:INFO: Scanning clock phase
11:14:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:14:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:14:14:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:14:14:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:14:14:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:14:14:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:14:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:14:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:14:14:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:14:14:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:14:14:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:14:14:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
11:14:14:setup_element:INFO: Scanning data phases
11:14:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:14:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:14:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:14:19:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXX________
Data delay found: 9
11:14:19:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXX___
Data delay found: 14
11:14:19:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
11:14:19:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
11:14:19:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
11:14:19:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
11:14:19:setup_element:INFO: Eye window for uplink 14: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
11:14:19:setup_element:INFO: Eye window for uplink 15: XX___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 3
11:14:19:setup_element:INFO: Setting the data phase to 9 for uplink 8
11:14:19:setup_element:INFO: Setting the data phase to 14 for uplink 9
11:14:19:setup_element:INFO: Setting the data phase to 11 for uplink 10
11:14:19:setup_element:INFO: Setting the data phase to 15 for uplink 11
11:14:19:setup_element:INFO: Setting the data phase to 14 for uplink 12
11:14:19:setup_element:INFO: Setting the data phase to 17 for uplink 13
11:14:19:setup_element:INFO: Setting the data phase to 2 for uplink 14
11:14:19:setup_element:INFO: Setting the data phase to 3 for uplink 15
11:14:19:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 8:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 9:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 14:
Optimal Phase: 2
Window Length: 5
Eye Window: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 3
Window Length: 3
Eye Window: XX___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
]
11:14:19:setup_element:INFO: Beginning SMX ASICs map scan
11:14:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:14:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:14:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:14:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:14:19:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
11:14:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:14:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:14:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:14:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:14:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:14:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:14:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:14:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:14:22:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 8:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 9:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 14:
Optimal Phase: 2
Window Length: 5
Eye Window: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 3
Window Length: 3
Eye Window: XX___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
11:14:22:setup_element:INFO: Performing Elink synchronization
11:14:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:14:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:14:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:14:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:14:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:14:22:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
11:14:22:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
11:14:23:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:14:23:febtest:INFO: 8-1 | XA-000-08-002-000-000-189-13 | 34.6 | 1195.1
11:14:23:febtest:INFO: 10-3 | XA-000-08-002-000-000-183-13 | 40.9 | 1183.3
11:14:24:febtest:INFO: 12-5 | XA-000-08-002-000-000-188-13 | 40.9 | 1183.3
11:14:24:febtest:INFO: 14-7 | XA-000-08-002-000-004-040-06 | 18.7 | 1253.7
11:14:24:ST3_smx:INFO: Configuring SMX FAST
11:14:26:ST3_smx:INFO: chip: 8-1 44.073563 C 1165.571835 mV
11:14:26:ST3_smx:INFO: Electrons
11:14:26:ST3_smx:INFO: # loops 0
11:14:28:ST3_smx:INFO: # loops 1
11:14:29:ST3_smx:INFO: # loops 2
11:14:31:ST3_smx:INFO: # loops 3
11:14:33:ST3_smx:INFO: # loops 4
11:14:34:ST3_smx:INFO: Total # of broken channels: 0
11:14:34:ST3_smx:INFO: List of broken channels: []
11:14:34:ST3_smx:INFO: Total # of broken channels: 0
11:14:34:ST3_smx:INFO: List of broken channels: []
11:14:35:ST3_smx:INFO: Configuring SMX FAST
11:14:37:ST3_smx:INFO: chip: 10-3 44.073563 C 1171.483840 mV
11:14:37:ST3_smx:INFO: Electrons
11:14:37:ST3_smx:INFO: # loops 0
11:14:39:ST3_smx:INFO: # loops 1
11:14:41:ST3_smx:INFO: # loops 2
11:14:42:ST3_smx:INFO: # loops 3
11:14:44:ST3_smx:INFO: # loops 4
11:14:46:ST3_smx:INFO: Total # of broken channels: 0
11:14:46:ST3_smx:INFO: List of broken channels: []
11:14:46:ST3_smx:INFO: Total # of broken channels: 0
11:14:46:ST3_smx:INFO: List of broken channels: []
11:14:47:ST3_smx:INFO: Configuring SMX FAST
11:14:49:ST3_smx:INFO: chip: 12-5 44.073563 C 1165.571835 mV
11:14:49:ST3_smx:INFO: Electrons
11:14:49:ST3_smx:INFO: # loops 0
11:14:50:ST3_smx:INFO: # loops 1
11:14:52:ST3_smx:INFO: # loops 2
11:14:53:ST3_smx:INFO: # loops 3
11:14:55:ST3_smx:INFO: # loops 4
11:14:57:ST3_smx:INFO: Total # of broken channels: 0
11:14:57:ST3_smx:INFO: List of broken channels: []
11:14:57:ST3_smx:INFO: Total # of broken channels: 0
11:14:57:ST3_smx:INFO: List of broken channels: []
11:14:58:ST3_smx:INFO: Configuring SMX FAST
11:14:59:ST3_smx:INFO: chip: 14-7 31.389742 C 1212.728715 mV
11:14:59:ST3_smx:INFO: Electrons
11:15:00:ST3_smx:INFO: # loops 0
11:15:01:ST3_smx:INFO: # loops 1
11:15:03:ST3_smx:INFO: # loops 2
11:15:04:ST3_smx:INFO: # loops 3
11:15:06:ST3_smx:INFO: # loops 4
11:15:07:ST3_smx:INFO: Total # of broken channels: 0
11:15:07:ST3_smx:INFO: List of broken channels: []
11:15:07:ST3_smx:INFO: Total # of broken channels: 0
11:15:07:ST3_smx:INFO: List of broken channels: []
11:15:08:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:15:09:febtest:INFO: 8-1 | XA-000-08-002-000-000-189-13 | 44.1 | 1171.5
11:15:09:febtest:INFO: 10-3 | XA-000-08-002-000-000-183-13 | 44.1 | 1171.5
11:15:09:febtest:INFO: 12-5 | XA-000-08-002-000-000-188-13 | 44.1 | 1165.6
11:15:09:febtest:INFO: 14-7 | XA-000-08-002-000-004-040-06 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_29-11_14_10
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D
FEB_SN : 1090
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.9296', '1.850', '1.5680', '0.000', '0.0000', '7.000', '1.5800']
VI_after__Init : ['2.450', '2.0050', '1.850', '0.4454', '0.000', '0.0000', '7.000', '1.5770']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:15:11:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1090/TestDate_2024_01_29-11_14_10/