
FEB_1091 23.01.24 13:33:06
TextEdit.txt
13:33:03:febtest:INFO: FEB 8-2 selected 13:33:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz 13:33:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:33:06:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 13:33:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:33:06:febtest:INFO: Testing FEB with SN 1091 13:33:08:smx_tester:INFO: Scanning setup 13:33:08:elinks:INFO: Disabling clock on downlink 0 13:33:08:elinks:INFO: Disabling clock on downlink 1 13:33:08:elinks:INFO: Disabling clock on downlink 2 13:33:08:elinks:INFO: Disabling clock on downlink 3 13:33:08:elinks:INFO: Disabling clock on downlink 4 13:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:33:08:elinks:INFO: Disabling clock on downlink 0 13:33:08:elinks:INFO: Disabling clock on downlink 1 13:33:08:elinks:INFO: Disabling clock on downlink 2 13:33:08:elinks:INFO: Disabling clock on downlink 3 13:33:08:elinks:INFO: Disabling clock on downlink 4 13:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 13:33:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 13:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:33:08:elinks:INFO: Disabling clock on downlink 0 13:33:08:elinks:INFO: Disabling clock on downlink 1 13:33:08:elinks:INFO: Disabling clock on downlink 2 13:33:08:elinks:INFO: Disabling clock on downlink 3 13:33:08:elinks:INFO: Disabling clock on downlink 4 13:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:33:08:elinks:INFO: Disabling clock on downlink 0 13:33:08:elinks:INFO: Disabling clock on downlink 1 13:33:08:elinks:INFO: Disabling clock on downlink 2 13:33:08:elinks:INFO: Disabling clock on downlink 3 13:33:08:elinks:INFO: Disabling clock on downlink 4 13:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:33:08:elinks:INFO: Disabling clock on downlink 0 13:33:08:elinks:INFO: Disabling clock on downlink 1 13:33:08:elinks:INFO: Disabling clock on downlink 2 13:33:08:elinks:INFO: Disabling clock on downlink 3 13:33:08:elinks:INFO: Disabling clock on downlink 4 13:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:33:08:setup_element:INFO: Scanning clock phase 13:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:33:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:33:09:setup_element:INFO: Clock phase scan results for group 0, downlink 1 13:33:09:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:33:09:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:33:09:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:33:09:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:33:09:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________ Clock Delay: 40 13:33:09:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________ Clock Delay: 40 13:33:09:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:33:09:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:33:09:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:33:09:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 13:33:09:setup_element:INFO: Scanning data phases 13:33:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:33:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:33:14:setup_element:INFO: Data phase scan results for group 0, downlink 1 13:33:14:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________ Data delay found: 35 13:33:14:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________ Data delay found: 31 13:33:14:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________ Data delay found: 32 13:33:14:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________ Data delay found: 29 13:33:14:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________ Data delay found: 28 13:33:14:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________ Data delay found: 24 13:33:14:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________ Data delay found: 22 13:33:14:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX Data delay found: 18 13:33:14:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________ Data delay found: 7 13:33:14:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____ Data delay found: 13 13:33:14:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________ Data delay found: 9 13:33:14:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 13:33:14:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______ Data delay found: 11 13:33:14:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___ Data delay found: 14 13:33:14:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________ Data delay found: 9 13:33:14:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____ Data delay found: 11 13:33:14:setup_element:INFO: Setting the data phase to 35 for uplink 0 13:33:14:setup_element:INFO: Setting the data phase to 31 for uplink 1 13:33:14:setup_element:INFO: Setting the data phase to 32 for uplink 2 13:33:14:setup_element:INFO: Setting the data phase to 29 for uplink 3 13:33:14:setup_element:INFO: Setting the data phase to 28 for uplink 4 13:33:14:setup_element:INFO: Setting the data phase to 24 for uplink 5 13:33:14:setup_element:INFO: Setting the data phase to 22 for uplink 6 13:33:14:setup_element:INFO: Setting the data phase to 18 for uplink 7 13:33:14:setup_element:INFO: Setting the data phase to 7 for uplink 8 13:33:14:setup_element:INFO: Setting the data phase to 13 for uplink 9 13:33:14:setup_element:INFO: Setting the data phase to 9 for uplink 10 13:33:14:setup_element:INFO: Setting the data phase to 12 for uplink 11 13:33:14:setup_element:INFO: Setting the data phase to 11 for uplink 12 13:33:14:setup_element:INFO: Setting the data phase to 14 for uplink 13 13:33:14:setup_element:INFO: Setting the data phase to 9 for uplink 14 13:33:14:setup_element:INFO: Setting the data phase to 11 for uplink 15 13:33:14:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXX_ Uplink 1: ________________________________________________________________________XXXXXXX_ Uplink 2: ________________________________________________________________________XXXXXX__ Uplink 3: ________________________________________________________________________XXXXXX__ Uplink 4: _______________________________________________________________________XXXXXXX__ Uplink 5: _______________________________________________________________________XXXXXXX__ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: ________________________________________________________________________________ Uplink 11: ________________________________________________________________________________ Uplink 12: _______________________________________________________________________XXXXXXX__ Uplink 13: _______________________________________________________________________XXXXXXX__ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 1: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 2: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 3: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 4: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 5: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 8: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 14: Optimal Phase: 9 Window Length: 36 Eye Window: ____________________________XXXX________ Uplink 15: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ ] 13:33:14:setup_element:INFO: Beginning SMX ASICs map scan 13:33:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:33:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:33:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:33:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:33:14:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 13:33:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 13:33:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 13:33:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 13:33:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 13:33:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 13:33:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 13:33:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 13:33:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 13:33:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 13:33:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 13:33:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 13:33:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 13:33:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 13:33:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 13:33:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 13:33:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 13:33:17:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXX_ Uplink 1: ________________________________________________________________________XXXXXXX_ Uplink 2: ________________________________________________________________________XXXXXX__ Uplink 3: ________________________________________________________________________XXXXXX__ Uplink 4: _______________________________________________________________________XXXXXXX__ Uplink 5: _______________________________________________________________________XXXXXXX__ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: ________________________________________________________________________________ Uplink 11: ________________________________________________________________________________ Uplink 12: _______________________________________________________________________XXXXXXX__ Uplink 13: _______________________________________________________________________XXXXXXX__ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 1: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 2: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 3: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 4: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 5: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 8: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 14: Optimal Phase: 9 Window Length: 36 Eye Window: ____________________________XXXX________ Uplink 15: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ 13:33:17:setup_element:INFO: Performing Elink synchronization 13:33:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:33:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:33:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:33:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:33:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 13:33:17:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 13:33:17:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 13:33:18:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 13:33:18:febtest:INFO: 1-0 | XA-000-08-002-000-002-135-07 | 50.4 | 1147.8 13:33:18:febtest:INFO: 8-1 | XA-000-08-002-000-002-155-00 | 31.4 | 1201.0 13:33:18:febtest:INFO: 3-2 | XA-000-08-002-000-002-133-07 | 31.4 | 1212.7 13:33:19:febtest:INFO: 10-3 | XA-000-08-002-000-002-162-09 | 28.2 | 1212.7 13:33:19:febtest:INFO: 5-4 | XA-000-08-002-000-002-132-07 | 31.4 | 1212.7 13:33:19:febtest:INFO: 12-5 | XA-000-08-002-000-002-166-09 | 9.3 | 1294.5 13:33:19:febtest:INFO: 7-6 | XA-000-08-002-000-002-134-07 | 25.1 | 1242.0 13:33:20:febtest:INFO: 14-7 | XA-000-08-002-000-002-107-06 | 47.3 | 1165.6 13:33:20:ST3_smx:INFO: Configuring SMX FAST 13:33:22:ST3_smx:INFO: chip: 1-0 44.073563 C 1171.483840 mV 13:33:22:ST3_smx:INFO: Electrons 13:33:22:ST3_smx:INFO: # loops 0 13:33:23:ST3_smx:INFO: # loops 1 13:33:25:ST3_smx:INFO: # loops 2 13:33:27:ST3_smx:INFO: # loops 3 13:33:28:ST3_smx:INFO: # loops 4 13:33:30:ST3_smx:INFO: Total # of broken channels: 0 13:33:30:ST3_smx:INFO: List of broken channels: [] 13:33:30:ST3_smx:INFO: Total # of broken channels: 0 13:33:30:ST3_smx:INFO: List of broken channels: [] 13:33:31:ST3_smx:INFO: Configuring SMX FAST 13:33:33:ST3_smx:INFO: chip: 8-1 28.225000 C 1218.600960 mV 13:33:33:ST3_smx:INFO: Electrons 13:33:33:ST3_smx:INFO: # loops 0 13:33:34:ST3_smx:INFO: # loops 1 13:33:36:ST3_smx:INFO: # loops 2 13:33:38:ST3_smx:INFO: # loops 3 13:33:39:ST3_smx:INFO: # loops 4 13:33:41:ST3_smx:INFO: Total # of broken channels: 0 13:33:41:ST3_smx:INFO: List of broken channels: [] 13:33:41:ST3_smx:INFO: Total # of broken channels: 0 13:33:41:ST3_smx:INFO: List of broken channels: [] 13:33:42:ST3_smx:INFO: Configuring SMX FAST 13:33:44:ST3_smx:INFO: chip: 3-2 37.726682 C 1200.969315 mV 13:33:44:ST3_smx:INFO: Electrons 13:33:44:ST3_smx:INFO: # loops 0 13:33:46:ST3_smx:INFO: # loops 1 13:33:47:ST3_smx:INFO: # loops 2 13:33:49:ST3_smx:INFO: # loops 3 13:33:51:ST3_smx:INFO: # loops 4 13:33:52:ST3_smx:INFO: Total # of broken channels: 0 13:33:52:ST3_smx:INFO: List of broken channels: [] 13:33:52:ST3_smx:INFO: Total # of broken channels: 0 13:33:52:ST3_smx:INFO: List of broken channels: [] 13:33:53:ST3_smx:INFO: Configuring SMX FAST 13:33:55:ST3_smx:INFO: chip: 10-3 31.389742 C 1212.728715 mV 13:33:55:ST3_smx:INFO: Electrons 13:33:55:ST3_smx:INFO: # loops 0 13:33:57:ST3_smx:INFO: # loops 1 13:33:58:ST3_smx:INFO: # loops 2 13:34:00:ST3_smx:INFO: # loops 3 13:34:02:ST3_smx:INFO: # loops 4 13:34:04:ST3_smx:INFO: Total # of broken channels: 0 13:34:04:ST3_smx:INFO: List of broken channels: [] 13:34:04:ST3_smx:INFO: Total # of broken channels: 0 13:34:04:ST3_smx:INFO: List of broken channels: [] 13:34:04:ST3_smx:INFO: Configuring SMX FAST 13:34:06:ST3_smx:INFO: chip: 5-4 44.073563 C 1183.292940 mV 13:34:06:ST3_smx:INFO: Electrons 13:34:06:ST3_smx:INFO: # loops 0 13:34:08:ST3_smx:INFO: # loops 1 13:34:09:ST3_smx:INFO: # loops 2 13:34:11:ST3_smx:INFO: # loops 3 13:34:13:ST3_smx:INFO: # loops 4 13:34:14:ST3_smx:INFO: Total # of broken channels: 0 13:34:14:ST3_smx:INFO: List of broken channels: [] 13:34:14:ST3_smx:INFO: Total # of broken channels: 0 13:34:14:ST3_smx:INFO: List of broken channels: [] 13:34:15:ST3_smx:INFO: Configuring SMX FAST 13:34:17:ST3_smx:INFO: chip: 12-5 12.438562 C 1288.680240 mV 13:34:17:ST3_smx:INFO: Electrons 13:34:17:ST3_smx:INFO: # loops 0 13:34:19:ST3_smx:INFO: # loops 1 13:34:20:ST3_smx:INFO: # loops 2 13:34:22:ST3_smx:INFO: # loops 3 13:34:24:ST3_smx:INFO: # loops 4 13:34:25:ST3_smx:INFO: Total # of broken channels: 0 13:34:25:ST3_smx:INFO: List of broken channels: [] 13:34:25:ST3_smx:INFO: Total # of broken channels: 0 13:34:25:ST3_smx:INFO: List of broken channels: [] 13:34:26:ST3_smx:INFO: Configuring SMX FAST 13:34:28:ST3_smx:INFO: chip: 7-6 31.389742 C 1224.468235 mV 13:34:28:ST3_smx:INFO: Electrons 13:34:28:ST3_smx:INFO: # loops 0 13:34:30:ST3_smx:INFO: # loops 1 13:34:31:ST3_smx:INFO: # loops 2 13:34:33:ST3_smx:INFO: # loops 3 13:34:35:ST3_smx:INFO: # loops 4 13:34:36:ST3_smx:INFO: Total # of broken channels: 0 13:34:36:ST3_smx:INFO: List of broken channels: [] 13:34:36:ST3_smx:INFO: Total # of broken channels: 0 13:34:36:ST3_smx:INFO: List of broken channels: [] 13:34:37:ST3_smx:INFO: Configuring SMX FAST 13:34:39:ST3_smx:INFO: chip: 14-7 44.073563 C 1177.390875 mV 13:34:39:ST3_smx:INFO: Electrons 13:34:39:ST3_smx:INFO: # loops 0 13:34:41:ST3_smx:INFO: # loops 1 13:34:42:ST3_smx:INFO: # loops 2 13:34:44:ST3_smx:INFO: # loops 3 13:34:46:ST3_smx:INFO: # loops 4 13:34:47:ST3_smx:INFO: Total # of broken channels: 0 13:34:47:ST3_smx:INFO: List of broken channels: [] 13:34:47:ST3_smx:INFO: Total # of broken channels: 0 13:34:47:ST3_smx:INFO: List of broken channels: [] 13:34:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 13:34:48:febtest:INFO: 1-0 | XA-000-08-002-000-002-135-07 | 44.1 | 1171.5 13:34:48:febtest:INFO: 8-1 | XA-000-08-002-000-002-155-00 | 28.2 | 1218.6 13:34:48:febtest:INFO: 3-2 | XA-000-08-002-000-002-133-07 | 37.7 | 1201.0 13:34:49:febtest:INFO: 10-3 | XA-000-08-002-000-002-162-09 | 31.4 | 1212.7 13:34:49:febtest:INFO: 5-4 | XA-000-08-002-000-002-132-07 | 44.1 | 1183.3 13:34:49:febtest:INFO: 12-5 | XA-000-08-002-000-002-166-09 | 12.4 | 1288.7 13:34:49:febtest:INFO: 7-6 | XA-000-08-002-000-002-134-07 | 34.6 | 1224.5 13:34:50:febtest:INFO: 14-7 | XA-000-08-002-000-002-107-06 | 47.3 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_01_23-13_33_06 OPERATOR : Robert V.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL401032 M4UL4B2010322A2 62 C FEB_SN : 1091 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.447', '1.9010', '1.846', '2.2700', '7.001', '1.5810', '7.001', '1.5810'] VI_after__Init : ['2.450', '1.9790', '1.850', '0.5865', '7.000', '1.5790', '7.000', '1.5790'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 13:35:10:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1091/TestDate_2024_01_23-13_33_06/