
FEB_1092 22.01.24 11:05:25
TextEdit.txt
11:05:20:febtest:INFO: FEB 8-2 selected 11:05:20:smx_tester:INFO: Setting Elink clock mode to 160 MHz 11:05:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:05:25:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 11:05:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:05:25:febtest:INFO: Testing FEB with SN 1092 11:05:26:smx_tester:INFO: Scanning setup 11:05:26:elinks:INFO: Disabling clock on downlink 0 11:05:26:elinks:INFO: Disabling clock on downlink 1 11:05:26:elinks:INFO: Disabling clock on downlink 2 11:05:26:elinks:INFO: Disabling clock on downlink 3 11:05:26:elinks:INFO: Disabling clock on downlink 4 11:05:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:05:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:26:elinks:INFO: Disabling clock on downlink 0 11:05:26:elinks:INFO: Disabling clock on downlink 1 11:05:26:elinks:INFO: Disabling clock on downlink 2 11:05:26:elinks:INFO: Disabling clock on downlink 3 11:05:26:elinks:INFO: Disabling clock on downlink 4 11:05:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:05:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:05:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:27:elinks:INFO: Disabling clock on downlink 0 11:05:27:elinks:INFO: Disabling clock on downlink 1 11:05:27:elinks:INFO: Disabling clock on downlink 2 11:05:27:elinks:INFO: Disabling clock on downlink 3 11:05:27:elinks:INFO: Disabling clock on downlink 4 11:05:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:05:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:27:elinks:INFO: Disabling clock on downlink 0 11:05:27:elinks:INFO: Disabling clock on downlink 1 11:05:27:elinks:INFO: Disabling clock on downlink 2 11:05:27:elinks:INFO: Disabling clock on downlink 3 11:05:27:elinks:INFO: Disabling clock on downlink 4 11:05:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:05:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:27:elinks:INFO: Disabling clock on downlink 0 11:05:27:elinks:INFO: Disabling clock on downlink 1 11:05:27:elinks:INFO: Disabling clock on downlink 2 11:05:27:elinks:INFO: Disabling clock on downlink 3 11:05:27:elinks:INFO: Disabling clock on downlink 4 11:05:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:05:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:27:setup_element:INFO: Scanning clock phase 11:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:05:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:05:27:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:05:27:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:05:27:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:05:27:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:05:27:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:05:27:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXX________ Clock Delay: 30 11:05:27:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXX________ Clock Delay: 30 11:05:27:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:05:27:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:05:27:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1 11:05:27:setup_element:INFO: Scanning data phases 11:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:05:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:05:32:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:05:32:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXX_______ Data delay found: 10 11:05:32:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_ Data delay found: 16 11:05:32:setup_element:INFO: Eye window for uplink 10: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 2 11:05:32:setup_element:INFO: Eye window for uplink 11: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 2 11:05:32:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____ Data delay found: 13 11:05:32:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_ Data delay found: 16 11:05:32:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____ Data delay found: 12 11:05:32:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___ Data delay found: 14 11:05:32:setup_element:INFO: Setting the data phase to 10 for uplink 8 11:05:32:setup_element:INFO: Setting the data phase to 16 for uplink 9 11:05:32:setup_element:INFO: Setting the data phase to 2 for uplink 10 11:05:32:setup_element:INFO: Setting the data phase to 2 for uplink 11 11:05:32:setup_element:INFO: Setting the data phase to 13 for uplink 12 11:05:32:setup_element:INFO: Setting the data phase to 16 for uplink 13 11:05:32:setup_element:INFO: Setting the data phase to 12 for uplink 14 11:05:32:setup_element:INFO: Setting the data phase to 14 for uplink 15 11:05:32:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 32 Window Length: 73 Eye Windows: Uplink 8: _____________________________________________________________________XXXXXXX____ Uplink 9: _____________________________________________________________________XXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXX____ Uplink 11: _____________________________________________________________________XXXXXXX____ Uplink 12: _____________________________________________________________________XXX________ Uplink 13: _____________________________________________________________________XXX________ Uplink 14: _____________________________________________________________________XXXXXXX____ Uplink 15: _____________________________________________________________________XXXXXXX____ Data phase characteristics: Uplink 8: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 9: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 10: Optimal Phase: 2 Window Length: 6 Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 11: Optimal Phase: 2 Window Length: 6 Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 12: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 13: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 14: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ ] 11:05:32:setup_element:INFO: Beginning SMX ASICs map scan 11:05:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:05:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:05:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:05:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:05:32:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 11:05:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:05:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:05:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:05:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:05:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:05:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:05:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:05:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:05:35:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 73 Eye Windows: Uplink 8: _____________________________________________________________________XXXXXXX____ Uplink 9: _____________________________________________________________________XXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXX____ Uplink 11: _____________________________________________________________________XXXXXXX____ Uplink 12: _____________________________________________________________________XXX________ Uplink 13: _____________________________________________________________________XXX________ Uplink 14: _____________________________________________________________________XXXXXXX____ Uplink 15: _____________________________________________________________________XXXXXXX____ Data phase characteristics: Uplink 8: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 9: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 10: Optimal Phase: 2 Window Length: 6 Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 11: Optimal Phase: 2 Window Length: 6 Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 12: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 13: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 14: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ 11:05:35:setup_element:INFO: Performing Elink synchronization 11:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:05:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:05:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:05:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:05:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:05:35:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] 11:05:35:ST3_emu:INFO: Number of chips: 4 addr | upli | dwnli | grp | uplinks | uplinks_map 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 11:05:36:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 11:05:36:febtest:INFO: 8-1 | XA-000-08-002-001-006-255-05 | 25.1 | 1242.0 11:05:36:febtest:INFO: 10-3 | XA-000-08-002-001-007-004-14 | 31.4 | 1212.7 11:05:36:febtest:INFO: 12-5 | XA-000-08-002-001-008-158-07 | 44.1 | 1177.4 11:05:36:febtest:INFO: 14-7 | XA-000-08-002-001-008-067-15 | 25.1 | 1253.7 11:05:36:ST3_smx:INFO: Configuring SMX FAST 11:05:38:ST3_smx:INFO: chip: 8-1 40.898880 C 1183.292940 mV 11:05:38:ST3_smx:INFO: Electrons 11:05:38:ST3_smx:INFO: # loops 0 11:05:40:ST3_smx:INFO: # loops 1 11:05:42:ST3_smx:INFO: # loops 2 11:05:44:ST3_smx:INFO: # loops 3 11:05:45:ST3_smx:INFO: # loops 4 11:05:47:ST3_smx:INFO: Total # of broken channels: 0 11:05:47:ST3_smx:INFO: List of broken channels: [] 11:05:47:ST3_smx:INFO: Total # of broken channels: 0 11:05:47:ST3_smx:INFO: List of broken channels: [] 11:05:48:ST3_smx:INFO: Configuring SMX FAST 11:05:50:ST3_smx:INFO: chip: 10-3 25.062742 C 1230.330540 mV 11:05:50:ST3_smx:INFO: Electrons 11:05:50:ST3_smx:INFO: # loops 0 11:05:52:ST3_smx:INFO: # loops 1 11:05:53:ST3_smx:INFO: # loops 2 11:05:55:ST3_smx:INFO: # loops 3 11:05:57:ST3_smx:INFO: # loops 4 11:05:58:ST3_smx:INFO: Total # of broken channels: 0 11:05:58:ST3_smx:INFO: List of broken channels: [] 11:05:58:ST3_smx:INFO: Total # of broken channels: 0 11:05:58:ST3_smx:INFO: List of broken channels: [] 11:05:59:ST3_smx:INFO: Configuring SMX FAST 11:06:01:ST3_smx:INFO: chip: 12-5 34.556970 C 1200.969315 mV 11:06:01:ST3_smx:INFO: Electrons 11:06:01:ST3_smx:INFO: # loops 0 11:06:03:ST3_smx:INFO: # loops 1 11:06:05:ST3_smx:INFO: # loops 2 11:06:06:ST3_smx:INFO: # loops 3 11:06:08:ST3_smx:INFO: # loops 4 11:06:10:ST3_smx:INFO: Total # of broken channels: 0 11:06:10:ST3_smx:INFO: List of broken channels: [] 11:06:10:ST3_smx:INFO: Total # of broken channels: 0 11:06:10:ST3_smx:INFO: List of broken channels: [] 11:06:10:ST3_smx:INFO: Configuring SMX FAST 11:06:13:ST3_smx:INFO: chip: 14-7 34.556970 C 1212.728715 mV 11:06:13:ST3_smx:INFO: Electrons 11:06:13:ST3_smx:INFO: # loops 0 11:06:14:ST3_smx:INFO: # loops 1 11:06:16:ST3_smx:INFO: # loops 2 11:06:18:ST3_smx:INFO: # loops 3 11:06:20:ST3_smx:INFO: # loops 4 11:06:21:ST3_smx:INFO: Total # of broken channels: 0 11:06:21:ST3_smx:INFO: List of broken channels: [] 11:06:21:ST3_smx:INFO: Total # of broken channels: 0 11:06:21:ST3_smx:INFO: List of broken channels: [] 11:06:22:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 11:06:22:febtest:INFO: 8-1 | XA-000-08-002-001-006-255-05 | 40.9 | 1183.3 11:06:22:febtest:INFO: 10-3 | XA-000-08-002-001-007-004-14 | 25.1 | 1236.2 11:06:22:febtest:INFO: 12-5 | XA-000-08-002-001-008-158-07 | 37.7 | 1201.0 11:06:23:febtest:INFO: 14-7 | XA-000-08-002-001-008-067-15 | 34.6 | 1212.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_01_22-11_05_25 OPERATOR : Robert V.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 1092 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.449', '0.9288', '1.847', '1.5470', '7.000', '1.5740', '7.000', '1.5740'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 11:06:28:ST3_Shared:INFO: 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