09:33:00:febtest:INFO:	FEB 8-2 selected
09:33:00:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:37:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:37:45:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:37:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:53:ST3_ModuleSelector:INFO:	L4DL600119 M4DL6B0001190B2 124 D

09:38:53:ST3_ModuleSelector:INFO:	06384

09:38:53:febtest:INFO:	Testing FEB with SN 1092
09:38:55:smx_tester:INFO:	Scanning setup
09:38:55:elinks:INFO:	Disabling clock on downlink 0
09:38:55:elinks:INFO:	Disabling clock on downlink 1
09:38:55:elinks:INFO:	Disabling clock on downlink 2
09:38:55:elinks:INFO:	Disabling clock on downlink 3
09:38:55:elinks:INFO:	Disabling clock on downlink 4
09:38:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:38:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:55:elinks:INFO:	Disabling clock on downlink 0
09:38:55:elinks:INFO:	Disabling clock on downlink 1
09:38:55:elinks:INFO:	Disabling clock on downlink 2
09:38:55:elinks:INFO:	Disabling clock on downlink 3
09:38:55:elinks:INFO:	Disabling clock on downlink 4
09:38:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:38:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:55:elinks:INFO:	Disabling clock on downlink 0
09:38:55:elinks:INFO:	Disabling clock on downlink 1
09:38:55:elinks:INFO:	Disabling clock on downlink 2
09:38:55:elinks:INFO:	Disabling clock on downlink 3
09:38:55:elinks:INFO:	Disabling clock on downlink 4
09:38:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:38:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:55:elinks:INFO:	Disabling clock on downlink 0
09:38:55:elinks:INFO:	Disabling clock on downlink 1
09:38:56:elinks:INFO:	Disabling clock on downlink 2
09:38:56:elinks:INFO:	Disabling clock on downlink 3
09:38:56:elinks:INFO:	Disabling clock on downlink 4
09:38:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
09:38:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
09:38:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:56:elinks:INFO:	Disabling clock on downlink 0
09:38:56:elinks:INFO:	Disabling clock on downlink 1
09:38:56:elinks:INFO:	Disabling clock on downlink 2
09:38:56:elinks:INFO:	Disabling clock on downlink 3
09:38:56:elinks:INFO:	Disabling clock on downlink 4
09:38:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:38:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:56:setup_element:INFO:	Scanning clock phase
09:38:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:38:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:38:56:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
09:38:56:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:38:56:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:38:56:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:38:56:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:38:56:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:38:56:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:38:56:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:38:56:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:38:56:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:38:56:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:38:56:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:38:56:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:38:56:setup_element:INFO:	Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:38:56:setup_element:INFO:	Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:38:56:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:38:56:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:38:56:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 3
09:38:56:setup_element:INFO:	Scanning data phases
09:38:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:38:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:39:02:setup_element:INFO:	Data phase scan results for group 0, downlink 3
09:39:02:setup_element:INFO:	Eye window for uplink 16: _________________XXXXX__________________
Data delay found: 39
09:39:02:setup_element:INFO:	Eye window for uplink 17: _____________XXXXX______________________
Data delay found: 35
09:39:02:setup_element:INFO:	Eye window for uplink 18: __________XXXXXX________________________
Data delay found: 32
09:39:02:setup_element:INFO:	Eye window for uplink 19: ________XXXXX___________________________
Data delay found: 30
09:39:02:setup_element:INFO:	Eye window for uplink 20: _______XXXXX____________________________
Data delay found: 29
09:39:02:setup_element:INFO:	Eye window for uplink 21: ______XXXXX_____________________________
Data delay found: 28
09:39:02:setup_element:INFO:	Eye window for uplink 22: ____XXXX________________________________
Data delay found: 25
09:39:02:setup_element:INFO:	Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
09:39:02:setup_element:INFO:	Eye window for uplink 24: __________________________________XXXXXX
Data delay found: 16
09:39:02:setup_element:INFO:	Eye window for uplink 25: XXXX___________________________________X
Data delay found: 21
09:39:02:setup_element:INFO:	Eye window for uplink 26: _______________________________XXXXX____
Data delay found: 13
09:39:02:setup_element:INFO:	Eye window for uplink 27: X__________________________________XXXXX
Data delay found: 17
09:39:02:setup_element:INFO:	Eye window for uplink 28: X__________________________________XXXXX
Data delay found: 17
09:39:02:setup_element:INFO:	Eye window for uplink 29: XXX__________________________________XXX
Data delay found: 19
09:39:02:setup_element:INFO:	Eye window for uplink 30: __________________________________XXXXXX
Data delay found: 16
09:39:02:setup_element:INFO:	Eye window for uplink 31: ________________________________XXXXXX__
Data delay found: 14
09:39:02:setup_element:INFO:	Setting the data phase to 39 for uplink 16
09:39:02:setup_element:INFO:	Setting the data phase to 35 for uplink 17
09:39:02:setup_element:INFO:	Setting the data phase to 32 for uplink 18
09:39:02:setup_element:INFO:	Setting the data phase to 30 for uplink 19
09:39:02:setup_element:INFO:	Setting the data phase to 29 for uplink 20
09:39:02:setup_element:INFO:	Setting the data phase to 28 for uplink 21
09:39:02:setup_element:INFO:	Setting the data phase to 25 for uplink 22
09:39:02:setup_element:INFO:	Setting the data phase to 23 for uplink 23
09:39:02:setup_element:INFO:	Setting the data phase to 16 for uplink 24
09:39:02:setup_element:INFO:	Setting the data phase to 21 for uplink 25
09:39:02:setup_element:INFO:	Setting the data phase to 13 for uplink 26
09:39:02:setup_element:INFO:	Setting the data phase to 17 for uplink 27
09:39:02:setup_element:INFO:	Setting the data phase to 17 for uplink 28
09:39:02:setup_element:INFO:	Setting the data phase to 19 for uplink 29
09:39:02:setup_element:INFO:	Setting the data phase to 16 for uplink 30
09:39:02:setup_element:INFO:	Setting the data phase to 14 for uplink 31
09:39:02:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 69
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXXX___
      Uplink 17: _____________________________________________________________________XXXXXXXX___
      Uplink 18: ____________________________________________________________________XXXXXXXX____
      Uplink 19: ____________________________________________________________________XXXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ___________________________________________________________________XXXXXXX______
      Uplink 25: ___________________________________________________________________XXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: ___________________________________________________________________XXXXXXX______
      Uplink 31: ___________________________________________________________________XXXXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 18:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 19:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 20:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 21:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 22:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 23:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 24:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 26:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 28:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 29:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 30:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 31:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
]
09:39:02:setup_element:INFO:	Beginning SMX ASICs map scan
09:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:39:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:39:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
09:39:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
09:39:02:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:39:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
09:39:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
09:39:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
09:39:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
09:39:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
09:39:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
09:39:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
09:39:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
09:39:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
09:39:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
09:39:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
09:39:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
09:39:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
09:39:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
09:39:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
09:39:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
09:39:05:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 69
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXXX___
      Uplink 17: _____________________________________________________________________XXXXXXXX___
      Uplink 18: ____________________________________________________________________XXXXXXXX____
      Uplink 19: ____________________________________________________________________XXXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ___________________________________________________________________XXXXXXX______
      Uplink 25: ___________________________________________________________________XXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: ___________________________________________________________________XXXXXXX______
      Uplink 31: ___________________________________________________________________XXXXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 18:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 19:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 20:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 21:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 22:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 23:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 24:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 26:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 28:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 29:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 30:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 31:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__

09:39:05:setup_element:INFO:	Performing Elink synchronization
09:39:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:39:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:39:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
09:39:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
09:39:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
09:39:05:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:39:05:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  3  |  0  |     [17]     |  [(0, 17), (1, 16)]
   1  |   [0]   |  3  |  0  |     [24]     |  [(0, 24), (1, 25)]
   2  |   [0]   |  3  |  0  |     [19]     |  [(0, 19), (1, 18)]
   3  |   [0]   |  3  |  0  |     [26]     |  [(0, 26), (1, 27)]
   4  |   [0]   |  3  |  0  |     [21]     |  [(0, 21), (1, 20)]
   5  |   [0]   |  3  |  0  |     [28]     |  [(0, 28), (1, 29)]
   6  |   [0]   |  3  |  0  |     [23]     |  [(0, 23), (1, 22)]
   7  |   [0]   |  3  |  0  |     [30]     |  [(0, 30), (1, 31)]
09:39:06:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:39:06:febtest:INFO:	17-0 | XA-000-08-002-001-006-248-05 |  21.9 | 1242.0
09:39:06:febtest:INFO:	24-1 | XA-000-08-002-001-006-255-05 |  21.9 | 1242.0
09:39:07:febtest:INFO:	19-2 | XA-000-08-002-001-006-244-05 |  28.2 | 1224.5
09:39:07:febtest:INFO:	26-3 | XA-000-08-002-001-007-004-14 |  31.4 | 1206.9
09:39:07:febtest:INFO:	21-4 | XA-000-08-002-001-006-249-05 |  28.2 | 1247.9
09:39:07:febtest:INFO:	28-5 | XA-000-08-002-001-008-158-07 |  40.9 | 1177.4
09:39:08:febtest:INFO:	23-6 | XA-000-08-002-001-007-003-14 |  37.7 | 1183.3
09:39:08:febtest:INFO:	30-7 | XA-000-08-002-001-008-067-15 |  21.9 | 1253.7
09:39:08:ST3_smx:INFO:	Configuring SMX FAST
09:39:10:ST3_smx:INFO:	chip: 17-0 	 28.225000 C 	 1218.600960 mV
09:39:10:ST3_smx:INFO:		Electrons
09:39:10:ST3_smx:INFO:	# loops 0
09:39:12:ST3_smx:INFO:	# loops 1
09:39:14:ST3_smx:INFO:	# loops 2
09:39:15:ST3_smx:INFO:	# loops 3
09:39:17:ST3_smx:INFO:	# loops 4
09:39:19:ST3_smx:INFO:	Total # of broken channels: 0
09:39:19:ST3_smx:INFO:	List of broken channels: []
09:39:19:ST3_smx:INFO:	Total # of broken channels: 1
09:39:19:ST3_smx:INFO:	List of broken channels: [0]
09:39:19:ST3_smx:INFO:	Configuring SMX FAST
09:39:21:ST3_smx:INFO:	chip: 24-1 	 37.726682 C 	 1189.190035 mV
09:39:21:ST3_smx:INFO:		Electrons
09:39:21:ST3_smx:INFO:	# loops 0
09:39:23:ST3_smx:INFO:	# loops 1
09:39:24:ST3_smx:INFO:	# loops 2
09:39:26:ST3_smx:INFO:	# loops 3
09:39:28:ST3_smx:INFO:	# loops 4
09:39:29:ST3_smx:INFO:	Total # of broken channels: 0
09:39:29:ST3_smx:INFO:	List of broken channels: []
09:39:29:ST3_smx:INFO:	Total # of broken channels: 0
09:39:29:ST3_smx:INFO:	List of broken channels: []
09:39:30:ST3_smx:INFO:	Configuring SMX FAST
09:39:31:ST3_smx:INFO:	chip: 19-2 	 37.726682 C 	 1189.190035 mV
09:39:31:ST3_smx:INFO:		Electrons
09:39:32:ST3_smx:INFO:	# loops 0
09:39:33:ST3_smx:INFO:	# loops 1
09:39:35:ST3_smx:INFO:	# loops 2
09:39:36:ST3_smx:INFO:	# loops 3
09:39:38:ST3_smx:INFO:	# loops 4
09:39:40:ST3_smx:INFO:	Total # of broken channels: 0
09:39:40:ST3_smx:INFO:	List of broken channels: []
09:39:40:ST3_smx:INFO:	Total # of broken channels: 0
09:39:40:ST3_smx:INFO:	List of broken channels: []
09:39:40:ST3_smx:INFO:	Configuring SMX FAST
09:39:42:ST3_smx:INFO:	chip: 26-3 	 25.062742 C 	 1230.330540 mV
09:39:42:ST3_smx:INFO:		Electrons
09:39:42:ST3_smx:INFO:	# loops 0
09:39:44:ST3_smx:INFO:	# loops 1
09:39:45:ST3_smx:INFO:	# loops 2
09:39:47:ST3_smx:INFO:	# loops 3
09:39:49:ST3_smx:INFO:	# loops 4
09:39:50:ST3_smx:INFO:	Total # of broken channels: 0
09:39:50:ST3_smx:INFO:	List of broken channels: []
09:39:50:ST3_smx:INFO:	Total # of broken channels: 0
09:39:50:ST3_smx:INFO:	List of broken channels: []
09:39:51:ST3_smx:INFO:	Configuring SMX FAST
09:39:53:ST3_smx:INFO:	chip: 21-4 	 25.062742 C 	 1277.050060 mV
09:39:53:ST3_smx:INFO:		Electrons
09:39:53:ST3_smx:INFO:	# loops 0
09:39:54:ST3_smx:INFO:	# loops 1
09:39:56:ST3_smx:INFO:	# loops 2
09:39:57:ST3_smx:INFO:	# loops 3
09:39:59:ST3_smx:INFO:	# loops 4
09:40:01:ST3_smx:INFO:	Total # of broken channels: 0
09:40:01:ST3_smx:INFO:	List of broken channels: []
09:40:01:ST3_smx:INFO:	Total # of broken channels: 0
09:40:01:ST3_smx:INFO:	List of broken channels: []
09:40:01:ST3_smx:INFO:	Configuring SMX FAST
09:40:03:ST3_smx:INFO:	chip: 28-5 	 37.726682 C 	 1200.969315 mV
09:40:03:ST3_smx:INFO:		Electrons
09:40:03:ST3_smx:INFO:	# loops 0
09:40:05:ST3_smx:INFO:	# loops 1
09:40:06:ST3_smx:INFO:	# loops 2
09:40:08:ST3_smx:INFO:	# loops 3
09:40:10:ST3_smx:INFO:	# loops 4
09:40:11:ST3_smx:INFO:	Total # of broken channels: 0
09:40:11:ST3_smx:INFO:	List of broken channels: []
09:40:11:ST3_smx:INFO:	Total # of broken channels: 0
09:40:11:ST3_smx:INFO:	List of broken channels: []
09:40:11:ST3_smx:INFO:	Configuring SMX FAST
09:40:13:ST3_smx:INFO:	chip: 23-6 	 37.726682 C 	 1195.082160 mV
09:40:13:ST3_smx:INFO:		Electrons
09:40:13:ST3_smx:INFO:	# loops 0
09:40:15:ST3_smx:INFO:	# loops 1
09:40:17:ST3_smx:INFO:	# loops 2
09:40:18:ST3_smx:INFO:	# loops 3
09:40:20:ST3_smx:INFO:	# loops 4
09:40:21:ST3_smx:INFO:	Total # of broken channels: 0
09:40:21:ST3_smx:INFO:	List of broken channels: []
09:40:21:ST3_smx:INFO:	Total # of broken channels: 0
09:40:21:ST3_smx:INFO:	List of broken channels: []
09:40:22:ST3_smx:INFO:	Configuring SMX FAST
09:40:24:ST3_smx:INFO:	chip: 30-7 	 34.556970 C 	 1218.600960 mV
09:40:24:ST3_smx:INFO:		Electrons
09:40:24:ST3_smx:INFO:	# loops 0
09:40:26:ST3_smx:INFO:	# loops 1
09:40:27:ST3_smx:INFO:	# loops 2
09:40:29:ST3_smx:INFO:	# loops 3
09:40:30:ST3_smx:INFO:	# loops 4
09:40:32:ST3_smx:INFO:	Total # of broken channels: 0
09:40:32:ST3_smx:INFO:	List of broken channels: []
09:40:32:ST3_smx:INFO:	Total # of broken channels: 0
09:40:32:ST3_smx:INFO:	List of broken channels: []
09:40:33:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:40:33:febtest:INFO:	17-0 | XA-000-08-002-001-006-248-05 |  31.4 | 1218.6
09:40:33:febtest:INFO:	24-1 | XA-000-08-002-001-006-255-05 |  37.7 | 1189.2
09:40:34:febtest:INFO:	19-2 | XA-000-08-002-001-006-244-05 |  40.9 | 1183.3
09:40:34:febtest:INFO:	26-3 | XA-000-08-002-001-007-004-14 |  28.2 | 1230.3
09:40:34:febtest:INFO:	21-4 | XA-000-08-002-001-006-249-05 |  25.1 | 1277.1
09:40:34:febtest:INFO:	28-5 | XA-000-08-002-001-008-158-07 |  37.7 | 1201.0
09:40:35:febtest:INFO:	23-6 | XA-000-08-002-001-007-003-14 |  40.9 | 1195.1
09:40:35:febtest:INFO:	30-7 | XA-000-08-002-001-008-067-15 |  34.6 | 1218.6
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_26-09_37_45
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6B0001190B2 124 D

FEB_SN : 1092
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	06384

MODULE_NAME:	L4DL600119 M4DL6B0001190B2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.7970', '1.850', '0.4975', '0.000', '0.0000', '7.000', '1.5820']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.4364', '0.000', '0.0000', '7.000', '1.5830']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:41:58:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1092/TestDate_2024_01_26-09_37_45/