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FEB_1093 26.01.24 09:47:51
TextEdit.txt
09:47:46:febtest:INFO: FEB 8-2 selected
09:47:46:smx_tester:INFO: Setting Elink clock mode to 160 MHz
09:47:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:51:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
09:47:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:48:17:ST3_ModuleSelector:INFO: L4DL600119 M4DL6B1001191B2 124 D
09:48:17:ST3_ModuleSelector:INFO: 28164
09:48:17:febtest:INFO: Testing FEB with SN 1093
09:48:19:smx_tester:INFO: Scanning setup
09:48:19:elinks:INFO: Disabling clock on downlink 0
09:48:19:elinks:INFO: Disabling clock on downlink 1
09:48:19:elinks:INFO: Disabling clock on downlink 2
09:48:19:elinks:INFO: Disabling clock on downlink 3
09:48:19:elinks:INFO: Disabling clock on downlink 4
09:48:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:48:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:48:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:48:19:elinks:INFO: Disabling clock on downlink 0
09:48:19:elinks:INFO: Disabling clock on downlink 1
09:48:19:elinks:INFO: Disabling clock on downlink 2
09:48:19:elinks:INFO: Disabling clock on downlink 3
09:48:19:elinks:INFO: Disabling clock on downlink 4
09:48:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:48:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:48:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:48:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:48:19:elinks:INFO: Disabling clock on downlink 0
09:48:19:elinks:INFO: Disabling clock on downlink 1
09:48:19:elinks:INFO: Disabling clock on downlink 2
09:48:19:elinks:INFO: Disabling clock on downlink 3
09:48:19:elinks:INFO: Disabling clock on downlink 4
09:48:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:48:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:48:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:48:19:elinks:INFO: Disabling clock on downlink 0
09:48:19:elinks:INFO: Disabling clock on downlink 1
09:48:19:elinks:INFO: Disabling clock on downlink 2
09:48:20:elinks:INFO: Disabling clock on downlink 3
09:48:20:elinks:INFO: Disabling clock on downlink 4
09:48:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:48:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:48:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:48:20:elinks:INFO: Disabling clock on downlink 0
09:48:20:elinks:INFO: Disabling clock on downlink 1
09:48:20:elinks:INFO: Disabling clock on downlink 2
09:48:20:elinks:INFO: Disabling clock on downlink 3
09:48:20:elinks:INFO: Disabling clock on downlink 4
09:48:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:48:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:48:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:48:20:setup_element:INFO: Scanning clock phase
09:48:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:48:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:48:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:48:20:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:48:20:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:48:20:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:48:20:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:48:20:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:48:20:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:48:20:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:48:20:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:48:20:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:48:20:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
09:48:20:setup_element:INFO: Scanning data phases
09:48:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:48:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:48:26:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:48:26:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:48:26:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
09:48:26:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
09:48:26:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
09:48:26:setup_element:INFO: Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
09:48:26:setup_element:INFO: Eye window for uplink 5 : _XXXX__________________________________X
Data delay found: 21
09:48:26:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
09:48:26:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
09:48:26:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
09:48:26:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
09:48:26:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
09:48:26:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
09:48:26:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
09:48:26:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
09:48:26:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
09:48:26:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
09:48:26:setup_element:INFO: Setting the data phase to 34 for uplink 0
09:48:26:setup_element:INFO: Setting the data phase to 30 for uplink 1
09:48:26:setup_element:INFO: Setting the data phase to 31 for uplink 2
09:48:26:setup_element:INFO: Setting the data phase to 28 for uplink 3
09:48:26:setup_element:INFO: Setting the data phase to 26 for uplink 4
09:48:26:setup_element:INFO: Setting the data phase to 21 for uplink 5
09:48:26:setup_element:INFO: Setting the data phase to 20 for uplink 6
09:48:26:setup_element:INFO: Setting the data phase to 16 for uplink 7
09:48:26:setup_element:INFO: Setting the data phase to 5 for uplink 8
09:48:26:setup_element:INFO: Setting the data phase to 11 for uplink 9
09:48:26:setup_element:INFO: Setting the data phase to 8 for uplink 10
09:48:26:setup_element:INFO: Setting the data phase to 11 for uplink 11
09:48:26:setup_element:INFO: Setting the data phase to 9 for uplink 12
09:48:26:setup_element:INFO: Setting the data phase to 11 for uplink 13
09:48:26:setup_element:INFO: Setting the data phase to 10 for uplink 14
09:48:26:setup_element:INFO: Setting the data phase to 12 for uplink 15
09:48:26:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: _XXXX__________________________________X
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
09:48:26:setup_element:INFO: Beginning SMX ASICs map scan
09:48:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:48:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:48:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:48:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:48:26:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:48:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:48:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:48:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:48:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:48:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:48:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:48:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:48:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:48:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:48:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:48:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:48:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:48:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:48:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:48:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:48:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:48:29:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: _XXXX__________________________________X
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
09:48:29:setup_element:INFO: Performing Elink synchronization
09:48:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:48:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:48:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:48:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:48:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:48:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:48:29:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
09:48:30:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:48:31:febtest:INFO: 1-0 | XA-000-08-002-001-007-022-09 | 37.7 | 1177.4
09:48:31:febtest:INFO: 8-1 | XA-000-08-002-001-007-005-14 | 28.2 | 1218.6
09:48:31:febtest:INFO: 3-2 | XA-000-08-002-001-007-011-14 | 56.8 | 1130.0
09:48:31:febtest:INFO: 10-3 | XA-000-08-002-001-007-015-14 | 50.4 | 1147.8
09:48:32:febtest:INFO: 5-4 | XA-000-08-002-001-007-007-14 | 31.4 | 1218.6
09:48:32:febtest:INFO: 12-5 | XA-000-08-002-001-007-002-14 | 34.6 | 1201.0
09:48:32:febtest:INFO: 7-6 | XA-000-08-002-001-007-008-14 | 40.9 | 1183.3
09:48:32:febtest:INFO: 14-7 | XA-000-08-002-001-007-010-14 | 31.4 | 1218.6
09:48:33:ST3_smx:INFO: Configuring SMX FAST
09:48:35:ST3_smx:INFO: chip: 1-0 40.898880 C 1177.390875 mV
09:48:35:ST3_smx:INFO: Electrons
09:48:35:ST3_smx:INFO: # loops 0
09:48:36:ST3_smx:INFO: # loops 1
09:48:38:ST3_smx:INFO: # loops 2
09:48:40:ST3_smx:INFO: # loops 3
09:48:41:ST3_smx:INFO: # loops 4
09:48:43:ST3_smx:INFO: Total # of broken channels: 0
09:48:43:ST3_smx:INFO: List of broken channels: []
09:48:43:ST3_smx:INFO: Total # of broken channels: 0
09:48:43:ST3_smx:INFO: List of broken channels: []
09:48:44:ST3_smx:INFO: Configuring SMX FAST
09:48:45:ST3_smx:INFO: chip: 8-1 31.389742 C 1206.851500 mV
09:48:45:ST3_smx:INFO: Electrons
09:48:45:ST3_smx:INFO: # loops 0
09:48:47:ST3_smx:INFO: # loops 1
09:48:49:ST3_smx:INFO: # loops 2
09:48:50:ST3_smx:INFO: # loops 3
09:48:52:ST3_smx:INFO: # loops 4
09:48:53:ST3_smx:INFO: Total # of broken channels: 0
09:48:53:ST3_smx:INFO: List of broken channels: []
09:48:53:ST3_smx:INFO: Total # of broken channels: 0
09:48:54:ST3_smx:INFO: List of broken channels: []
09:48:54:ST3_smx:INFO: Configuring SMX FAST
09:48:56:ST3_smx:INFO: chip: 3-2 53.612520 C 1141.874115 mV
09:48:56:ST3_smx:INFO: Electrons
09:48:56:ST3_smx:INFO: # loops 0
09:48:57:ST3_smx:INFO: # loops 1
09:48:59:ST3_smx:INFO: # loops 2
09:49:00:ST3_smx:INFO: # loops 3
09:49:02:ST3_smx:INFO: # loops 4
09:49:04:ST3_smx:INFO: Total # of broken channels: 0
09:49:04:ST3_smx:INFO: List of broken channels: []
09:49:04:ST3_smx:INFO: Total # of broken channels: 0
09:49:04:ST3_smx:INFO: List of broken channels: []
09:49:04:ST3_smx:INFO: Configuring SMX FAST
09:49:06:ST3_smx:INFO: chip: 10-3 50.430383 C 1165.571835 mV
09:49:06:ST3_smx:INFO: Electrons
09:49:06:ST3_smx:INFO: # loops 0
09:49:08:ST3_smx:INFO: # loops 1
09:49:09:ST3_smx:INFO: # loops 2
09:49:11:ST3_smx:INFO: # loops 3
09:49:12:ST3_smx:INFO: # loops 4
09:49:14:ST3_smx:INFO: Total # of broken channels: 0
09:49:14:ST3_smx:INFO: List of broken channels: []
09:49:14:ST3_smx:INFO: Total # of broken channels: 0
09:49:14:ST3_smx:INFO: List of broken channels: []
09:49:14:ST3_smx:INFO: Configuring SMX FAST
09:49:16:ST3_smx:INFO: chip: 5-4 37.726682 C 1200.969315 mV
09:49:16:ST3_smx:INFO: Electrons
09:49:16:ST3_smx:INFO: # loops 0
09:49:18:ST3_smx:INFO: # loops 1
09:49:19:ST3_smx:INFO: # loops 2
09:49:21:ST3_smx:INFO: # loops 3
09:49:22:ST3_smx:INFO: # loops 4
09:49:24:ST3_smx:INFO: Total # of broken channels: 0
09:49:24:ST3_smx:INFO: List of broken channels: []
09:49:24:ST3_smx:INFO: Total # of broken channels: 0
09:49:24:ST3_smx:INFO: List of broken channels: []
09:49:25:ST3_smx:INFO: Configuring SMX FAST
09:49:26:ST3_smx:INFO: chip: 12-5 37.726682 C 1195.082160 mV
09:49:26:ST3_smx:INFO: Electrons
09:49:26:ST3_smx:INFO: # loops 0
09:49:28:ST3_smx:INFO: # loops 1
09:49:30:ST3_smx:INFO: # loops 2
09:49:31:ST3_smx:INFO: # loops 3
09:49:33:ST3_smx:INFO: # loops 4
09:49:34:ST3_smx:INFO: Total # of broken channels: 0
09:49:34:ST3_smx:INFO: List of broken channels: []
09:49:34:ST3_smx:INFO: Total # of broken channels: 0
09:49:34:ST3_smx:INFO: List of broken channels: []
09:49:35:ST3_smx:INFO: Configuring SMX FAST
09:49:37:ST3_smx:INFO: chip: 7-6 47.250730 C 1183.292940 mV
09:49:37:ST3_smx:INFO: Electrons
09:49:37:ST3_smx:INFO: # loops 0
09:49:38:ST3_smx:INFO: # loops 1
09:49:40:ST3_smx:INFO: # loops 2
09:49:41:ST3_smx:INFO: # loops 3
09:49:43:ST3_smx:INFO: # loops 4
09:49:45:ST3_smx:INFO: Total # of broken channels: 0
09:49:45:ST3_smx:INFO: List of broken channels: []
09:49:45:ST3_smx:INFO: Total # of broken channels: 0
09:49:45:ST3_smx:INFO: List of broken channels: []
09:49:45:ST3_smx:INFO: Configuring SMX FAST
09:49:47:ST3_smx:INFO: chip: 14-7 40.898880 C 1195.082160 mV
09:49:47:ST3_smx:INFO: Electrons
09:49:47:ST3_smx:INFO: # loops 0
09:49:50:ST3_smx:INFO: # loops 1
09:49:51:ST3_smx:INFO: # loops 2
09:49:53:ST3_smx:INFO: # loops 3
09:49:54:ST3_smx:INFO: # loops 4
09:49:56:ST3_smx:INFO: Total # of broken channels: 0
09:49:56:ST3_smx:INFO: List of broken channels: []
09:49:56:ST3_smx:INFO: Total # of broken channels: 0
09:49:56:ST3_smx:INFO: List of broken channels: []
09:49:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:49:57:febtest:INFO: 1-0 | XA-000-08-002-001-007-022-09 | 40.9 | 1177.4
09:49:57:febtest:INFO: 8-1 | XA-000-08-002-001-007-005-14 | 31.4 | 1206.9
09:49:58:febtest:INFO: 3-2 | XA-000-08-002-001-007-011-14 | 56.8 | 1141.9
09:49:58:febtest:INFO: 10-3 | XA-000-08-002-001-007-015-14 | 50.4 | 1165.6
09:49:58:febtest:INFO: 5-4 | XA-000-08-002-001-007-007-14 | 40.9 | 1201.0
09:49:58:febtest:INFO: 12-5 | XA-000-08-002-001-007-002-14 | 40.9 | 1195.1
09:49:59:febtest:INFO: 7-6 | XA-000-08-002-001-007-008-14 | 47.3 | 1183.3
09:49:59:febtest:INFO: 14-7 | XA-000-08-002-001-007-010-14 | 40.9 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_26-09_47_51
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6B1001191B2 124 D
FEB_SN : 1093
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 28164
MODULE_NAME: L4DL600119 M4DL6B1001191B2 124 D
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['2.450', '1.9030', '1.850', '0.4951', '0.000', '0.0000', '7.000', '1.5830']
VI_after__Init : ['2.450', '2.0410', '1.850', '0.5484', '0.000', '0.0000', '7.000', '1.5830']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:50:54:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1093/TestDate_2024_01_26-09_47_51/