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FEB_1094 30.01.24 08:31:48
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08:31:45:febtest:INFO: FEB 8-2 selected
08:31:45:smx_tester:INFO: Setting Elink clock mode to 160 MHz
08:31:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:31:48:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
08:31:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:31:49:febtest:INFO: Testing FEB with SN 1094
08:31:50:smx_tester:INFO: Scanning setup
08:31:50:elinks:INFO: Disabling clock on downlink 0
08:31:50:elinks:INFO: Disabling clock on downlink 1
08:31:50:elinks:INFO: Disabling clock on downlink 2
08:31:50:elinks:INFO: Disabling clock on downlink 3
08:31:50:elinks:INFO: Disabling clock on downlink 4
08:31:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:31:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:51:elinks:INFO: Disabling clock on downlink 0
08:31:51:elinks:INFO: Disabling clock on downlink 1
08:31:51:elinks:INFO: Disabling clock on downlink 2
08:31:51:elinks:INFO: Disabling clock on downlink 3
08:31:51:elinks:INFO: Disabling clock on downlink 4
08:31:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:31:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:31:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:51:elinks:INFO: Disabling clock on downlink 0
08:31:51:elinks:INFO: Disabling clock on downlink 1
08:31:51:elinks:INFO: Disabling clock on downlink 2
08:31:51:elinks:INFO: Disabling clock on downlink 3
08:31:51:elinks:INFO: Disabling clock on downlink 4
08:31:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:31:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:51:elinks:INFO: Disabling clock on downlink 0
08:31:51:elinks:INFO: Disabling clock on downlink 1
08:31:51:elinks:INFO: Disabling clock on downlink 2
08:31:51:elinks:INFO: Disabling clock on downlink 3
08:31:51:elinks:INFO: Disabling clock on downlink 4
08:31:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:31:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:51:elinks:INFO: Disabling clock on downlink 0
08:31:51:elinks:INFO: Disabling clock on downlink 1
08:31:51:elinks:INFO: Disabling clock on downlink 2
08:31:51:elinks:INFO: Disabling clock on downlink 3
08:31:51:elinks:INFO: Disabling clock on downlink 4
08:31:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:31:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:51:setup_element:INFO: Scanning clock phase
08:31:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:31:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:31:52:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:31:52:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:31:52:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:31:52:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:31:52:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:31:52:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:31:52:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:31:52:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:31:52:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:31:52:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:31:52:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:31:52:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:31:52:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:31:52:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:31:52:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:31:52:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:31:52:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:31:52:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
08:31:52:setup_element:INFO: Scanning data phases
08:31:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:31:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:31:57:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:31:57:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
08:31:57:setup_element:INFO: Eye window for uplink 1 : ________XXXX____________________________
Data delay found: 29
08:31:57:setup_element:INFO: Eye window for uplink 2 : _________XXXX___________________________
Data delay found: 30
08:31:57:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
08:31:57:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
08:31:57:setup_element:INFO: Eye window for uplink 5 : _XXXXXX_________________________________
Data delay found: 23
08:31:57:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
08:31:57:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
08:31:57:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
08:31:57:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
08:31:57:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
08:31:57:setup_element:INFO: Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
08:31:57:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
08:31:57:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
08:31:57:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
08:31:57:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
08:31:57:setup_element:INFO: Setting the data phase to 34 for uplink 0
08:31:57:setup_element:INFO: Setting the data phase to 29 for uplink 1
08:31:57:setup_element:INFO: Setting the data phase to 30 for uplink 2
08:31:57:setup_element:INFO: Setting the data phase to 28 for uplink 3
08:31:57:setup_element:INFO: Setting the data phase to 28 for uplink 4
08:31:57:setup_element:INFO: Setting the data phase to 23 for uplink 5
08:31:57:setup_element:INFO: Setting the data phase to 21 for uplink 6
08:31:57:setup_element:INFO: Setting the data phase to 17 for uplink 7
08:31:57:setup_element:INFO: Setting the data phase to 6 for uplink 8
08:31:57:setup_element:INFO: Setting the data phase to 11 for uplink 9
08:31:57:setup_element:INFO: Setting the data phase to 8 for uplink 10
08:31:57:setup_element:INFO: Setting the data phase to 12 for uplink 11
08:31:57:setup_element:INFO: Setting the data phase to 8 for uplink 12
08:31:57:setup_element:INFO: Setting the data phase to 11 for uplink 13
08:31:57:setup_element:INFO: Setting the data phase to 9 for uplink 14
08:31:57:setup_element:INFO: Setting the data phase to 11 for uplink 15
08:31:57:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 2:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
]
08:31:57:setup_element:INFO: Beginning SMX ASICs map scan
08:31:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:31:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:31:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:31:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:31:57:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:31:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:31:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:31:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:31:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:31:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:31:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:31:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:31:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:31:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:31:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:31:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:31:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:31:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:31:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:31:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:31:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:32:00:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 2:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
08:32:00:setup_element:INFO: Performing Elink synchronization
08:32:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:32:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:32:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:32:00:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:32:00:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
08:32:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:32:02:febtest:INFO: 1-0 | XA-000-08-002-002-008-005-11 | 37.7 | 1195.1
08:32:02:febtest:INFO: 8-1 | XA-000-08-002-002-008-000-11 | 31.4 | 1218.6
08:32:02:febtest:INFO: 3-2 | XA-000-08-002-002-007-253-09 | 28.2 | 1230.3
08:32:02:febtest:INFO: 10-3 | XA-000-08-002-002-008-003-11 | 21.9 | 1242.0
08:32:03:febtest:INFO: 5-4 | XA-000-08-002-002-008-002-11 | 28.2 | 1236.2
08:32:03:febtest:INFO: 12-5 | XA-000-08-002-002-008-004-11 | 37.7 | 1201.0
08:32:03:febtest:INFO: 7-6 | XA-000-08-002-002-008-001-11 | 50.4 | 1159.7
08:32:03:febtest:INFO: 14-7 | XA-000-08-002-002-007-254-09 | 25.1 | 1236.2
08:32:03:ST3_smx:INFO: Configuring SMX FAST
08:32:05:ST3_smx:INFO: chip: 1-0 44.073563 C 1177.390875 mV
08:32:05:ST3_smx:INFO: Electrons
08:32:05:ST3_smx:INFO: # loops 0
08:32:07:ST3_smx:INFO: # loops 1
08:32:09:ST3_smx:INFO: # loops 2
08:32:10:ST3_smx:INFO: # loops 3
08:32:12:ST3_smx:INFO: # loops 4
08:32:14:ST3_smx:INFO: Total # of broken channels: 0
08:32:14:ST3_smx:INFO: List of broken channels: []
08:32:14:ST3_smx:INFO: Total # of broken channels: 0
08:32:14:ST3_smx:INFO: List of broken channels: []
08:32:14:ST3_smx:INFO: Configuring SMX FAST
08:32:16:ST3_smx:INFO: chip: 8-1 28.225000 C 1230.330540 mV
08:32:16:ST3_smx:INFO: Electrons
08:32:16:ST3_smx:INFO: # loops 0
08:32:18:ST3_smx:INFO: # loops 1
08:32:20:ST3_smx:INFO: # loops 2
08:32:21:ST3_smx:INFO: # loops 3
08:32:23:ST3_smx:INFO: # loops 4
08:32:25:ST3_smx:INFO: Total # of broken channels: 0
08:32:25:ST3_smx:INFO: List of broken channels: []
08:32:25:ST3_smx:INFO: Total # of broken channels: 0
08:32:25:ST3_smx:INFO: List of broken channels: []
08:32:26:ST3_smx:INFO: Configuring SMX FAST
08:32:28:ST3_smx:INFO: chip: 3-2 34.556970 C 1218.600960 mV
08:32:28:ST3_smx:INFO: Electrons
08:32:28:ST3_smx:INFO: # loops 0
08:32:29:ST3_smx:INFO: # loops 1
08:32:31:ST3_smx:INFO: # loops 2
08:32:33:ST3_smx:INFO: # loops 3
08:32:34:ST3_smx:INFO: # loops 4
08:32:36:ST3_smx:INFO: Total # of broken channels: 0
08:32:36:ST3_smx:INFO: List of broken channels: []
08:32:36:ST3_smx:INFO: Total # of broken channels: 0
08:32:36:ST3_smx:INFO: List of broken channels: []
08:32:37:ST3_smx:INFO: Configuring SMX FAST
08:32:39:ST3_smx:INFO: chip: 10-3 34.556970 C 1206.851500 mV
08:32:39:ST3_smx:INFO: Electrons
08:32:39:ST3_smx:INFO: # loops 0
08:32:41:ST3_smx:INFO: # loops 1
08:32:43:ST3_smx:INFO: # loops 2
08:32:44:ST3_smx:INFO: # loops 3
08:32:46:ST3_smx:INFO: # loops 4
08:32:48:ST3_smx:INFO: Total # of broken channels: 0
08:32:48:ST3_smx:INFO: List of broken channels: []
08:32:48:ST3_smx:INFO: Total # of broken channels: 0
08:32:48:ST3_smx:INFO: List of broken channels: []
08:32:49:ST3_smx:INFO: Configuring SMX FAST
08:32:51:ST3_smx:INFO: chip: 5-4 37.726682 C 1206.851500 mV
08:32:51:ST3_smx:INFO: Electrons
08:32:51:ST3_smx:INFO: # loops 0
08:32:53:ST3_smx:INFO: # loops 1
08:32:55:ST3_smx:INFO: # loops 2
08:32:56:ST3_smx:INFO: # loops 3
08:32:58:ST3_smx:INFO: # loops 4
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:00:ST3_smx:INFO: Configuring SMX FAST
08:33:02:ST3_smx:INFO: chip: 12-5 34.556970 C 1206.851500 mV
08:33:02:ST3_smx:INFO: Electrons
08:33:02:ST3_smx:INFO: # loops 0
08:33:04:ST3_smx:INFO: # loops 1
08:33:06:ST3_smx:INFO: # loops 2
08:33:07:ST3_smx:INFO: # loops 3
08:33:09:ST3_smx:INFO: # loops 4
08:33:11:ST3_smx:INFO: Total # of broken channels: 0
08:33:11:ST3_smx:INFO: List of broken channels: []
08:33:11:ST3_smx:INFO: Total # of broken channels: 0
08:33:11:ST3_smx:INFO: List of broken channels: []
08:33:12:ST3_smx:INFO: Configuring SMX FAST
08:33:14:ST3_smx:INFO: chip: 7-6 53.612520 C 1159.654860 mV
08:33:14:ST3_smx:INFO: Electrons
08:33:14:ST3_smx:INFO: # loops 0
08:33:15:ST3_smx:INFO: # loops 1
08:33:17:ST3_smx:INFO: # loops 2
08:33:19:ST3_smx:INFO: # loops 3
08:33:20:ST3_smx:INFO: # loops 4
08:33:22:ST3_smx:INFO: Total # of broken channels: 0
08:33:22:ST3_smx:INFO: List of broken channels: []
08:33:22:ST3_smx:INFO: Total # of broken channels: 1
08:33:22:ST3_smx:INFO: List of broken channels: [28]
08:33:23:ST3_smx:INFO: Configuring SMX FAST
08:33:25:ST3_smx:INFO: chip: 14-7 34.556970 C 1218.600960 mV
08:33:25:ST3_smx:INFO: Electrons
08:33:25:ST3_smx:INFO: # loops 0
08:33:27:ST3_smx:INFO: # loops 1
08:33:28:ST3_smx:INFO: # loops 2
08:33:30:ST3_smx:INFO: # loops 3
08:33:32:ST3_smx:INFO: # loops 4
08:33:33:ST3_smx:INFO: Total # of broken channels: 0
08:33:33:ST3_smx:INFO: List of broken channels: []
08:33:33:ST3_smx:INFO: Total # of broken channels: 0
08:33:33:ST3_smx:INFO: List of broken channels: []
08:33:34:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:33:34:febtest:INFO: 1-0 | XA-000-08-002-002-008-005-11 | 44.1 | 1177.4
08:33:35:febtest:INFO: 8-1 | XA-000-08-002-002-008-000-11 | 28.2 | 1230.3
08:33:35:febtest:INFO: 3-2 | XA-000-08-002-002-007-253-09 | 34.6 | 1218.6
08:33:35:febtest:INFO: 10-3 | XA-000-08-002-002-008-003-11 | 34.6 | 1206.9
08:33:35:febtest:INFO: 5-4 | XA-000-08-002-002-008-002-11 | 37.7 | 1206.9
08:33:36:febtest:INFO: 12-5 | XA-000-08-002-002-008-004-11 | 34.6 | 1206.9
08:33:36:febtest:INFO: 7-6 | XA-000-08-002-002-008-001-11 | 53.6 | 1159.7
08:33:36:febtest:INFO: 14-7 | XA-000-08-002-002-007-254-09 | 34.6 | 1218.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_30-08_31_48
OPERATOR : Olga B.; Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T2001162A2 62 A
FEB_SN : 1094
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '1.8520', '1.850', '2.6350', '0.000', '0.0000', '7.000', '1.5830']
VI_after__Init : ['2.450', '2.0290', '1.850', '0.5718', '0.000', '0.0000', '7.000', '1.5820']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:33:39:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1094/TestDate_2024_01_30-08_31_48/