
FEB_1094 29.01.24 11:11:34
TextEdit.txt
11:11:32:febtest:INFO: FEB 8-2 selected 11:11:32:smx_tester:INFO: Setting Elink clock mode to 160 MHz 11:11:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:11:34:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 11:11:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:11:34:febtest:INFO: Testing FEB with SN 1094 11:11:36:smx_tester:INFO: Scanning setup 11:11:36:elinks:INFO: Disabling clock on downlink 0 11:11:36:elinks:INFO: Disabling clock on downlink 1 11:11:36:elinks:INFO: Disabling clock on downlink 2 11:11:36:elinks:INFO: Disabling clock on downlink 3 11:11:36:elinks:INFO: Disabling clock on downlink 4 11:11:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:11:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:11:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:11:36:elinks:INFO: Disabling clock on downlink 0 11:11:36:elinks:INFO: Disabling clock on downlink 1 11:11:36:elinks:INFO: Disabling clock on downlink 2 11:11:36:elinks:INFO: Disabling clock on downlink 3 11:11:36:elinks:INFO: Disabling clock on downlink 4 11:11:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:11:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:11:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:11:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:11:36:elinks:INFO: Disabling clock on downlink 0 11:11:36:elinks:INFO: Disabling clock on downlink 1 11:11:36:elinks:INFO: Disabling clock on downlink 2 11:11:36:elinks:INFO: Disabling clock on downlink 3 11:11:36:elinks:INFO: Disabling clock on downlink 4 11:11:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:11:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:11:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:11:37:elinks:INFO: Disabling clock on downlink 0 11:11:37:elinks:INFO: Disabling clock on downlink 1 11:11:37:elinks:INFO: Disabling clock on downlink 2 11:11:37:elinks:INFO: Disabling clock on downlink 3 11:11:37:elinks:INFO: Disabling clock on downlink 4 11:11:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:11:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:11:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:11:37:elinks:INFO: Disabling clock on downlink 0 11:11:37:elinks:INFO: Disabling clock on downlink 1 11:11:37:elinks:INFO: Disabling clock on downlink 2 11:11:37:elinks:INFO: Disabling clock on downlink 3 11:11:37:elinks:INFO: Disabling clock on downlink 4 11:11:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:11:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:11:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:11:37:setup_element:INFO: Scanning clock phase 11:11:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:11:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:11:37:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:11:37:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 11:11:37:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 11:11:37:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:11:37:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 11:11:37:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:11:37:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:11:37:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 11:11:37:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 11:11:37:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1 11:11:37:setup_element:INFO: Scanning data phases 11:11:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:11:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:11:42:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:11:42:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 6 11:11:42:setup_element:INFO: Eye window for uplink 9 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 6 11:11:42:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXX_____ Data delay found: 11 11:11:42:setup_element:INFO: Eye window for uplink 11: __________________________________XXXX__ Data delay found: 15 11:11:42:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______ Data delay found: 11 11:11:42:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___ Data delay found: 14 11:11:42:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____ Data delay found: 13 11:11:42:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__ Data delay found: 15 11:11:42:setup_element:INFO: Setting the data phase to 6 for uplink 8 11:11:42:setup_element:INFO: Setting the data phase to 6 for uplink 9 11:11:42:setup_element:INFO: Setting the data phase to 11 for uplink 10 11:11:42:setup_element:INFO: Setting the data phase to 15 for uplink 11 11:11:42:setup_element:INFO: Setting the data phase to 11 for uplink 12 11:11:42:setup_element:INFO: Setting the data phase to 14 for uplink 13 11:11:42:setup_element:INFO: Setting the data phase to 13 for uplink 14 11:11:43:setup_element:INFO: Setting the data phase to 15 for uplink 15 11:11:43:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: _____________________________________________________________________XXXXXXX____ Uplink 11: _____________________________________________________________________XXXXXXX____ Uplink 12: ____________________________________________________________________XXXXXXXX____ Uplink 13: ____________________________________________________________________XXXXXXXX____ Uplink 14: _____________________________________________________________________XXXXXXXXX__ Uplink 15: _____________________________________________________________________XXXXXXXXX__ Data phase characteristics: Uplink 8: Optimal Phase: 6 Window Length: 13 Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 9: Optimal Phase: 6 Window Length: 13 Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 10: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 11: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 14: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 15: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ ] 11:11:43:setup_element:INFO: Beginning SMX ASICs map scan 11:11:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:11:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:11:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:11:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:11:43:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 11:11:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:11:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:11:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:11:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:11:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:11:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:11:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:11:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:11:45:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: _____________________________________________________________________XXXXXXX____ Uplink 11: _____________________________________________________________________XXXXXXX____ Uplink 12: ____________________________________________________________________XXXXXXXX____ Uplink 13: ____________________________________________________________________XXXXXXXX____ Uplink 14: _____________________________________________________________________XXXXXXXXX__ Uplink 15: _____________________________________________________________________XXXXXXXXX__ Data phase characteristics: Uplink 8: Optimal Phase: 6 Window Length: 13 Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 9: Optimal Phase: 6 Window Length: 13 Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 10: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 11: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 14: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 15: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ 11:11:45:setup_element:INFO: Performing Elink synchronization 11:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:11:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:11:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:11:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:11:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:11:45:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] 11:11:45:ST3_emu:INFO: Number of chips: 4 addr | upli | dwnli | grp | uplinks | uplinks_map 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 11:11:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 11:11:46:febtest:INFO: 8-1 | XA-000-08-002-002-008-000-11 | 31.4 | 1212.7 11:11:47:febtest:INFO: 10-3 | XA-000-08-002-002-008-003-11 | 18.7 | 1242.0 11:11:47:febtest:INFO: 12-5 | XA-000-08-002-002-008-004-11 | 34.6 | 1195.1 11:11:47:febtest:INFO: 14-7 | XA-000-08-002-002-007-254-09 | 25.1 | 1236.2 11:11:47:ST3_smx:INFO: Configuring SMX FAST 11:11:49:ST3_smx:INFO: chip: 8-1 28.225000 C 1218.600960 mV 11:11:49:ST3_smx:INFO: Electrons 11:11:49:ST3_smx:INFO: # loops 0 11:11:51:ST3_smx:INFO: # loops 1 11:11:52:ST3_smx:INFO: # loops 2 11:11:54:ST3_smx:INFO: # loops 3 11:11:56:ST3_smx:INFO: # loops 4 11:11:58:ST3_smx:INFO: Total # of broken channels: 0 11:11:58:ST3_smx:INFO: List of broken channels: [] 11:11:58:ST3_smx:INFO: Total # of broken channels: 0 11:11:58:ST3_smx:INFO: List of broken channels: [] 11:11:58:ST3_smx:INFO: Configuring SMX FAST 11:12:00:ST3_smx:INFO: chip: 10-3 31.389742 C 1200.969315 mV 11:12:01:ST3_smx:INFO: Electrons 11:12:01:ST3_smx:INFO: # loops 0 11:12:02:ST3_smx:INFO: # loops 1 11:12:04:ST3_smx:INFO: # loops 2 11:12:06:ST3_smx:INFO: # loops 3 11:12:07:ST3_smx:INFO: # loops 4 11:12:09:ST3_smx:INFO: Total # of broken channels: 0 11:12:09:ST3_smx:INFO: List of broken channels: [] 11:12:09:ST3_smx:INFO: Total # of broken channels: 0 11:12:09:ST3_smx:INFO: List of broken channels: [] 11:12:10:ST3_smx:INFO: Configuring SMX FAST 11:12:12:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV 11:12:12:ST3_smx:INFO: Electrons 11:12:12:ST3_smx:INFO: # loops 0 11:12:14:ST3_smx:INFO: # loops 1 11:12:15:ST3_smx:INFO: # loops 2 11:12:17:ST3_smx:INFO: # loops 3 11:12:19:ST3_smx:INFO: # loops 4 11:12:21:ST3_smx:INFO: Total # of broken channels: 0 11:12:21:ST3_smx:INFO: List of broken channels: [] 11:12:21:ST3_smx:INFO: Total # of broken channels: 0 11:12:21:ST3_smx:INFO: List of broken channels: [] 11:12:21:ST3_smx:INFO: Configuring SMX FAST 11:12:24:ST3_smx:INFO: chip: 14-7 31.389742 C 1212.728715 mV 11:12:24:ST3_smx:INFO: Electrons 11:12:24:ST3_smx:INFO: # loops 0 11:12:25:ST3_smx:INFO: # loops 1 11:12:27:ST3_smx:INFO: # loops 2 11:12:29:ST3_smx:INFO: # loops 3 11:12:30:ST3_smx:INFO: # loops 4 11:12:32:ST3_smx:INFO: Total # of broken channels: 0 11:12:32:ST3_smx:INFO: List of broken channels: [] 11:12:32:ST3_smx:INFO: Total # of broken channels: 0 11:12:32:ST3_smx:INFO: List of broken channels: [] 11:12:33:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 11:12:33:febtest:INFO: 8-1 | XA-000-08-002-002-008-000-11 | 28.2 | 1224.5 11:12:33:febtest:INFO: 10-3 | XA-000-08-002-002-008-003-11 | 31.4 | 1201.0 11:12:33:febtest:INFO: 12-5 | XA-000-08-002-002-008-004-11 | 31.4 | 1201.0 11:12:34:febtest:INFO: 14-7 | XA-000-08-002-002-007-254-09 | 31.4 | 1212.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_01_29-11_11_34 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D FEB_SN : 1094 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '0.9670', '1.850', '1.5540', '0.000', '0.0000', '7.000', '1.5790'] VI_after__Init : ['2.450', '2.0050', '1.850', '0.4454', '0.000', '0.0000', '7.000', '1.5770'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 11:12:59:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1094/TestDate_2024_01_29-11_11_34/