09:09:38:ST3_hmp4040:INFO:	ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
09:09:38:febtest:INFO:	FEB 8-5 selected
09:09:38:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:10:14:febtest:INFO:	FEB 8-2 selected
09:10:14:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:10:20:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:10:20:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:10:20:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:01:ST3_ModuleSelector:INFO:	L4DL600119 M4DL6T0001190A2 124 D

09:11:01:ST3_ModuleSelector:INFO:	26094

09:11:02:febtest:INFO:	Testing FEB with SN 1095
09:11:04:smx_tester:INFO:	Scanning setup
09:11:04:elinks:INFO:	Disabling clock on downlink 0
09:11:04:elinks:INFO:	Disabling clock on downlink 1
09:11:04:elinks:INFO:	Disabling clock on downlink 2
09:11:04:elinks:INFO:	Disabling clock on downlink 3
09:11:04:elinks:INFO:	Disabling clock on downlink 4
09:11:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:11:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:04:elinks:INFO:	Disabling clock on downlink 0
09:11:04:elinks:INFO:	Disabling clock on downlink 1
09:11:04:elinks:INFO:	Disabling clock on downlink 2
09:11:04:elinks:INFO:	Disabling clock on downlink 3
09:11:04:elinks:INFO:	Disabling clock on downlink 4
09:11:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:11:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:11:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:04:elinks:INFO:	Disabling clock on downlink 0
09:11:04:elinks:INFO:	Disabling clock on downlink 1
09:11:04:elinks:INFO:	Disabling clock on downlink 2
09:11:04:elinks:INFO:	Disabling clock on downlink 3
09:11:04:elinks:INFO:	Disabling clock on downlink 4
09:11:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:04:elinks:INFO:	Disabling clock on downlink 0
09:11:04:elinks:INFO:	Disabling clock on downlink 1
09:11:04:elinks:INFO:	Disabling clock on downlink 2
09:11:04:elinks:INFO:	Disabling clock on downlink 3
09:11:04:elinks:INFO:	Disabling clock on downlink 4
09:11:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:11:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:04:elinks:INFO:	Disabling clock on downlink 0
09:11:04:elinks:INFO:	Disabling clock on downlink 1
09:11:04:elinks:INFO:	Disabling clock on downlink 2
09:11:04:elinks:INFO:	Disabling clock on downlink 3
09:11:04:elinks:INFO:	Disabling clock on downlink 4
09:11:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:11:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:04:setup_element:INFO:	Scanning clock phase
09:11:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:05:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:11:05:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:11:05:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:11:05:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:11:05:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:11:05:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:11:05:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:11:05:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:05:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:11:05:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:11:05:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:11:05:setup_element:INFO:	Scanning data phases
09:11:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:10:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:11:10:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:11:10:setup_element:INFO:	Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:11:10:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
09:11:10:setup_element:INFO:	Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
09:11:10:setup_element:INFO:	Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
09:11:10:setup_element:INFO:	Eye window for uplink 5 : _XXXX__________________________________X
Data delay found: 21
09:11:10:setup_element:INFO:	Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
09:11:10:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
09:11:10:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
09:11:10:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:11:10:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
09:11:10:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
09:11:10:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
09:11:10:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
09:11:10:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
09:11:10:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXX_____
Data delay found: 12
09:11:10:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:11:10:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:11:10:setup_element:INFO:	Setting the data phase to 29 for uplink 2
09:11:10:setup_element:INFO:	Setting the data phase to 26 for uplink 3
09:11:10:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:11:10:setup_element:INFO:	Setting the data phase to 21 for uplink 5
09:11:10:setup_element:INFO:	Setting the data phase to 20 for uplink 6
09:11:10:setup_element:INFO:	Setting the data phase to 17 for uplink 7
09:11:10:setup_element:INFO:	Setting the data phase to 6 for uplink 8
09:11:10:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:11:10:setup_element:INFO:	Setting the data phase to 8 for uplink 10
09:11:10:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:11:10:setup_element:INFO:	Setting the data phase to 10 for uplink 12
09:11:10:setup_element:INFO:	Setting the data phase to 13 for uplink 13
09:11:10:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:11:10:setup_element:INFO:	Setting the data phase to 12 for uplink 15
09:11:10:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXX__
      Uplink  7: ________________________________________________________________________XXXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: ________________________________________________________________________XXXXXXX_
      Uplink 15: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: _XXXX__________________________________X
    Uplink 6:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
]
09:11:10:setup_element:INFO:	Beginning SMX ASICs map scan
09:11:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:10:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:10:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:11:10:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:11:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:11:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:11:11:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:11:11:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:11:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:11:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:11:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:11:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:11:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:11:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:11:11:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:11:11:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:11:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:11:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:11:13:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXX__
      Uplink  7: ________________________________________________________________________XXXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: ________________________________________________________________________XXXXXXX_
      Uplink 15: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: _XXXX__________________________________X
    Uplink 6:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____

09:11:13:setup_element:INFO:	Performing Elink synchronization
09:11:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:13:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:11:13:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:13:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
09:11:14:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:11:15:febtest:INFO:	1-0 | XA-000-08-002-001-008-099-01 |  21.9 | 1230.3
09:11:15:febtest:INFO:	8-1 | XA-000-08-002-001-008-156-07 |  15.6 | 1247.9
09:11:15:febtest:INFO:	3-2 | XA-000-08-002-001-008-105-01 |  15.6 | 1242.0
09:11:15:febtest:INFO:	10-3 | XA-000-08-002-001-008-155-07 |  15.6 | 1247.9
09:11:16:febtest:INFO:	5-4 | XA-000-08-002-001-008-078-15 |  18.7 | 1242.0
09:11:16:febtest:INFO:	12-5 | XA-000-08-002-001-008-159-07 |  31.4 | 1201.0
09:11:16:febtest:INFO:	7-6 | XA-000-08-002-001-008-071-15 |  34.6 | 1177.4
09:11:16:febtest:INFO:	14-7 | XA-000-08-002-001-008-154-07 |  25.1 | 1224.5
09:11:17:ST3_smx:INFO:	Configuring SMX FAST
09:11:19:ST3_smx:INFO:	chip: 1-0 	 15.590880 C 	 1247.887635 mV
09:11:19:ST3_smx:INFO:		Electrons
09:11:19:ST3_smx:INFO:	# loops 0
09:11:21:ST3_smx:INFO:	# loops 1
09:11:23:ST3_smx:INFO:	# loops 2
09:11:24:ST3_smx:INFO:	# loops 3
09:11:26:ST3_smx:INFO:	# loops 4
09:11:27:ST3_smx:INFO:	Total # of broken channels: 0
09:11:28:ST3_smx:INFO:	List of broken channels: []
09:11:28:ST3_smx:INFO:	Total # of broken channels: 0
09:11:28:ST3_smx:INFO:	List of broken channels: []
09:11:28:ST3_smx:INFO:	Configuring SMX FAST
09:11:30:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1224.468235 mV
09:11:30:ST3_smx:INFO:		Electrons
09:11:30:ST3_smx:INFO:	# loops 0
09:11:32:ST3_smx:INFO:	# loops 1
09:11:33:ST3_smx:INFO:	# loops 2
09:11:35:ST3_smx:INFO:	# loops 3
09:11:37:ST3_smx:INFO:	# loops 4
09:11:38:ST3_smx:INFO:	Total # of broken channels: 0
09:11:38:ST3_smx:INFO:	List of broken channels: []
09:11:38:ST3_smx:INFO:	Total # of broken channels: 0
09:11:38:ST3_smx:INFO:	List of broken channels: []
09:11:39:ST3_smx:INFO:	Configuring SMX FAST
09:11:41:ST3_smx:INFO:	chip: 3-2 	 28.225000 C 	 1206.851500 mV
09:11:41:ST3_smx:INFO:		Electrons
09:11:41:ST3_smx:INFO:	# loops 0
09:11:42:ST3_smx:INFO:	# loops 1
09:11:44:ST3_smx:INFO:	# loops 2
09:11:46:ST3_smx:INFO:	# loops 3
09:11:47:ST3_smx:INFO:	# loops 4
09:11:49:ST3_smx:INFO:	Total # of broken channels: 0
09:11:49:ST3_smx:INFO:	List of broken channels: []
09:11:49:ST3_smx:INFO:	Total # of broken channels: 0
09:11:49:ST3_smx:INFO:	List of broken channels: []
09:11:49:ST3_smx:INFO:	Configuring SMX FAST
09:11:51:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1218.600960 mV
09:11:51:ST3_smx:INFO:		Electrons
09:11:51:ST3_smx:INFO:	# loops 0
09:11:53:ST3_smx:INFO:	# loops 1
09:11:55:ST3_smx:INFO:	# loops 2
09:11:56:ST3_smx:INFO:	# loops 3
09:11:58:ST3_smx:INFO:	# loops 4
09:11:59:ST3_smx:INFO:	Total # of broken channels: 0
09:11:59:ST3_smx:INFO:	List of broken channels: []
09:11:59:ST3_smx:INFO:	Total # of broken channels: 0
09:11:59:ST3_smx:INFO:	List of broken channels: []
09:12:00:ST3_smx:INFO:	Configuring SMX FAST
09:12:02:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1218.600960 mV
09:12:02:ST3_smx:INFO:		Electrons
09:12:02:ST3_smx:INFO:	# loops 0
09:12:03:ST3_smx:INFO:	# loops 1
09:12:05:ST3_smx:INFO:	# loops 2
09:12:07:ST3_smx:INFO:	# loops 3
09:12:08:ST3_smx:INFO:	# loops 4
09:12:10:ST3_smx:INFO:	Total # of broken channels: 0
09:12:10:ST3_smx:INFO:	List of broken channels: []
09:12:10:ST3_smx:INFO:	Total # of broken channels: 0
09:12:10:ST3_smx:INFO:	List of broken channels: []
09:12:10:ST3_smx:INFO:	Configuring SMX FAST
09:12:12:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1212.728715 mV
09:12:12:ST3_smx:INFO:		Electrons
09:12:12:ST3_smx:INFO:	# loops 0
09:12:14:ST3_smx:INFO:	# loops 1
09:12:15:ST3_smx:INFO:	# loops 2
09:12:17:ST3_smx:INFO:	# loops 3
09:12:19:ST3_smx:INFO:	# loops 4
09:12:20:ST3_smx:INFO:	Total # of broken channels: 0
09:12:20:ST3_smx:INFO:	List of broken channels: []
09:12:20:ST3_smx:INFO:	Total # of broken channels: 0
09:12:20:ST3_smx:INFO:	List of broken channels: []
09:12:21:ST3_smx:INFO:	Configuring SMX FAST
09:12:23:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1195.082160 mV
09:12:23:ST3_smx:INFO:		Electrons
09:12:23:ST3_smx:INFO:	# loops 0
09:12:24:ST3_smx:INFO:	# loops 1
09:12:26:ST3_smx:INFO:	# loops 2
09:12:28:ST3_smx:INFO:	# loops 3
09:12:29:ST3_smx:INFO:	# loops 4
09:12:31:ST3_smx:INFO:	Total # of broken channels: 0
09:12:31:ST3_smx:INFO:	List of broken channels: []
09:12:31:ST3_smx:INFO:	Total # of broken channels: 0
09:12:31:ST3_smx:INFO:	List of broken channels: []
09:12:31:ST3_smx:INFO:	Configuring SMX FAST
09:12:33:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1206.851500 mV
09:12:33:ST3_smx:INFO:		Electrons
09:12:33:ST3_smx:INFO:	# loops 0
09:12:35:ST3_smx:INFO:	# loops 1
09:12:36:ST3_smx:INFO:	# loops 2
09:12:38:ST3_smx:INFO:	# loops 3
09:12:40:ST3_smx:INFO:	# loops 4
09:12:42:ST3_smx:INFO:	Total # of broken channels: 0
09:12:42:ST3_smx:INFO:	List of broken channels: []
09:12:42:ST3_smx:INFO:	Total # of broken channels: 0
09:12:42:ST3_smx:INFO:	List of broken channels: []
09:12:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:12:43:febtest:INFO:	1-0 | XA-000-08-002-001-008-099-01 |  18.7 | 1247.9
09:12:43:febtest:INFO:	8-1 | XA-000-08-002-001-008-156-07 |  25.1 | 1224.5
09:12:43:febtest:INFO:	3-2 | XA-000-08-002-001-008-105-01 |  31.4 | 1212.7
09:12:43:febtest:INFO:	10-3 | XA-000-08-002-001-008-155-07 |  25.1 | 1218.6
09:12:44:febtest:INFO:	5-4 | XA-000-08-002-001-008-078-15 |  28.2 | 1218.6
09:12:44:febtest:INFO:	12-5 | XA-000-08-002-001-008-159-07 |  31.4 | 1206.9
09:12:44:febtest:INFO:	7-6 | XA-000-08-002-001-008-071-15 |  34.6 | 1195.1
09:12:44:febtest:INFO:	14-7 | XA-000-08-002-001-008-154-07 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_26-09_10_20
OPERATOR  : Alois Alzheimer
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T0001190A2 124 D

FEB_SN : 1095
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	26094

MODULE_NAME:	L4DL600119 M4DL6T0001190A2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.8270', '1.850', '0.4369', '0.000', '0.0000', '7.000', '1.5820']
VI_after__Init : ['2.450', '1.9690', '1.850', '0.3186', '0.000', '0.0000', '7.000', '1.5820']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:13:15:ST3_Shared:INFO:	Listo of operators:Robert V.; 
09:13:19:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1095/TestDate_2024_01_26-09_10_20/