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FEB_1097 06.02.24 09:52:21
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09:46:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:46:12:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:46:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:46:13:febtest:INFO: Testing FEB with SN 1097
09:46:15:smx_tester:INFO: Scanning setup
09:46:15:elinks:INFO: Disabling clock on downlink 0
09:46:15:elinks:INFO: Disabling clock on downlink 1
09:46:15:elinks:INFO: Disabling clock on downlink 2
09:46:15:elinks:INFO: Disabling clock on downlink 3
09:46:15:elinks:INFO: Disabling clock on downlink 4
09:46:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:46:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:16:elinks:INFO: Disabling clock on downlink 0
09:46:16:elinks:INFO: Disabling clock on downlink 1
09:46:16:elinks:INFO: Disabling clock on downlink 2
09:46:16:elinks:INFO: Disabling clock on downlink 3
09:46:16:elinks:INFO: Disabling clock on downlink 4
09:46:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:46:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:46:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:16:elinks:INFO: Disabling clock on downlink 0
09:46:16:elinks:INFO: Disabling clock on downlink 1
09:46:16:elinks:INFO: Disabling clock on downlink 2
09:46:16:elinks:INFO: Disabling clock on downlink 3
09:46:16:elinks:INFO: Disabling clock on downlink 4
09:46:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:46:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:16:elinks:INFO: Disabling clock on downlink 0
09:46:16:elinks:INFO: Disabling clock on downlink 1
09:46:16:elinks:INFO: Disabling clock on downlink 2
09:46:16:elinks:INFO: Disabling clock on downlink 3
09:46:16:elinks:INFO: Disabling clock on downlink 4
09:46:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:46:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:16:elinks:INFO: Disabling clock on downlink 0
09:46:16:elinks:INFO: Disabling clock on downlink 1
09:46:16:elinks:INFO: Disabling clock on downlink 2
09:46:16:elinks:INFO: Disabling clock on downlink 3
09:46:16:elinks:INFO: Disabling clock on downlink 4
09:46:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:46:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:16:setup_element:INFO: Scanning clock phase
09:46:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:46:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:46:17:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:46:17:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:46:17:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:46:17:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:46:17:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:46:17:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:46:17:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:46:17:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:46:17:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
09:46:17:setup_element:INFO: Scanning data phases
09:46:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:46:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:46:22:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:46:22:setup_element:INFO: Eye window for uplink 0 : ______________XXXX______________________
Data delay found: 35
09:46:22:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
09:46:22:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
09:46:22:setup_element:INFO: Eye window for uplink 3 : ______XXXXXX____________________________
Data delay found: 28
09:46:22:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
09:46:22:setup_element:INFO: Eye window for uplink 5 : ___XXXX_________________________________
Data delay found: 24
09:46:22:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
09:46:22:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
09:46:22:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________
Data delay found: 8
09:46:22:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
09:46:22:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____
Data delay found: 12
09:46:22:setup_element:INFO: Eye window for uplink 11: ___________________________________XXX__
Data delay found: 16
09:46:22:setup_element:INFO: Eye window for uplink 12: _________________________XXXXX__________
Data delay found: 7
09:46:22:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXX_______
Data delay found: 10
09:46:22:setup_element:INFO: Eye window for uplink 14: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
09:46:22:setup_element:INFO: Eye window for uplink 15: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
09:46:22:setup_element:INFO: Setting the data phase to 35 for uplink 0
09:46:22:setup_element:INFO: Setting the data phase to 31 for uplink 1
09:46:22:setup_element:INFO: Setting the data phase to 31 for uplink 2
09:46:22:setup_element:INFO: Setting the data phase to 28 for uplink 3
09:46:22:setup_element:INFO: Setting the data phase to 28 for uplink 4
09:46:22:setup_element:INFO: Setting the data phase to 24 for uplink 5
09:46:22:setup_element:INFO: Setting the data phase to 22 for uplink 6
09:46:22:setup_element:INFO: Setting the data phase to 18 for uplink 7
09:46:22:setup_element:INFO: Setting the data phase to 8 for uplink 8
09:46:22:setup_element:INFO: Setting the data phase to 13 for uplink 9
09:46:22:setup_element:INFO: Setting the data phase to 12 for uplink 10
09:46:22:setup_element:INFO: Setting the data phase to 16 for uplink 11
09:46:22:setup_element:INFO: Setting the data phase to 7 for uplink 12
09:46:22:setup_element:INFO: Setting the data phase to 10 for uplink 13
09:46:22:setup_element:INFO: Setting the data phase to 2 for uplink 14
09:46:22:setup_element:INFO: Setting the data phase to 2 for uplink 15
09:46:22:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 68
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ___________________________________________________________________XXXXXXXXX____
Uplink 13: ___________________________________________________________________XXXXXXXXX____
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 16
Window Length: 37
Eye Window: ___________________________________XXX__
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 14:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
]
09:46:22:setup_element:INFO: Beginning SMX ASICs map scan
09:46:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:46:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:46:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:46:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:46:22:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:46:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:46:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:46:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:46:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:46:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:46:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:46:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:46:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:46:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:46:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:46:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:46:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:46:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:46:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:46:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:46:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:46:25:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 68
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ___________________________________________________________________XXXXXXXXX____
Uplink 13: ___________________________________________________________________XXXXXXXXX____
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 16
Window Length: 37
Eye Window: ___________________________________XXX__
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 14:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
09:46:25:setup_element:INFO: Performing Elink synchronization
09:46:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:46:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:46:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:46:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:46:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:46:25:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:46:25:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
09:46:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:46:27:febtest:INFO: 1-0 | XA-000-08-002-000-006-251-13 | 18.7 | 1253.7
09:46:27:febtest:INFO: 8-1 | XA-000-08-002-000-000-135-04 | 40.9 | 1165.6
09:46:27:febtest:INFO: 3-2 | XA-000-08-002-000-006-246-13 | 47.3 | 1159.7
09:46:28:febtest:INFO: 10-3 | XA-000-08-002-000-006-239-10 | 44.1 | 1159.7
09:46:28:febtest:INFO: 5-4 | XA-000-08-002-000-006-241-13 | 47.3 | 1159.7
09:46:28:febtest:INFO: 12-5 | XA-000-08-002-000-000-147-03 | 44.1 | 1171.5
09:46:28:febtest:INFO: 7-6 | XA-000-08-002-000-006-247-13 | 40.9 | 1201.0
09:46:29:febtest:INFO: 14-7 | XA-000-08-002-000-006-240-13 | 31.4 | 1201.0
09:46:29:ST3_smx:INFO: Configuring SMX FAST
09:46:31:ST3_smx:INFO: chip: 1-0 25.062742 C 1224.468235 mV
09:46:31:ST3_smx:INFO: Electrons
09:46:31:ST3_smx:INFO: # loops 0
09:46:33:ST3_smx:INFO: # loops 1
09:46:34:ST3_smx:INFO: # loops 2
09:46:36:ST3_smx:INFO: # loops 3
09:46:37:ST3_smx:INFO: # loops 4
09:46:39:ST3_smx:INFO: Total # of broken channels: 0
09:46:39:ST3_smx:INFO: List of broken channels: []
09:46:39:ST3_smx:INFO: Total # of broken channels: 0
09:46:39:ST3_smx:INFO: List of broken channels: []
09:46:40:ST3_smx:INFO: Configuring SMX FAST
09:46:42:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV
09:46:42:ST3_smx:INFO: Electrons
09:46:42:ST3_smx:INFO: # loops 0
09:46:44:ST3_smx:INFO: # loops 1
09:46:45:ST3_smx:INFO: # loops 2
09:46:47:ST3_smx:INFO: # loops 3
09:46:48:ST3_smx:INFO: # loops 4
09:46:50:ST3_smx:INFO: Total # of broken channels: 0
09:46:50:ST3_smx:INFO: List of broken channels: []
09:46:50:ST3_smx:INFO: Total # of broken channels: 0
09:46:50:ST3_smx:INFO: List of broken channels: []
09:46:51:ST3_smx:INFO: Configuring SMX FAST
09:46:53:ST3_smx:INFO: chip: 3-2 50.430383 C 1153.732915 mV
09:46:53:ST3_smx:INFO: Electrons
09:46:53:ST3_smx:INFO: # loops 0
09:46:55:ST3_smx:INFO: # loops 1
09:46:56:ST3_smx:INFO: # loops 2
09:46:58:ST3_smx:INFO: # loops 3
09:46:59:ST3_smx:INFO: # loops 4
09:47:01:ST3_smx:INFO: Total # of broken channels: 0
09:47:01:ST3_smx:INFO: List of broken channels: []
09:47:01:ST3_smx:INFO: Total # of broken channels: 8
09:47:01:ST3_smx:INFO: List of broken channels: [98, 104, 106, 108, 110, 112, 114, 116]
09:47:02:ST3_smx:INFO: Configuring SMX FAST
09:47:04:ST3_smx:INFO: chip: 10-3 44.073563 C 1165.571835 mV
09:47:04:ST3_smx:INFO: Electrons
09:47:04:ST3_smx:INFO: # loops 0
09:47:05:ST3_smx:INFO: # loops 1
09:47:07:ST3_smx:INFO: # loops 2
09:47:09:ST3_smx:INFO: # loops 3
09:47:10:ST3_smx:INFO: # loops 4
Traceback (most recent call last):
File "febtest.py", line 283, in DoFEB_MicrocableTest
self.EMU.mysmx[i].MicroCableTest()
File "/home/cbm/ST3_v2.29.08/lib/ST3_smx.py", line 584, in MicroCableTest
val = self.smx.read(ch, (2*d))&0xFFF
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx.py", line 39, in read
return self.ack_monitor.check_read()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 88, in check_read
return self._check(self._check_read, timeout)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 60, in _check
raise AckNotReceived
hctsp.ack_monitor.AckNotReceived: Ack frame not received
09:52:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:52:21:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:52:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:52:21:febtest:INFO: Testing FEB with SN 1097
09:52:24:smx_tester:INFO: Scanning setup
09:52:24:elinks:INFO: Disabling clock on downlink 0
09:52:24:elinks:INFO: Disabling clock on downlink 1
09:52:24:elinks:INFO: Disabling clock on downlink 2
09:52:24:elinks:INFO: Disabling clock on downlink 3
09:52:24:elinks:INFO: Disabling clock on downlink 4
09:52:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:52:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:52:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:52:24:elinks:INFO: Disabling clock on downlink 0
09:52:24:elinks:INFO: Disabling clock on downlink 1
09:52:24:elinks:INFO: Disabling clock on downlink 2
09:52:24:elinks:INFO: Disabling clock on downlink 3
09:52:24:elinks:INFO: Disabling clock on downlink 4
09:52:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:52:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:52:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:52:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:52:24:elinks:INFO: Disabling clock on downlink 0
09:52:24:elinks:INFO: Disabling clock on downlink 1
09:52:24:elinks:INFO: Disabling clock on downlink 2
09:52:24:elinks:INFO: Disabling clock on downlink 3
09:52:24:elinks:INFO: Disabling clock on downlink 4
09:52:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:52:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:52:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:52:24:elinks:INFO: Disabling clock on downlink 0
09:52:24:elinks:INFO: Disabling clock on downlink 1
09:52:24:elinks:INFO: Disabling clock on downlink 2
09:52:24:elinks:INFO: Disabling clock on downlink 3
09:52:24:elinks:INFO: Disabling clock on downlink 4
09:52:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:52:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:52:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:52:25:elinks:INFO: Disabling clock on downlink 0
09:52:25:elinks:INFO: Disabling clock on downlink 1
09:52:25:elinks:INFO: Disabling clock on downlink 2
09:52:25:elinks:INFO: Disabling clock on downlink 3
09:52:25:elinks:INFO: Disabling clock on downlink 4
09:52:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:52:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:52:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:52:25:setup_element:INFO: Scanning clock phase
09:52:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:52:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:52:25:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:52:25:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
09:52:25:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
09:52:25:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:52:25:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:52:25:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:52:25:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:52:25:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:52:25:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
09:52:25:setup_element:INFO: Scanning data phases
09:52:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:52:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:52:31:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:52:31:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
09:52:31:setup_element:INFO: Eye window for uplink 1 : _________XXXX___________________________
Data delay found: 30
09:52:31:setup_element:INFO: Eye window for uplink 2 : ________XXXXXX__________________________
Data delay found: 30
09:52:31:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
09:52:31:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
09:52:31:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
09:52:31:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
09:52:31:setup_element:INFO: Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
09:52:31:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________
Data delay found: 8
09:52:31:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
09:52:31:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXX_____
Data delay found: 11
09:52:31:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
09:52:31:setup_element:INFO: Eye window for uplink 12: _________________________XXXXX__________
Data delay found: 7
09:52:31:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXX_______
Data delay found: 10
09:52:31:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____
Data delay found: 12
09:52:31:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___
Data delay found: 13
09:52:31:setup_element:INFO: Setting the data phase to 35 for uplink 0
09:52:31:setup_element:INFO: Setting the data phase to 30 for uplink 1
09:52:31:setup_element:INFO: Setting the data phase to 30 for uplink 2
09:52:31:setup_element:INFO: Setting the data phase to 28 for uplink 3
09:52:31:setup_element:INFO: Setting the data phase to 28 for uplink 4
09:52:31:setup_element:INFO: Setting the data phase to 24 for uplink 5
09:52:31:setup_element:INFO: Setting the data phase to 21 for uplink 6
09:52:31:setup_element:INFO: Setting the data phase to 18 for uplink 7
09:52:31:setup_element:INFO: Setting the data phase to 8 for uplink 8
09:52:31:setup_element:INFO: Setting the data phase to 13 for uplink 9
09:52:31:setup_element:INFO: Setting the data phase to 11 for uplink 10
09:52:31:setup_element:INFO: Setting the data phase to 15 for uplink 11
09:52:31:setup_element:INFO: Setting the data phase to 7 for uplink 12
09:52:31:setup_element:INFO: Setting the data phase to 10 for uplink 13
09:52:31:setup_element:INFO: Setting the data phase to 12 for uplink 14
09:52:31:setup_element:INFO: Setting the data phase to 13 for uplink 15
09:52:31:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXX___
Uplink 9: ______________________________________________________________________XXXXXXX___
Uplink 10: _______________________________________________________________________XXXXXXX__
Uplink 11: _______________________________________________________________________XXXXXXX__
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 14:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 15:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
]
09:52:31:setup_element:INFO: Beginning SMX ASICs map scan
09:52:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:52:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:52:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:52:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:52:31:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:52:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:52:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:52:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:52:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:52:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:52:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:52:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:52:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:52:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:52:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:52:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:52:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:52:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:52:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:52:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:52:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:52:34:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXX___
Uplink 9: ______________________________________________________________________XXXXXXX___
Uplink 10: _______________________________________________________________________XXXXXXX__
Uplink 11: _______________________________________________________________________XXXXXXX__
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 14:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 15:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
09:52:34:setup_element:INFO: Performing Elink synchronization
09:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:52:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:52:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:52:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:52:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:52:34:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:52:34:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
09:52:35:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:52:35:febtest:INFO: 1-0 | XA-000-08-002-000-006-251-13 | 28.2 | 1224.5
09:52:36:febtest:INFO: 8-1 | XA-000-08-002-000-000-135-04 | 47.3 | 1159.7
09:52:36:febtest:INFO: 3-2 | XA-000-08-002-000-006-246-13 | 53.6 | 1153.7
09:52:36:febtest:INFO: 10-3 | XA-000-08-002-000-006-239-10 | 50.4 | 1159.7
09:52:36:febtest:INFO: 5-4 | XA-000-08-002-000-006-241-13 | 50.4 | 1159.7
09:52:36:febtest:INFO: 12-5 | XA-000-08-002-000-000-147-03 | 47.3 | 1165.6
09:52:37:febtest:INFO: 7-6 | XA-000-08-002-000-006-247-13 | 44.1 | 1206.9
09:52:37:febtest:INFO: 14-7 | XA-000-08-002-000-006-240-13 | 34.6 | 1206.9
09:52:37:ST3_smx:INFO: Configuring SMX FAST
09:52:39:ST3_smx:INFO: chip: 1-0 28.225000 C 1224.468235 mV
09:52:39:ST3_smx:INFO: Electrons
09:52:39:ST3_smx:INFO: # loops 0
09:52:41:ST3_smx:INFO: # loops 1
09:52:42:ST3_smx:INFO: # loops 2
09:52:44:ST3_smx:INFO: # loops 3
09:52:46:ST3_smx:INFO: # loops 4
09:52:47:ST3_smx:INFO: Total # of broken channels: 0
09:52:47:ST3_smx:INFO: List of broken channels: []
09:52:47:ST3_smx:INFO: Total # of broken channels: 0
09:52:47:ST3_smx:INFO: List of broken channels: []
09:52:48:ST3_smx:INFO: Configuring SMX FAST
09:52:50:ST3_smx:INFO: chip: 8-1 47.250730 C 1159.654860 mV
09:52:50:ST3_smx:INFO: Electrons
09:52:50:ST3_smx:INFO: # loops 0
09:52:52:ST3_smx:INFO: # loops 1
09:52:54:ST3_smx:INFO: # loops 2
09:52:55:ST3_smx:INFO: # loops 3
09:52:57:ST3_smx:INFO: # loops 4
09:52:59:ST3_smx:INFO: Total # of broken channels: 0
09:52:59:ST3_smx:INFO: List of broken channels: []
09:52:59:ST3_smx:INFO: Total # of broken channels: 0
09:52:59:ST3_smx:INFO: List of broken channels: []
09:53:00:ST3_smx:INFO: Configuring SMX FAST
09:53:02:ST3_smx:INFO: chip: 3-2 53.612520 C 1153.732915 mV
09:53:02:ST3_smx:INFO: Electrons
09:53:02:ST3_smx:INFO: # loops 0
09:53:03:ST3_smx:INFO: # loops 1
09:53:05:ST3_smx:INFO: # loops 2
09:53:06:ST3_smx:INFO: # loops 3
09:53:08:ST3_smx:INFO: # loops 4
09:53:10:ST3_smx:INFO: Total # of broken channels: 0
09:53:10:ST3_smx:INFO: List of broken channels: []
09:53:10:ST3_smx:INFO: Total # of broken channels: 0
09:53:10:ST3_smx:INFO: List of broken channels: []
09:53:11:ST3_smx:INFO: Configuring SMX FAST
09:53:13:ST3_smx:INFO: chip: 10-3 47.250730 C 1165.571835 mV
09:53:13:ST3_smx:INFO: Electrons
09:53:13:ST3_smx:INFO: # loops 0
09:53:14:ST3_smx:INFO: # loops 1
09:53:16:ST3_smx:INFO: # loops 2
09:53:18:ST3_smx:INFO: # loops 3
09:53:19:ST3_smx:INFO: # loops 4
09:53:21:ST3_smx:INFO: Total # of broken channels: 0
09:53:21:ST3_smx:INFO: List of broken channels: []
09:53:21:ST3_smx:INFO: Total # of broken channels: 0
09:53:21:ST3_smx:INFO: List of broken channels: []
09:53:22:ST3_smx:INFO: Configuring SMX FAST
09:53:24:ST3_smx:INFO: chip: 5-4 44.073563 C 1183.292940 mV
09:53:24:ST3_smx:INFO: Electrons
09:53:24:ST3_smx:INFO: # loops 0
09:53:25:ST3_smx:INFO: # loops 1
09:53:27:ST3_smx:INFO: # loops 2
09:53:29:ST3_smx:INFO: # loops 3
09:53:30:ST3_smx:INFO: # loops 4
09:53:32:ST3_smx:INFO: Total # of broken channels: 0
09:53:32:ST3_smx:INFO: List of broken channels: []
09:53:32:ST3_smx:INFO: Total # of broken channels: 0
09:53:32:ST3_smx:INFO: List of broken channels: []
09:53:33:ST3_smx:INFO: Configuring SMX FAST
09:53:35:ST3_smx:INFO: chip: 12-5 50.430383 C 1171.483840 mV
09:53:35:ST3_smx:INFO: Electrons
09:53:35:ST3_smx:INFO: # loops 0
09:53:37:ST3_smx:INFO: # loops 1
09:53:38:ST3_smx:INFO: # loops 2
09:53:40:ST3_smx:INFO: # loops 3
09:53:42:ST3_smx:INFO: # loops 4
09:53:43:ST3_smx:INFO: Total # of broken channels: 0
09:53:43:ST3_smx:INFO: List of broken channels: []
09:53:43:ST3_smx:INFO: Total # of broken channels: 0
09:53:43:ST3_smx:INFO: List of broken channels: []
09:53:44:ST3_smx:INFO: Configuring SMX FAST
09:53:46:ST3_smx:INFO: chip: 7-6 40.898880 C 1224.468235 mV
09:53:46:ST3_smx:INFO: Electrons
09:53:46:ST3_smx:INFO: # loops 0
09:53:48:ST3_smx:INFO: # loops 1
09:53:50:ST3_smx:INFO: # loops 2
09:53:51:ST3_smx:INFO: # loops 3
09:53:53:ST3_smx:INFO: # loops 4
09:53:54:ST3_smx:INFO: Total # of broken channels: 0
09:53:54:ST3_smx:INFO: List of broken channels: []
09:53:54:ST3_smx:INFO: Total # of broken channels: 0
09:53:54:ST3_smx:INFO: List of broken channels: []
09:53:55:ST3_smx:INFO: Configuring SMX FAST
09:53:57:ST3_smx:INFO: chip: 14-7 44.073563 C 1183.292940 mV
09:53:57:ST3_smx:INFO: Electrons
09:53:57:ST3_smx:INFO: # loops 0
09:53:59:ST3_smx:INFO: # loops 1
09:54:01:ST3_smx:INFO: # loops 2
09:54:02:ST3_smx:INFO: # loops 3
09:54:04:ST3_smx:INFO: # loops 4
09:54:05:ST3_smx:INFO: Total # of broken channels: 0
09:54:05:ST3_smx:INFO: List of broken channels: []
09:54:05:ST3_smx:INFO: Total # of broken channels: 0
09:54:05:ST3_smx:INFO: List of broken channels: []
09:54:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:54:07:febtest:INFO: 1-0 | XA-000-08-002-000-006-251-13 | 31.4 | 1224.5
09:54:07:febtest:INFO: 8-1 | XA-000-08-002-000-000-135-04 | 47.3 | 1159.7
09:54:07:febtest:INFO: 3-2 | XA-000-08-002-000-006-246-13 | 53.6 | 1153.7
09:54:07:febtest:INFO: 10-3 | XA-000-08-002-000-006-239-10 | 50.4 | 1165.6
09:54:07:febtest:INFO: 5-4 | XA-000-08-002-000-006-241-13 | 44.1 | 1183.3
09:54:08:febtest:INFO: 12-5 | XA-000-08-002-000-000-147-03 | 50.4 | 1171.5
09:54:08:febtest:INFO: 7-6 | XA-000-08-002-000-006-247-13 | 40.9 | 1224.5
09:54:08:febtest:INFO: 14-7 | XA-000-08-002-000-006-240-13 | 44.1 | 1183.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_06-09_52_21
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1097
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9910', '1.850', '0.7097']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:54:21:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1097/TestDate_2024_02_06-09_52_21/