FEB_1099    14.02.24 08:21:15

TextEdit.txt
            08:20:59:ST3_hmp4040:INFO:	ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
08:21:00:febtest:INFO:	FEB type: 8.2
08:21:00:febtest:INFO:	FEB SN: 2013
08:21:00:febtest:INFO:	FEB A: 0
08:21:00:febtest:INFO:	FEB B: 1
08:21:00:febtest:INFO:	FEB 8-2 selected
08:21:00:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
08:21:04:ST3_Shared:INFO:	Listo of operators:Kerstin S.; 
08:21:09:febtest:INFO:	FEB type: 8.2
08:21:09:febtest:INFO:	FEB SN: 1099
08:21:09:febtest:INFO:	FEB A: 1
08:21:09:febtest:INFO:	FEB B: 0
08:21:15:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:21:15:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
08:21:15:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:21:56:ST3_ModuleSelector:INFO:	L6DL600127 M6DL6T1001271A2 124 D

08:21:56:ST3_ModuleSelector:INFO:	
08:21:57:febtest:INFO:	Testing FEB with SN 1099
08:21:59:smx_tester:INFO:	Scanning setup
08:21:59:elinks:INFO:	Disabling clock on downlink 0
08:21:59:elinks:INFO:	Disabling clock on downlink 1
08:21:59:elinks:INFO:	Disabling clock on downlink 2
08:21:59:elinks:INFO:	Disabling clock on downlink 3
08:21:59:elinks:INFO:	Disabling clock on downlink 4
08:21:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:21:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:21:59:elinks:INFO:	Disabling clock on downlink 0
08:21:59:elinks:INFO:	Disabling clock on downlink 1
08:21:59:elinks:INFO:	Disabling clock on downlink 2
08:21:59:elinks:INFO:	Disabling clock on downlink 3
08:21:59:elinks:INFO:	Disabling clock on downlink 4
08:21:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:22:00:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:22:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:22:00:elinks:INFO:	Disabling clock on downlink 0
08:22:00:elinks:INFO:	Disabling clock on downlink 1
08:22:00:elinks:INFO:	Disabling clock on downlink 2
08:22:00:elinks:INFO:	Disabling clock on downlink 3
08:22:00:elinks:INFO:	Disabling clock on downlink 4
08:22:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:22:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:22:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:22:00:elinks:INFO:	Disabling clock on downlink 0
08:22:00:elinks:INFO:	Disabling clock on downlink 1
08:22:00:elinks:INFO:	Disabling clock on downlink 2
08:22:00:elinks:INFO:	Disabling clock on downlink 3
08:22:00:elinks:INFO:	Disabling clock on downlink 4
08:22:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:22:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:22:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:22:00:elinks:INFO:	Disabling clock on downlink 0
08:22:00:elinks:INFO:	Disabling clock on downlink 1
08:22:00:elinks:INFO:	Disabling clock on downlink 2
08:22:00:elinks:INFO:	Disabling clock on downlink 3
08:22:00:elinks:INFO:	Disabling clock on downlink 4
08:22:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:22:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:22:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:22:00:setup_element:INFO:	Scanning clock phase
08:22:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:22:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:22:00:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:22:00:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:22:00:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:22:01:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:22:01:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:22:01:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:22:01:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:22:01:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:22:01:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:22:01:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:22:01:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:22:01:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:22:01:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:22:01:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:22:01:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:22:01:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:22:01:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
08:22:01:setup_element:INFO:	Scanning data phases
08:22:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:22:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:06:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:22:06:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
08:22:06:setup_element:INFO:	Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
08:22:06:setup_element:INFO:	Eye window for uplink 2 : _______XXXX_____________________________
Data delay found: 28
08:22:06:setup_element:INFO:	Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
08:22:06:setup_element:INFO:	Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
08:22:06:setup_element:INFO:	Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
08:22:06:setup_element:INFO:	Eye window for uplink 6 : XXXXX__________________________________X
Data delay found: 21
08:22:06:setup_element:INFO:	Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
08:22:06:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
08:22:06:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
08:22:06:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
08:22:06:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXX_____
Data delay found: 11
08:22:06:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
08:22:06:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
08:22:06:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
08:22:06:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
08:22:06:setup_element:INFO:	Setting the data phase to 34 for uplink 0
08:22:06:setup_element:INFO:	Setting the data phase to 29 for uplink 1
08:22:06:setup_element:INFO:	Setting the data phase to 28 for uplink 2
08:22:06:setup_element:INFO:	Setting the data phase to 26 for uplink 3
08:22:06:setup_element:INFO:	Setting the data phase to 27 for uplink 4
08:22:06:setup_element:INFO:	Setting the data phase to 23 for uplink 5
08:22:06:setup_element:INFO:	Setting the data phase to 21 for uplink 6
08:22:06:setup_element:INFO:	Setting the data phase to 18 for uplink 7
08:22:06:setup_element:INFO:	Setting the data phase to 6 for uplink 8
08:22:06:setup_element:INFO:	Setting the data phase to 11 for uplink 9
08:22:06:setup_element:INFO:	Setting the data phase to 8 for uplink 10
08:22:06:setup_element:INFO:	Setting the data phase to 11 for uplink 11
08:22:06:setup_element:INFO:	Setting the data phase to 9 for uplink 12
08:22:06:setup_element:INFO:	Setting the data phase to 12 for uplink 13
08:22:06:setup_element:INFO:	Setting the data phase to 10 for uplink 14
08:22:06:setup_element:INFO:	Setting the data phase to 12 for uplink 15
08:22:06:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 2:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
]
08:22:06:setup_element:INFO:	Beginning SMX ASICs map scan
08:22:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:22:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:22:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:22:06:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:22:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:22:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:22:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:22:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:22:07:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:22:07:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:22:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:22:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:22:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:22:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:22:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:22:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:22:08:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:22:08:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:22:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:22:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:22:09:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 2:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____

08:22:09:setup_element:INFO:	Performing Elink synchronization
08:22:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:22:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:22:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:22:09:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:22:09:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:22:09:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
08:22:11:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:22:11:febtest:INFO:	1-0 | XA-000-08-002-002-007-255-09 |  31.4 | 1171.5
08:22:11:febtest:INFO:	8-1 | XA-000-08-002-002-008-016-12 |  25.1 | 1189.2
08:22:12:febtest:INFO:	3-2 | XA-000-08-002-002-007-252-09 |   6.1 | 1265.4
08:22:12:febtest:INFO:	10-3 | XA-000-08-002-002-008-009-11 |  37.7 | 1165.6
08:22:12:febtest:INFO:	5-4 | XA-000-08-002-002-007-251-09 |  15.6 | 1236.2
08:22:12:febtest:INFO:	12-5 | XA-000-08-002-002-008-015-11 |  28.2 | 1195.1
08:22:12:febtest:INFO:	7-6 | XA-000-08-002-002-007-250-09 |   9.3 | 1253.7
08:22:13:febtest:INFO:	14-7 | XA-000-08-002-002-008-013-11 |  31.4 | 1183.3
08:22:13:ST3_smx:INFO:	Configuring SMX FAST
08:22:15:ST3_smx:INFO:	chip: 1-0 	 25.062742 C 	 1200.969315 mV
08:22:15:ST3_smx:INFO:		Electrons
08:22:15:ST3_smx:INFO:	# loops 0
08:22:17:ST3_smx:INFO:	# loops 1
08:22:18:ST3_smx:INFO:	# loops 2
08:22:20:ST3_smx:INFO:	# loops 3
08:22:22:ST3_smx:INFO:	# loops 4
08:22:23:ST3_smx:INFO:	Total # of broken channels: 0
08:22:23:ST3_smx:INFO:	List of broken channels: []
08:22:23:ST3_smx:INFO:	Total # of broken channels: 0
08:22:23:ST3_smx:INFO:	List of broken channels: []
08:22:24:ST3_smx:INFO:	Configuring SMX FAST
08:22:26:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1153.732915 mV
08:22:26:ST3_smx:INFO:		Electrons
08:22:26:ST3_smx:INFO:	# loops 0
08:22:27:ST3_smx:INFO:	# loops 1
08:22:29:ST3_smx:INFO:	# loops 2
08:22:31:ST3_smx:INFO:	# loops 3
08:22:32:ST3_smx:INFO:	# loops 4
08:22:34:ST3_smx:INFO:	Total # of broken channels: 0
08:22:34:ST3_smx:INFO:	List of broken channels: []
08:22:34:ST3_smx:INFO:	Total # of broken channels: 0
08:22:34:ST3_smx:INFO:	List of broken channels: []
08:22:34:ST3_smx:INFO:	Configuring SMX FAST
08:22:36:ST3_smx:INFO:	chip: 3-2 	 15.590880 C 	 1236.187875 mV
08:22:36:ST3_smx:INFO:		Electrons
08:22:36:ST3_smx:INFO:	# loops 0
08:22:38:ST3_smx:INFO:	# loops 1
08:22:40:ST3_smx:INFO:	# loops 2
08:22:42:ST3_smx:INFO:	# loops 3
08:22:43:ST3_smx:INFO:	# loops 4
08:22:45:ST3_smx:INFO:	Total # of broken channels: 0
08:22:45:ST3_smx:INFO:	List of broken channels: []
08:22:45:ST3_smx:INFO:	Total # of broken channels: 0
08:22:45:ST3_smx:INFO:	List of broken channels: []
08:22:45:ST3_smx:INFO:	Configuring SMX FAST
08:22:47:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1183.292940 mV
08:22:47:ST3_smx:INFO:		Electrons
08:22:47:ST3_smx:INFO:	# loops 0
08:22:49:ST3_smx:INFO:	# loops 1
08:22:51:ST3_smx:INFO:	# loops 2
08:22:53:ST3_smx:INFO:	# loops 3
08:22:54:ST3_smx:INFO:	# loops 4
08:22:56:ST3_smx:INFO:	Total # of broken channels: 0
08:22:56:ST3_smx:INFO:	List of broken channels: []
08:22:56:ST3_smx:INFO:	Total # of broken channels: 0
08:22:56:ST3_smx:INFO:	List of broken channels: []
08:22:56:ST3_smx:INFO:	Configuring SMX FAST
08:22:58:ST3_smx:INFO:	chip: 5-4 	 21.902970 C 	 1224.468235 mV
08:22:58:ST3_smx:INFO:		Electrons
08:22:58:ST3_smx:INFO:	# loops 0
08:23:00:ST3_smx:INFO:	# loops 1
08:23:01:ST3_smx:INFO:	# loops 2
08:23:03:ST3_smx:INFO:	# loops 3
08:23:05:ST3_smx:INFO:	# loops 4
08:23:06:ST3_smx:INFO:	Total # of broken channels: 0
08:23:06:ST3_smx:INFO:	List of broken channels: []
08:23:06:ST3_smx:INFO:	Total # of broken channels: 0
08:23:06:ST3_smx:INFO:	List of broken channels: []
08:23:06:ST3_smx:INFO:	Configuring SMX FAST
08:23:08:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1183.292940 mV
08:23:08:ST3_smx:INFO:		Electrons
08:23:08:ST3_smx:INFO:	# loops 0
08:23:10:ST3_smx:INFO:	# loops 1
08:23:12:ST3_smx:INFO:	# loops 2
08:23:13:ST3_smx:INFO:	# loops 3
08:23:15:ST3_smx:INFO:	# loops 4
08:23:17:ST3_smx:INFO:	Total # of broken channels: 0
08:23:17:ST3_smx:INFO:	List of broken channels: []
08:23:17:ST3_smx:INFO:	Total # of broken channels: 0
08:23:17:ST3_smx:INFO:	List of broken channels: []
08:23:17:ST3_smx:INFO:	Configuring SMX FAST
08:23:19:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1218.600960 mV
08:23:19:ST3_smx:INFO:		Electrons
08:23:19:ST3_smx:INFO:	# loops 0
08:23:21:ST3_smx:INFO:	# loops 1
08:23:23:ST3_smx:INFO:	# loops 2
08:23:24:ST3_smx:INFO:	# loops 3
08:23:26:ST3_smx:INFO:	# loops 4
08:23:28:ST3_smx:INFO:	Total # of broken channels: 0
08:23:28:ST3_smx:INFO:	List of broken channels: []
08:23:28:ST3_smx:INFO:	Total # of broken channels: 0
08:23:28:ST3_smx:INFO:	List of broken channels: []
08:23:28:ST3_smx:INFO:	Configuring SMX FAST
08:23:30:ST3_smx:INFO:	chip: 14-7 	 40.898880 C 	 1153.732915 mV
08:23:30:ST3_smx:INFO:		Electrons
08:23:30:ST3_smx:INFO:	# loops 0
08:23:32:ST3_smx:INFO:	# loops 1
08:23:33:ST3_smx:INFO:	# loops 2
08:23:35:ST3_smx:INFO:	# loops 3
08:23:37:ST3_smx:INFO:	# loops 4
08:23:38:ST3_smx:INFO:	Total # of broken channels: 0
08:23:38:ST3_smx:INFO:	List of broken channels: []
08:23:38:ST3_smx:INFO:	Total # of broken channels: 0
08:23:38:ST3_smx:INFO:	List of broken channels: []
08:23:39:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:23:39:febtest:INFO:	1-0 | XA-000-08-002-002-007-255-09 |  25.1 | 1201.0
08:23:40:febtest:INFO:	8-1 | XA-000-08-002-002-008-016-12 |  37.7 | 1153.7
08:23:40:febtest:INFO:	3-2 | XA-000-08-002-002-007-252-09 |  18.7 | 1242.0
08:23:40:febtest:INFO:	10-3 | XA-000-08-002-002-008-009-11 |  31.4 | 1183.3
08:23:40:febtest:INFO:	5-4 | XA-000-08-002-002-007-251-09 |  21.9 | 1224.5
08:23:41:febtest:INFO:	12-5 | XA-000-08-002-002-008-015-11 |  34.6 | 1183.3
08:23:41:febtest:INFO:	7-6 | XA-000-08-002-002-007-250-09 |  25.1 | 1218.6
08:23:41:febtest:INFO:	14-7 | XA-000-08-002-002-008-013-11 |  40.9 | 1153.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_14-08_21_15
OPERATOR  : Kerstin S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L6DL600127 M6DL6T1001271A2 124 D

FEB_SN : 1099
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L6DL600127 M6DL6T1001271A2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.7930', '1.850', '0.4694']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9770', '1.850', '0.3186']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:23:47:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1099/TestDate_2024_02_14-08_21_15/