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FEB_1100 13.02.24 13:34:05
Info
11:34:06:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
11:34:07:febtest:INFO: FEB 8-2 selected
11:34:07:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:34:10:ST3_Shared:INFO: Listo of operators:Olga B.;
11:34:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:34:21:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
11:34:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:34:22:febtest:INFO: Testing FEB with SN 2013
11:34:24:smx_tester:INFO: Scanning setup
11:34:24:elinks:INFO: Disabling clock on downlink 0
11:34:24:elinks:INFO: Disabling clock on downlink 1
11:34:24:elinks:INFO: Disabling clock on downlink 2
11:34:24:elinks:INFO: Disabling clock on downlink 3
11:34:24:elinks:INFO: Disabling clock on downlink 4
11:34:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:34:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:25:elinks:INFO: Disabling clock on downlink 0
11:34:25:elinks:INFO: Disabling clock on downlink 1
11:34:25:elinks:INFO: Disabling clock on downlink 2
11:34:25:elinks:INFO: Disabling clock on downlink 3
11:34:25:elinks:INFO: Disabling clock on downlink 4
11:34:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:34:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:25:elinks:INFO: Disabling clock on downlink 0
11:34:25:elinks:INFO: Disabling clock on downlink 1
11:34:25:elinks:INFO: Disabling clock on downlink 2
11:34:25:elinks:INFO: Disabling clock on downlink 3
11:34:25:elinks:INFO: Disabling clock on downlink 4
11:34:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:34:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:34:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:25:elinks:INFO: Disabling clock on downlink 0
11:34:25:elinks:INFO: Disabling clock on downlink 1
11:34:25:elinks:INFO: Disabling clock on downlink 2
11:34:25:elinks:INFO: Disabling clock on downlink 3
11:34:25:elinks:INFO: Disabling clock on downlink 4
11:34:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:34:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:25:elinks:INFO: Disabling clock on downlink 0
11:34:25:elinks:INFO: Disabling clock on downlink 1
11:34:25:elinks:INFO: Disabling clock on downlink 2
11:34:25:elinks:INFO: Disabling clock on downlink 3
11:34:25:elinks:INFO: Disabling clock on downlink 4
11:34:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:34:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:34:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:34:25:setup_element:INFO: Scanning clock phase
11:34:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:26:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:34:26:setup_element:INFO: Eye window for uplink 16: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
11:34:26:setup_element:INFO: Eye window for uplink 17: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
11:34:26:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:34:26:setup_element:INFO: Eye window for uplink 30: X_________________________________________________________________________XXXXXX
Clock Delay: 37
11:34:26:setup_element:INFO: Eye window for uplink 31: X_________________________________________________________________________XXXXXX
Clock Delay: 37
11:34:26:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
11:34:26:setup_element:INFO: Scanning data phases
11:34:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:31:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:34:31:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
11:34:31:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
11:34:31:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
11:34:31:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
11:34:31:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
11:34:31:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
11:34:31:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
11:34:31:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
11:34:31:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
11:34:31:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
11:34:31:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:34:31:setup_element:INFO: Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
11:34:31:setup_element:INFO: Eye window for uplink 28: ___________XXXX_________________________
Data delay found: 32
11:34:31:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
11:34:31:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
11:34:31:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
11:34:31:setup_element:INFO: Setting the data phase to 20 for uplink 16
11:34:31:setup_element:INFO: Setting the data phase to 15 for uplink 17
11:34:31:setup_element:INFO: Setting the data phase to 17 for uplink 18
11:34:31:setup_element:INFO: Setting the data phase to 14 for uplink 19
11:34:31:setup_element:INFO: Setting the data phase to 18 for uplink 20
11:34:31:setup_element:INFO: Setting the data phase to 16 for uplink 21
11:34:31:setup_element:INFO: Setting the data phase to 17 for uplink 22
11:34:31:setup_element:INFO: Setting the data phase to 15 for uplink 23
11:34:31:setup_element:INFO: Setting the data phase to 27 for uplink 24
11:34:31:setup_element:INFO: Setting the data phase to 30 for uplink 25
11:34:31:setup_element:INFO: Setting the data phase to 28 for uplink 26
11:34:31:setup_element:INFO: Setting the data phase to 31 for uplink 27
11:34:31:setup_element:INFO: Setting the data phase to 32 for uplink 28
11:34:31:setup_element:INFO: Setting the data phase to 34 for uplink 29
11:34:31:setup_element:INFO: Setting the data phase to 39 for uplink 30
11:34:31:setup_element:INFO: Setting the data phase to 37 for uplink 31
11:34:31:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 70
Eye Windows:
Uplink 16: X_______________________________________________________________________XXXXXXXX
Uplink 17: X_______________________________________________________________________XXXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: X_________________________________________________________________________XXXXXX
Uplink 31: X_________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 31:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
]
11:34:31:setup_element:INFO: Beginning SMX ASICs map scan
11:34:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:34:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:34:31:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:34:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:34:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:34:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:34:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:34:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:34:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:34:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:34:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:34:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:34:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:34:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:34:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:34:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:34:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:34:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:34:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:34:34:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 70
Eye Windows:
Uplink 16: X_______________________________________________________________________XXXXXXXX
Uplink 17: X_______________________________________________________________________XXXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: X_________________________________________________________________________XXXXXX
Uplink 31: X_________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 31:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
11:34:34:setup_element:INFO: Performing Elink synchronization
11:34:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:34:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:34:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:34:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:34:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:34:34:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:34:34:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
11:34:35:febtest:ERROR: You have entered FEB A number and connected to B
11:35:40:ST3_hmp4040:ERROR: Empty line for ch.: 1!!!
Traceback (most recent call last):
File "febtest.py", line 529, in Talk2hmp
return super().Talk2hmp()
File "/home/cbm/ST3_v2.29.08/lib/ST3_Shared.py", line 744, in Talk2hmp
self.FEBstate = self.PowerModule.get_state( self.PowerModule.hmp_yaml['C3'] )
File "/home/cbm/ST3_v2.29.08/lib/ST3_hmp4040.py", line 205, in get_state
return int(line)
ValueError: invalid literal for int() with base 10: '0.00'
13:31:55:ST3_Shared:INFO: Listo of operators:Kerstin S.; Olga B.;
13:31:58:ST3_Shared:INFO: Listo of operators:Kerstin S.;
13:32:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:06:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
13:32:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:13:ST3_ModuleSelector:INFO:
13:32:13:ST3_ModuleSelector:INFO:
13:32:13:febtest:INFO: Testing FEB with SN 1100
13:32:16:smx_tester:INFO: Scanning setup
13:32:16:elinks:INFO: Disabling clock on downlink 0
13:32:16:elinks:INFO: Disabling clock on downlink 1
13:32:16:elinks:INFO: Disabling clock on downlink 2
13:32:16:elinks:INFO: Disabling clock on downlink 3
13:32:16:elinks:INFO: Disabling clock on downlink 4
13:32:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:32:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:16:elinks:INFO: Disabling clock on downlink 0
13:32:16:elinks:INFO: Disabling clock on downlink 1
13:32:16:elinks:INFO: Disabling clock on downlink 2
13:32:16:elinks:INFO: Disabling clock on downlink 3
13:32:16:elinks:INFO: Disabling clock on downlink 4
13:32:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:32:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:32:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:16:elinks:INFO: Disabling clock on downlink 0
13:32:16:elinks:INFO: Disabling clock on downlink 1
13:32:16:elinks:INFO: Disabling clock on downlink 2
13:32:16:elinks:INFO: Disabling clock on downlink 3
13:32:16:elinks:INFO: Disabling clock on downlink 4
13:32:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:32:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:16:elinks:INFO: Disabling clock on downlink 0
13:32:16:elinks:INFO: Disabling clock on downlink 1
13:32:16:elinks:INFO: Disabling clock on downlink 2
13:32:16:elinks:INFO: Disabling clock on downlink 3
13:32:16:elinks:INFO: Disabling clock on downlink 4
13:32:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:32:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:17:elinks:INFO: Disabling clock on downlink 0
13:32:17:elinks:INFO: Disabling clock on downlink 1
13:32:17:elinks:INFO: Disabling clock on downlink 2
13:32:17:elinks:INFO: Disabling clock on downlink 3
13:32:17:elinks:INFO: Disabling clock on downlink 4
13:32:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:32:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:32:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:32:17:setup_element:INFO: Scanning clock phase
13:32:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:17:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:32:17:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:32:17:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:32:17:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:32:17:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:32:17:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:32:17:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:32:17:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:32:17:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:32:17:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
13:32:17:setup_element:INFO: Scanning data phases
13:32:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:23:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:32:23:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
13:32:23:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
13:32:23:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
13:32:23:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
13:32:23:setup_element:INFO: Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
13:32:23:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
13:32:23:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
13:32:23:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
13:32:23:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
13:32:23:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
13:32:23:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
13:32:23:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
13:32:23:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX_________
Data delay found: 8
13:32:23:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
13:32:23:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
13:32:23:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
13:32:23:setup_element:INFO: Setting the data phase to 35 for uplink 0
13:32:23:setup_element:INFO: Setting the data phase to 30 for uplink 1
13:32:23:setup_element:INFO: Setting the data phase to 31 for uplink 2
13:32:23:setup_element:INFO: Setting the data phase to 28 for uplink 3
13:32:23:setup_element:INFO: Setting the data phase to 26 for uplink 4
13:32:23:setup_element:INFO: Setting the data phase to 23 for uplink 5
13:32:23:setup_element:INFO: Setting the data phase to 21 for uplink 6
13:32:23:setup_element:INFO: Setting the data phase to 17 for uplink 7
13:32:23:setup_element:INFO: Setting the data phase to 8 for uplink 8
13:32:23:setup_element:INFO: Setting the data phase to 13 for uplink 9
13:32:23:setup_element:INFO: Setting the data phase to 8 for uplink 10
13:32:23:setup_element:INFO: Setting the data phase to 12 for uplink 11
13:32:23:setup_element:INFO: Setting the data phase to 8 for uplink 12
13:32:23:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:32:23:setup_element:INFO: Setting the data phase to 9 for uplink 14
13:32:23:setup_element:INFO: Setting the data phase to 12 for uplink 15
13:32:23:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXX___
Uplink 5: _______________________________________________________________________XXXXXX___
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
13:32:23:setup_element:INFO: Beginning SMX ASICs map scan
13:32:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:32:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:32:23:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:32:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:32:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:32:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:32:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:32:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:32:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:32:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:32:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:32:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:32:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:32:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:32:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:32:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:32:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:32:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:32:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:32:26:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXX___
Uplink 5: _______________________________________________________________________XXXXXX___
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
13:32:26:setup_element:INFO: Performing Elink synchronization
13:32:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:32:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:32:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:32:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:32:26:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:32:26:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
13:32:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:32:27:febtest:INFO: 1-0 | XA-000-08-002-002-006-239-03 | 9.3 | 1242.0
13:32:27:febtest:INFO: 8-1 | XA-000-08-002-002-006-247-04 | 47.3 | 1124.0
13:32:28:febtest:INFO: 3-2 | XA-000-08-002-002-006-241-04 | 25.1 | 1189.2
13:32:28:febtest:INFO: 10-3 | XA-000-08-002-002-007-002-15 | 21.9 | 1212.7
13:32:28:febtest:INFO: 5-4 | XA-000-08-002-002-006-240-04 | -0.1 | 1277.1
13:32:28:febtest:INFO: 12-5 | XA-000-08-002-002-007-005-15 | 18.7 | 1224.5
13:32:29:febtest:INFO: 7-6 | XA-000-08-002-002-006-238-03 | 21.9 | 1212.7
13:32:29:febtest:INFO: 14-7 | XA-000-08-002-002-007-004-15 | 40.9 | 1141.9
13:32:29:ST3_smx:INFO: Configuring SMX FAST
13:32:31:ST3_smx:INFO: chip: 1-0 18.745682 C 1212.728715 mV
13:32:31:ST3_smx:INFO: Electrons
13:32:31:ST3_smx:INFO: # loops 0
13:32:33:ST3_smx:INFO: # loops 1
13:32:35:ST3_smx:INFO: # loops 2
13:32:36:ST3_smx:INFO: # loops 3
13:32:38:ST3_smx:INFO: # loops 4
13:32:40:ST3_smx:INFO: Total # of broken channels: 0
13:32:40:ST3_smx:INFO: List of broken channels: []
13:32:40:ST3_smx:INFO: Total # of broken channels: 8
13:32:40:ST3_smx:INFO: List of broken channels: [89, 93, 95, 97, 101, 103, 111, 113]
13:32:40:ST3_smx:INFO: Configuring SMX FAST
13:32:42:ST3_smx:INFO: chip: 8-1 40.898880 C 1135.937260 mV
13:32:42:ST3_smx:INFO: Electrons
13:32:42:ST3_smx:INFO: # loops 0
13:32:44:ST3_smx:INFO: # loops 1
13:32:46:ST3_smx:INFO: # loops 2
13:32:48:ST3_smx:INFO: # loops 3
13:32:49:ST3_smx:INFO: # loops 4
13:32:51:ST3_smx:INFO: Total # of broken channels: 0
13:32:51:ST3_smx:INFO: List of broken channels: []
13:32:51:ST3_smx:INFO: Total # of broken channels: 51
13:32:51:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103]
13:32:51:ST3_smx:INFO: Configuring SMX FAST
13:32:53:ST3_smx:INFO: chip: 3-2 28.225000 C 1189.190035 mV
13:32:53:ST3_smx:INFO: Electrons
13:32:53:ST3_smx:INFO: # loops 0
13:32:55:ST3_smx:INFO: # loops 1
13:32:56:ST3_smx:INFO: # loops 2
13:32:58:ST3_smx:INFO: # loops 3
13:33:00:ST3_smx:INFO: # loops 4
13:33:01:ST3_smx:INFO: Total # of broken channels: 0
13:33:01:ST3_smx:INFO: List of broken channels: []
13:33:01:ST3_smx:INFO: Total # of broken channels: 0
13:33:01:ST3_smx:INFO: List of broken channels: []
13:33:02:ST3_smx:INFO: Configuring SMX FAST
13:33:04:ST3_smx:INFO: chip: 10-3 25.062742 C 1212.728715 mV
13:33:04:ST3_smx:INFO: Electrons
13:33:04:ST3_smx:INFO: # loops 0
13:33:05:ST3_smx:INFO: # loops 1
13:33:07:ST3_smx:INFO: # loops 2
13:33:09:ST3_smx:INFO: # loops 3
13:33:10:ST3_smx:INFO: # loops 4
13:33:12:ST3_smx:INFO: Total # of broken channels: 0
13:33:12:ST3_smx:INFO: List of broken channels: []
13:33:12:ST3_smx:INFO: Total # of broken channels: 0
13:33:12:ST3_smx:INFO: List of broken channels: []
13:33:12:ST3_smx:INFO: Configuring SMX FAST
13:33:14:ST3_smx:INFO: chip: 5-4 15.590880 C 1230.330540 mV
13:33:14:ST3_smx:INFO: Electrons
13:33:14:ST3_smx:INFO: # loops 0
13:33:16:ST3_smx:INFO: # loops 1
13:33:18:ST3_smx:INFO: # loops 2
13:33:19:ST3_smx:INFO: # loops 3
13:33:21:ST3_smx:INFO: # loops 4
13:33:22:ST3_smx:INFO: Total # of broken channels: 0
13:33:22:ST3_smx:INFO: List of broken channels: []
13:33:22:ST3_smx:INFO: Total # of broken channels: 0
13:33:22:ST3_smx:INFO: List of broken channels: []
13:33:23:ST3_smx:INFO: Configuring SMX FAST
13:33:25:ST3_smx:INFO: chip: 12-5 21.902970 C 1212.728715 mV
13:33:25:ST3_smx:INFO: Electrons
13:33:25:ST3_smx:INFO: # loops 0
13:33:26:ST3_smx:INFO: # loops 1
13:33:28:ST3_smx:INFO: # loops 2
13:33:30:ST3_smx:INFO: # loops 3
13:33:31:ST3_smx:INFO: # loops 4
13:33:33:ST3_smx:INFO: Total # of broken channels: 0
13:33:33:ST3_smx:INFO: List of broken channels: []
13:33:33:ST3_smx:INFO: Total # of broken channels: 0
13:33:33:ST3_smx:INFO: List of broken channels: []
13:33:33:ST3_smx:INFO: Configuring SMX FAST
13:33:35:ST3_smx:INFO: chip: 7-6 34.556970 C 1171.483840 mV
13:33:35:ST3_smx:INFO: Electrons
13:33:35:ST3_smx:INFO: # loops 0
13:33:37:ST3_smx:INFO: # loops 1
13:33:38:ST3_smx:INFO: # loops 2
13:33:40:ST3_smx:INFO: # loops 3
13:33:42:ST3_smx:INFO: # loops 4
13:33:43:ST3_smx:INFO: Total # of broken channels: 0
13:33:43:ST3_smx:INFO: List of broken channels: []
13:33:43:ST3_smx:INFO: Total # of broken channels: 0
13:33:43:ST3_smx:INFO: List of broken channels: []
13:33:44:ST3_smx:INFO: Configuring SMX FAST
13:33:46:ST3_smx:INFO: chip: 14-7 34.556970 C 1165.571835 mV
13:33:46:ST3_smx:INFO: Electrons
13:33:46:ST3_smx:INFO: # loops 0
13:33:47:ST3_smx:INFO: # loops 1
13:33:49:ST3_smx:INFO: # loops 2
13:33:51:ST3_smx:INFO: # loops 3
13:33:52:ST3_smx:INFO: # loops 4
13:33:54:ST3_smx:INFO: Total # of broken channels: 0
13:33:54:ST3_smx:INFO: List of broken channels: []
13:33:54:ST3_smx:INFO: Total # of broken channels: 0
13:33:54:ST3_smx:INFO: List of broken channels: []
13:33:55:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:33:55:febtest:INFO: 1-0 | XA-000-08-002-002-006-239-03 | 21.9 | 1212.7
13:33:55:febtest:INFO: 8-1 | XA-000-08-002-002-006-247-04 | 40.9 | 1141.9
13:33:56:febtest:INFO: 3-2 | XA-000-08-002-002-006-241-04 | 28.2 | 1189.2
13:33:56:febtest:INFO: 10-3 | XA-000-08-002-002-007-002-15 | 25.1 | 1212.7
13:33:56:febtest:INFO: 5-4 | XA-000-08-002-002-006-240-04 | 15.6 | 1230.3
13:33:56:febtest:INFO: 12-5 | XA-000-08-002-002-007-005-15 | 25.1 | 1212.7
13:33:57:febtest:INFO: 7-6 | XA-000-08-002-002-006-238-03 | 34.6 | 1171.5
13:33:57:febtest:INFO: 14-7 | XA-000-08-002-002-007-004-15 | 37.7 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_13-13_32_06
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1100
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME:
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.8900', '1.850', '0.4395']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9660', '1.850', '0.4308']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:34:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:05:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:34:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:06:febtest:INFO: Testing FEB with SN 1100
13:34:09:smx_tester:INFO: Scanning setup
13:34:09:elinks:INFO: Disabling clock on downlink 0
13:34:09:elinks:INFO: Disabling clock on downlink 1
13:34:09:elinks:INFO: Disabling clock on downlink 2
13:34:09:elinks:INFO: Disabling clock on downlink 3
13:34:09:elinks:INFO: Disabling clock on downlink 4
13:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:09:elinks:INFO: Disabling clock on downlink 0
13:34:09:elinks:INFO: Disabling clock on downlink 1
13:34:09:elinks:INFO: Disabling clock on downlink 2
13:34:09:elinks:INFO: Disabling clock on downlink 3
13:34:09:elinks:INFO: Disabling clock on downlink 4
13:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:34:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:09:elinks:INFO: Disabling clock on downlink 0
13:34:09:elinks:INFO: Disabling clock on downlink 1
13:34:09:elinks:INFO: Disabling clock on downlink 2
13:34:09:elinks:INFO: Disabling clock on downlink 3
13:34:09:elinks:INFO: Disabling clock on downlink 4
13:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:09:elinks:INFO: Disabling clock on downlink 0
13:34:09:elinks:INFO: Disabling clock on downlink 1
13:34:09:elinks:INFO: Disabling clock on downlink 2
13:34:09:elinks:INFO: Disabling clock on downlink 3
13:34:09:elinks:INFO: Disabling clock on downlink 4
13:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:09:elinks:INFO: Disabling clock on downlink 0
13:34:09:elinks:INFO: Disabling clock on downlink 1
13:34:09:elinks:INFO: Disabling clock on downlink 2
13:34:09:elinks:INFO: Disabling clock on downlink 3
13:34:09:elinks:INFO: Disabling clock on downlink 4
13:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:34:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:10:setup_element:INFO: Scanning clock phase
13:34:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:34:10:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:34:10:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:34:10:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:34:10:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:34:10:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:34:10:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:34:10:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:34:10:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:34:10:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
13:34:10:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
13:34:10:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
13:34:10:setup_element:INFO: Scanning data phases
13:34:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:34:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:34:16:setup_element:INFO: Eye window for uplink 0 : _____________XXXX_______________________
Data delay found: 34
13:34:16:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
13:34:16:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
13:34:16:setup_element:INFO: Eye window for uplink 3 : _____XXXXXX_____________________________
Data delay found: 27
13:34:16:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
13:34:16:setup_element:INFO: Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
13:34:16:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
13:34:16:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
13:34:16:setup_element:INFO: Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
13:34:16:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXX_____
Data delay found: 12
13:34:16:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
13:34:16:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXXX_____
Data delay found: 11
13:34:16:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
13:34:16:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
13:34:16:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
13:34:16:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
13:34:16:setup_element:INFO: Setting the data phase to 34 for uplink 0
13:34:16:setup_element:INFO: Setting the data phase to 30 for uplink 1
13:34:16:setup_element:INFO: Setting the data phase to 30 for uplink 2
13:34:16:setup_element:INFO: Setting the data phase to 27 for uplink 3
13:34:16:setup_element:INFO: Setting the data phase to 26 for uplink 4
13:34:16:setup_element:INFO: Setting the data phase to 21 for uplink 5
13:34:16:setup_element:INFO: Setting the data phase to 21 for uplink 6
13:34:16:setup_element:INFO: Setting the data phase to 17 for uplink 7
13:34:16:setup_element:INFO: Setting the data phase to 7 for uplink 8
13:34:16:setup_element:INFO: Setting the data phase to 12 for uplink 9
13:34:16:setup_element:INFO: Setting the data phase to 7 for uplink 10
13:34:16:setup_element:INFO: Setting the data phase to 11 for uplink 11
13:34:16:setup_element:INFO: Setting the data phase to 8 for uplink 12
13:34:16:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:34:16:setup_element:INFO: Setting the data phase to 9 for uplink 14
13:34:16:setup_element:INFO: Setting the data phase to 12 for uplink 15
13:34:16:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXX___
Uplink 5: _______________________________________________________________________XXXXXX___
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ________________________________________________________________________________
Uplink 15: ________________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 10:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
13:34:16:setup_element:INFO: Beginning SMX ASICs map scan
13:34:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:34:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:34:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:34:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:34:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:34:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:34:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:34:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:34:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:34:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:34:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:34:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:34:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:34:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:34:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:34:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:34:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:34:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:34:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:34:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:34:18:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXX___
Uplink 5: _______________________________________________________________________XXXXXX___
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ________________________________________________________________________________
Uplink 15: ________________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 10:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
13:34:18:setup_element:INFO: Performing Elink synchronization
13:34:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:34:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:34:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:34:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:34:18:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:34:19:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
13:34:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:34:20:febtest:INFO: 1-0 | XA-000-08-002-002-006-239-03 | 12.4 | 1253.7
13:34:21:febtest:INFO: 8-1 | XA-000-08-002-002-006-247-04 | 50.4 | 1118.1
13:34:21:febtest:INFO: 3-2 | XA-000-08-002-002-006-241-04 | 31.4 | 1183.3
13:34:21:febtest:INFO: 10-3 | XA-000-08-002-002-007-002-15 | 25.1 | 1212.7
13:34:21:febtest:INFO: 5-4 | XA-000-08-002-002-006-240-04 | 15.6 | 1247.9
13:34:21:febtest:INFO: 12-5 | XA-000-08-002-002-007-005-15 | 28.2 | 1201.0
13:34:22:febtest:INFO: 7-6 | XA-000-08-002-002-006-238-03 | 25.1 | 1212.7
13:34:22:febtest:INFO: 14-7 | XA-000-08-002-002-007-004-15 | 44.1 | 1141.9
13:34:22:ST3_smx:INFO: Configuring SMX FAST
13:34:24:ST3_smx:INFO: chip: 1-0 21.902970 C 1212.728715 mV
13:34:24:ST3_smx:INFO: Electrons
13:34:24:ST3_smx:INFO: # loops 0
13:34:26:ST3_smx:INFO: # loops 1
13:34:27:ST3_smx:INFO: # loops 2
13:34:29:ST3_smx:INFO: # loops 3
13:34:31:ST3_smx:INFO: # loops 4
13:34:32:ST3_smx:INFO: Total # of broken channels: 0
13:34:32:ST3_smx:INFO: List of broken channels: []
13:34:32:ST3_smx:INFO: Total # of broken channels: 0
13:34:32:ST3_smx:INFO: List of broken channels: []
13:34:33:ST3_smx:INFO: Configuring SMX FAST
13:34:35:ST3_smx:INFO: chip: 8-1 44.073563 C 1141.874115 mV
13:34:35:ST3_smx:INFO: Electrons
13:34:35:ST3_smx:INFO: # loops 0
13:34:37:ST3_smx:INFO: # loops 1
13:34:38:ST3_smx:INFO: # loops 2
13:34:40:ST3_smx:INFO: # loops 3
13:34:42:ST3_smx:INFO: # loops 4
13:34:43:ST3_smx:INFO: Total # of broken channels: 0
13:34:43:ST3_smx:INFO: List of broken channels: []
13:34:43:ST3_smx:INFO: Total # of broken channels: 0
13:34:43:ST3_smx:INFO: List of broken channels: []
13:34:44:ST3_smx:INFO: Configuring SMX FAST
13:34:46:ST3_smx:INFO: chip: 3-2 31.389742 C 1189.190035 mV
13:34:46:ST3_smx:INFO: Electrons
13:34:46:ST3_smx:INFO: # loops 0
13:34:48:ST3_smx:INFO: # loops 1
13:34:49:ST3_smx:INFO: # loops 2
13:34:51:ST3_smx:INFO: # loops 3
13:34:53:ST3_smx:INFO: # loops 4
13:34:54:ST3_smx:INFO: Total # of broken channels: 0
13:34:54:ST3_smx:INFO: List of broken channels: []
13:34:54:ST3_smx:INFO: Total # of broken channels: 0
13:34:54:ST3_smx:INFO: List of broken channels: []
13:34:55:ST3_smx:INFO: Configuring SMX FAST
13:34:57:ST3_smx:INFO: chip: 10-3 25.062742 C 1212.728715 mV
13:34:57:ST3_smx:INFO: Electrons
13:34:57:ST3_smx:INFO: # loops 0
13:34:59:ST3_smx:INFO: # loops 1
13:35:01:ST3_smx:INFO: # loops 2
13:35:02:ST3_smx:INFO: # loops 3
13:35:04:ST3_smx:INFO: # loops 4
13:35:06:ST3_smx:INFO: Total # of broken channels: 0
13:35:06:ST3_smx:INFO: List of broken channels: []
13:35:06:ST3_smx:INFO: Total # of broken channels: 0
13:35:06:ST3_smx:INFO: List of broken channels: []
13:35:06:ST3_smx:INFO: Configuring SMX FAST
13:35:08:ST3_smx:INFO: chip: 5-4 18.745682 C 1230.330540 mV
13:35:08:ST3_smx:INFO: Electrons
13:35:08:ST3_smx:INFO: # loops 0
13:35:10:ST3_smx:INFO: # loops 1
13:35:12:ST3_smx:INFO: # loops 2
13:35:13:ST3_smx:INFO: # loops 3
13:35:15:ST3_smx:INFO: # loops 4
13:35:17:ST3_smx:INFO: Total # of broken channels: 0
13:35:17:ST3_smx:INFO: List of broken channels: []
13:35:17:ST3_smx:INFO: Total # of broken channels: 0
13:35:17:ST3_smx:INFO: List of broken channels: []
13:35:18:ST3_smx:INFO: Configuring SMX FAST
13:35:20:ST3_smx:INFO: chip: 12-5 25.062742 C 1212.728715 mV
13:35:20:ST3_smx:INFO: Electrons
13:35:20:ST3_smx:INFO: # loops 0
13:35:21:ST3_smx:INFO: # loops 1
13:35:23:ST3_smx:INFO: # loops 2
13:35:25:ST3_smx:INFO: # loops 3
13:35:26:ST3_smx:INFO: # loops 4
13:35:28:ST3_smx:INFO: Total # of broken channels: 0
13:35:28:ST3_smx:INFO: List of broken channels: []
13:35:28:ST3_smx:INFO: Total # of broken channels: 0
13:35:28:ST3_smx:INFO: List of broken channels: []
13:35:29:ST3_smx:INFO: Configuring SMX FAST
13:35:31:ST3_smx:INFO: chip: 7-6 37.726682 C 1171.483840 mV
13:35:31:ST3_smx:INFO: Electrons
13:35:31:ST3_smx:INFO: # loops 0
13:35:33:ST3_smx:INFO: # loops 1
13:35:34:ST3_smx:INFO: # loops 2
13:35:36:ST3_smx:INFO: # loops 3
13:35:38:ST3_smx:INFO: # loops 4
13:35:39:ST3_smx:INFO: Total # of broken channels: 0
13:35:39:ST3_smx:INFO: List of broken channels: []
13:35:39:ST3_smx:INFO: Total # of broken channels: 0
13:35:39:ST3_smx:INFO: List of broken channels: []
13:35:40:ST3_smx:INFO: Configuring SMX FAST
13:35:42:ST3_smx:INFO: chip: 14-7 37.726682 C 1165.571835 mV
13:35:42:ST3_smx:INFO: Electrons
13:35:42:ST3_smx:INFO: # loops 0
13:35:44:ST3_smx:INFO: # loops 1
13:35:45:ST3_smx:INFO: # loops 2
13:35:47:ST3_smx:INFO: # loops 3
13:35:49:ST3_smx:INFO: # loops 4
13:35:50:ST3_smx:INFO: Total # of broken channels: 0
13:35:50:ST3_smx:INFO: List of broken channels: []
13:35:50:ST3_smx:INFO: Total # of broken channels: 0
13:35:50:ST3_smx:INFO: List of broken channels: []
13:35:51:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:35:52:febtest:INFO: 1-0 | XA-000-08-002-002-006-239-03 | 25.1 | 1212.7
13:35:52:febtest:INFO: 8-1 | XA-000-08-002-002-006-247-04 | 44.1 | 1141.9
13:35:52:febtest:INFO: 3-2 | XA-000-08-002-002-006-241-04 | 31.4 | 1189.2
13:35:52:febtest:INFO: 10-3 | XA-000-08-002-002-007-002-15 | 25.1 | 1212.7
13:35:52:febtest:INFO: 5-4 | XA-000-08-002-002-006-240-04 | 18.7 | 1230.3
13:35:53:febtest:INFO: 12-5 | XA-000-08-002-002-007-005-15 | 25.1 | 1212.7
13:35:53:febtest:INFO: 7-6 | XA-000-08-002-002-006-238-03 | 37.7 | 1171.5
13:35:53:febtest:INFO: 14-7 | XA-000-08-002-002-007-004-15 | 40.9 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_13-13_34_05
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1100
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '2.0320', '1.850', '2.3710']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9660', '1.850', '0.4308']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:36:01:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1100/TestDate_2024_02_13-13_34_05/