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FEB_1101 09.02.24 10:44:03
TextEdit.txt
10:43:53:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
10:43:54:febtest:INFO: FEB 8-2 selected
10:43:54:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:43:57:ST3_Shared:INFO: Listo of operators:Robert V.;
10:44:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:03:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:44:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:21:ST3_ModuleSelector:INFO: P 0197 L14 M00
10:44:21:ST3_ModuleSelector:INFO: 01202
10:44:21:febtest:INFO: Testing FEB with SN 1101
10:44:24:smx_tester:INFO: Scanning setup
10:44:24:elinks:INFO: Disabling clock on downlink 0
10:44:24:elinks:INFO: Disabling clock on downlink 1
10:44:24:elinks:INFO: Disabling clock on downlink 2
10:44:24:elinks:INFO: Disabling clock on downlink 3
10:44:24:elinks:INFO: Disabling clock on downlink 4
10:44:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:44:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:24:elinks:INFO: Disabling clock on downlink 0
10:44:24:elinks:INFO: Disabling clock on downlink 1
10:44:24:elinks:INFO: Disabling clock on downlink 2
10:44:24:elinks:INFO: Disabling clock on downlink 3
10:44:24:elinks:INFO: Disabling clock on downlink 4
10:44:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:44:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:44:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:24:elinks:INFO: Disabling clock on downlink 0
10:44:24:elinks:INFO: Disabling clock on downlink 1
10:44:24:elinks:INFO: Disabling clock on downlink 2
10:44:24:elinks:INFO: Disabling clock on downlink 3
10:44:24:elinks:INFO: Disabling clock on downlink 4
10:44:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:25:elinks:INFO: Disabling clock on downlink 0
10:44:25:elinks:INFO: Disabling clock on downlink 1
10:44:25:elinks:INFO: Disabling clock on downlink 2
10:44:25:elinks:INFO: Disabling clock on downlink 3
10:44:25:elinks:INFO: Disabling clock on downlink 4
10:44:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:44:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:25:elinks:INFO: Disabling clock on downlink 0
10:44:25:elinks:INFO: Disabling clock on downlink 1
10:44:25:elinks:INFO: Disabling clock on downlink 2
10:44:25:elinks:INFO: Disabling clock on downlink 3
10:44:25:elinks:INFO: Disabling clock on downlink 4
10:44:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:44:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:25:setup_element:INFO: Scanning clock phase
10:44:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:44:25:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:44:25:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:44:25:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:44:25:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:44:25:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:44:25:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:44:25:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:44:25:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:44:25:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:44:25:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:44:25:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:44:25:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:44:25:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:44:25:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:44:25:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:44:25:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:44:25:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:44:25:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:44:25:setup_element:INFO: Scanning data phases
10:44:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:44:31:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:44:31:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
10:44:31:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
10:44:31:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
10:44:31:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
10:44:31:setup_element:INFO: Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
10:44:31:setup_element:INFO: Eye window for uplink 5 : ____XXXX________________________________
Data delay found: 25
10:44:31:setup_element:INFO: Eye window for uplink 6 : XXXXX__________________________________X
Data delay found: 21
10:44:31:setup_element:INFO: Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
10:44:31:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
10:44:31:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:44:31:setup_element:INFO: Eye window for uplink 10: _______________________XXXXXX___________
Data delay found: 5
10:44:31:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXX________
Data delay found: 9
10:44:31:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
10:44:31:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
10:44:31:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXXX______
Data delay found: 10
10:44:31:setup_element:INFO: Eye window for uplink 15: _______________________________XXXX_____
Data delay found: 12
10:44:31:setup_element:INFO: Setting the data phase to 34 for uplink 0
10:44:31:setup_element:INFO: Setting the data phase to 29 for uplink 1
10:44:31:setup_element:INFO: Setting the data phase to 29 for uplink 2
10:44:31:setup_element:INFO: Setting the data phase to 26 for uplink 3
10:44:31:setup_element:INFO: Setting the data phase to 30 for uplink 4
10:44:31:setup_element:INFO: Setting the data phase to 25 for uplink 5
10:44:31:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:44:31:setup_element:INFO: Setting the data phase to 18 for uplink 7
10:44:31:setup_element:INFO: Setting the data phase to 5 for uplink 8
10:44:31:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:44:31:setup_element:INFO: Setting the data phase to 5 for uplink 10
10:44:31:setup_element:INFO: Setting the data phase to 9 for uplink 11
10:44:31:setup_element:INFO: Setting the data phase to 10 for uplink 12
10:44:31:setup_element:INFO: Setting the data phase to 14 for uplink 13
10:44:31:setup_element:INFO: Setting the data phase to 10 for uplink 14
10:44:31:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:44:31:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 5:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 7:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 11:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 12:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 15:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
]
10:44:31:setup_element:INFO: Beginning SMX ASICs map scan
10:44:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:44:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:44:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:44:31:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:44:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:44:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:44:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:44:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:44:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:44:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:44:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:44:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:44:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:44:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:44:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:44:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:44:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:44:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:44:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:44:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:44:34:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 5:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 7:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 11:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 12:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 15:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
10:44:34:setup_element:INFO: Performing Elink synchronization
10:44:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:44:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:44:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:44:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:44:34:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:44:34:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:44:35:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:44:36:febtest:INFO: 1-0 | XA-000-08-002-002-007-176-12 | 12.4 | 1247.9
10:44:36:febtest:INFO: 8-1 | XA-000-08-002-002-007-174-11 | 15.6 | 1224.5
10:44:36:febtest:INFO: 3-2 | XA-000-08-002-000-002-026-10 | 15.6 | 1242.0
10:44:36:febtest:INFO: 10-3 | XA-000-08-002-000-000-148-03 | 47.3 | 1124.0
10:44:36:febtest:INFO: 5-4 | XA-000-08-002-002-008-040-05 | 25.1 | 1195.1
10:44:37:febtest:INFO: 12-5 | XA-000-08-002-002-007-154-02 | 9.3 | 1253.7
10:44:37:febtest:INFO: 7-6 | XA-000-08-002-002-007-153-02 | 25.1 | 1206.9
10:44:37:febtest:INFO: 14-7 | XA-000-08-002-002-007-178-12 | 18.7 | 1218.6
10:44:38:ST3_smx:INFO: Configuring SMX FAST
10:44:40:ST3_smx:INFO: chip: 1-0 6.141382 C 1265.400000 mV
10:44:40:ST3_smx:INFO: Electrons
10:44:40:ST3_smx:INFO: # loops 0
10:44:41:ST3_smx:INFO: # loops 1
10:44:43:ST3_smx:INFO: # loops 2
10:44:45:ST3_smx:INFO: # loops 3
10:44:46:ST3_smx:INFO: # loops 4
10:44:48:ST3_smx:INFO: Total # of broken channels: 0
10:44:48:ST3_smx:INFO: List of broken channels: []
10:44:48:ST3_smx:INFO: Total # of broken channels: 0
10:44:48:ST3_smx:INFO: List of broken channels: []
10:44:49:ST3_smx:INFO: Configuring SMX FAST
10:44:51:ST3_smx:INFO: chip: 8-1 21.902970 C 1206.851500 mV
10:44:51:ST3_smx:INFO: Electrons
10:44:51:ST3_smx:INFO: # loops 0
10:44:52:ST3_smx:INFO: # loops 1
10:44:54:ST3_smx:INFO: # loops 2
10:44:56:ST3_smx:INFO: # loops 3
10:44:57:ST3_smx:INFO: # loops 4
10:44:59:ST3_smx:INFO: Total # of broken channels: 0
10:44:59:ST3_smx:INFO: List of broken channels: []
10:44:59:ST3_smx:INFO: Total # of broken channels: 0
10:44:59:ST3_smx:INFO: List of broken channels: []
10:44:59:ST3_smx:INFO: Configuring SMX FAST
10:45:01:ST3_smx:INFO: chip: 3-2 21.902970 C 1218.600960 mV
10:45:01:ST3_smx:INFO: Electrons
10:45:01:ST3_smx:INFO: # loops 0
10:45:03:ST3_smx:INFO: # loops 1
10:45:05:ST3_smx:INFO: # loops 2
10:45:06:ST3_smx:INFO: # loops 3
10:45:08:ST3_smx:INFO: # loops 4
10:45:10:ST3_smx:INFO: Total # of broken channels: 0
10:45:10:ST3_smx:INFO: List of broken channels: []
10:45:10:ST3_smx:INFO: Total # of broken channels: 0
10:45:10:ST3_smx:INFO: List of broken channels: []
10:45:10:ST3_smx:INFO: Configuring SMX FAST
10:45:12:ST3_smx:INFO: chip: 10-3 47.250730 C 1129.995435 mV
10:45:12:ST3_smx:INFO: Electrons
10:45:12:ST3_smx:INFO: # loops 0
10:45:14:ST3_smx:INFO: # loops 1
10:45:15:ST3_smx:INFO: # loops 2
10:45:17:ST3_smx:INFO: # loops 3
10:45:19:ST3_smx:INFO: # loops 4
10:45:20:ST3_smx:INFO: Total # of broken channels: 2
10:45:20:ST3_smx:INFO: List of broken channels: [1, 3]
10:45:20:ST3_smx:INFO: Total # of broken channels: 2
10:45:20:ST3_smx:INFO: List of broken channels: [1, 3]
10:45:21:ST3_smx:INFO: Configuring SMX FAST
10:45:23:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV
10:45:23:ST3_smx:INFO: Electrons
10:45:23:ST3_smx:INFO: # loops 0
10:45:24:ST3_smx:INFO: # loops 1
10:45:26:ST3_smx:INFO: # loops 2
10:45:28:ST3_smx:INFO: # loops 3
10:45:29:ST3_smx:INFO: # loops 4
10:45:31:ST3_smx:INFO: Total # of broken channels: 6
10:45:31:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5]
10:45:31:ST3_smx:INFO: Total # of broken channels: 9
10:45:31:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 62, 124, 126]
10:45:31:ST3_smx:INFO: Configuring SMX FAST
10:45:34:ST3_smx:INFO: chip: 12-5 21.902970 C 1224.468235 mV
10:45:34:ST3_smx:INFO: Electrons
10:45:34:ST3_smx:INFO: # loops 0
10:45:35:ST3_smx:INFO: # loops 1
10:45:37:ST3_smx:INFO: # loops 2
10:45:38:ST3_smx:INFO: # loops 3
10:45:40:ST3_smx:INFO: # loops 4
10:45:42:ST3_smx:INFO: Total # of broken channels: 0
10:45:42:ST3_smx:INFO: List of broken channels: []
10:45:42:ST3_smx:INFO: Total # of broken channels: 0
10:45:42:ST3_smx:INFO: List of broken channels: []
10:45:42:ST3_smx:INFO: Configuring SMX FAST
10:45:44:ST3_smx:INFO: chip: 7-6 25.062742 C 1224.468235 mV
10:45:44:ST3_smx:INFO: Electrons
10:45:44:ST3_smx:INFO: # loops 0
10:45:46:ST3_smx:INFO: # loops 1
10:45:48:ST3_smx:INFO: # loops 2
10:45:49:ST3_smx:INFO: # loops 3
10:45:51:ST3_smx:INFO: # loops 4
10:45:52:ST3_smx:INFO: Total # of broken channels: 0
10:45:52:ST3_smx:INFO: List of broken channels: []
10:45:52:ST3_smx:INFO: Total # of broken channels: 0
10:45:52:ST3_smx:INFO: List of broken channels: []
10:45:53:ST3_smx:INFO: Configuring SMX FAST
10:45:55:ST3_smx:INFO: chip: 14-7 9.288730 C 1247.887635 mV
10:45:55:ST3_smx:INFO: Electrons
10:45:55:ST3_smx:INFO: # loops 0
10:45:56:ST3_smx:INFO: # loops 1
10:45:58:ST3_smx:INFO: # loops 2
10:46:00:ST3_smx:INFO: # loops 3
10:46:01:ST3_smx:INFO: # loops 4
10:46:03:ST3_smx:INFO: Total # of broken channels: 0
10:46:03:ST3_smx:INFO: List of broken channels: []10:46:35:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1101/TestDate_2024_02_09-10_44_03/
10:46:03:ST3_smx:INFO: Total # of broken channels: 0
10:46:03:ST3_smx:INFO: List of broken channels: []
10:46:04:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:46:04:febtest:INFO: 1-0 | XA-000-08-002-002-007-176-12 | 9.3 | 1265.4
10:46:04:febtest:INFO: 8-1 | XA-000-08-002-002-007-174-11 | 21.9 | 1206.9
10:46:05:febtest:INFO: 3-2 | XA-000-08-002-000-002-026-10 | 25.1 | 1218.6
10:46:05:febtest:INFO: 10-3 | XA-000-08-002-000-000-148-03 | 47.3 | 1135.9
10:46:05:febtest:INFO: 5-4 | XA-000-08-002-002-008-040-05 | 28.2 | 1206.9
10:46:05:febtest:INFO: 12-5 | XA-000-08-002-002-007-154-02 | 21.9 | 1224.5
10:46:06:febtest:INFO: 7-6 | XA-000-08-002-002-007-153-02 | 25.1 | 1224.5
10:46:06:febtest:INFO: 14-7 | XA-000-08-002-002-007-178-12 | 12.4 | 1253.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_09-10_44_03
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : P 0197 L14 M00
FEB_SN : 1101
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 01202
MODULE_NAME: P 0197 L14 M00
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9640', '1.850', '0.4985']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9640', '1.850', '0.3131']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']