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FEB_1101 06.02.24 09:42:28
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09:38:12:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
09:38:12:febtest:INFO: FEB 8-2 selected
09:38:12:smx_tester:INFO: Setting Elink clock mode to 160 MHz
09:38:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:20:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:38:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:20:febtest:INFO: Testing FEB with SN 1101
09:38:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:41:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:38:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:42:febtest:INFO: Testing FEB with SN 1101
09:39:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:39:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:39:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:40:febtest:INFO: Testing FEB with SN 1101
09:40:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:16:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:40:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:16:febtest:INFO: Testing FEB with SN 1101
09:40:19:smx_tester:INFO: Scanning setup
09:40:19:elinks:INFO: Disabling clock on downlink 0
09:40:19:elinks:INFO: Disabling clock on downlink 1
09:40:19:elinks:INFO: Disabling clock on downlink 2
09:40:19:elinks:INFO: Disabling clock on downlink 3
09:40:19:elinks:INFO: Disabling clock on downlink 4
09:40:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:40:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:19:elinks:INFO: Disabling clock on downlink 0
09:40:19:elinks:INFO: Disabling clock on downlink 1
09:40:19:elinks:INFO: Disabling clock on downlink 2
09:40:19:elinks:INFO: Disabling clock on downlink 3
09:40:19:elinks:INFO: Disabling clock on downlink 4
09:40:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:40:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:40:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:19:elinks:INFO: Disabling clock on downlink 0
09:40:19:elinks:INFO: Disabling clock on downlink 1
09:40:19:elinks:INFO: Disabling clock on downlink 2
09:40:19:elinks:INFO: Disabling clock on downlink 3
09:40:19:elinks:INFO: Disabling clock on downlink 4
09:40:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:19:elinks:INFO: Disabling clock on downlink 0
09:40:19:elinks:INFO: Disabling clock on downlink 1
09:40:19:elinks:INFO: Disabling clock on downlink 2
09:40:19:elinks:INFO: Disabling clock on downlink 3
09:40:19:elinks:INFO: Disabling clock on downlink 4
09:40:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:20:elinks:INFO: Disabling clock on downlink 0
09:40:20:elinks:INFO: Disabling clock on downlink 1
09:40:20:elinks:INFO: Disabling clock on downlink 2
09:40:20:elinks:INFO: Disabling clock on downlink 3
09:40:20:elinks:INFO: Disabling clock on downlink 4
09:40:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:20:setup_element:INFO: Scanning clock phase
09:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:40:20:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:40:20:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:40:20:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:40:20:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:40:20:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:40:20:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:40:20:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:40:20:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:40:20:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:40:20:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:40:20:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
09:40:20:setup_element:INFO: Scanning data phases
09:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:26:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:40:26:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:40:26:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:40:26:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
09:40:26:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_______________________________
Data delay found: 25
09:40:26:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
09:40:26:setup_element:INFO: Eye window for uplink 5 : __XXXX__________________________________
Data delay found: 23
09:40:26:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
09:40:26:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXXX_
Data delay found: 15
09:40:26:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
09:40:26:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:40:26:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXX_______
Data delay found: 9
09:40:26:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
09:40:26:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
09:40:26:setup_element:INFO: Eye window for uplink 13: _____________________________XXXX_______
Data delay found: 10
09:40:26:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
09:40:26:setup_element:INFO: Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
09:40:26:setup_element:INFO: Setting the data phase to 34 for uplink 0
09:40:26:setup_element:INFO: Setting the data phase to 29 for uplink 1
09:40:26:setup_element:INFO: Setting the data phase to 28 for uplink 2
09:40:26:setup_element:INFO: Setting the data phase to 25 for uplink 3
09:40:26:setup_element:INFO: Setting the data phase to 28 for uplink 4
09:40:26:setup_element:INFO: Setting the data phase to 23 for uplink 5
09:40:26:setup_element:INFO: Setting the data phase to 20 for uplink 6
09:40:26:setup_element:INFO: Setting the data phase to 15 for uplink 7
09:40:26:setup_element:INFO: Setting the data phase to 6 for uplink 8
09:40:26:setup_element:INFO: Setting the data phase to 12 for uplink 9
09:40:26:setup_element:INFO: Setting the data phase to 9 for uplink 10
09:40:26:setup_element:INFO: Setting the data phase to 13 for uplink 11
09:40:26:setup_element:INFO: Setting the data phase to 8 for uplink 12
09:40:26:setup_element:INFO: Setting the data phase to 10 for uplink 13
09:40:26:setup_element:INFO: Setting the data phase to 10 for uplink 14
09:40:26:setup_element:INFO: Setting the data phase to 11 for uplink 15
09:40:26:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
]
09:40:26:setup_element:INFO: Beginning SMX ASICs map scan
09:40:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:40:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:40:26:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:40:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:40:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:40:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:40:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:40:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:40:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:40:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:40:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:40:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:40:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:40:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:40:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:40:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:40:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:40:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:40:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:40:28:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
09:40:28:setup_element:INFO: Performing Elink synchronization
09:40:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:40:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:40:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:40:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:40:29:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
09:40:30:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:40:30:febtest:INFO: 1-0 | XA-000-08-002-001-006-160-07 | 34.6 | 1195.1
09:40:31:febtest:INFO: 8-1 | XA-000-08-002-001-006-165-07 | 34.6 | 1206.9
09:40:31:febtest:INFO: 3-2 | XA-000-08-002-001-006-175-07 | 25.1 | 1242.0
09:40:31:febtest:INFO: 10-3 | XA-000-08-002-001-006-179-00 | 40.9 | 1189.2
09:40:31:febtest:INFO: 5-4 | XA-000-08-002-001-006-178-00 | 37.7 | 1183.3
09:40:31:febtest:INFO: 12-5 | XA-000-08-002-001-006-174-07 | 12.4 | 1300.3
09:40:32:febtest:INFO: 7-6 | XA-000-08-002-001-006-167-07 | 31.4 | 1212.7
09:40:32:febtest:INFO: 14-7 | XA-000-08-002-001-006-162-07 | 34.6 | 1218.6
09:40:32:ST3_smx:INFO: Configuring SMX FAST
09:40:34:ST3_smx:INFO: chip: 1-0 40.898880 C 1177.390875 mV
09:40:34:ST3_smx:INFO: Electrons
09:40:34:ST3_smx:INFO: # loops 0
09:40:36:ST3_smx:INFO: # loops 1
09:40:37:ST3_smx:INFO: # loops 2
09:40:39:ST3_smx:INFO: # loops 3
09:40:41:ST3_smx:INFO: # loops 4
09:40:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:40:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:40:42:ST3_smx:INFO: Total # of broken channels: 128
09:40:42:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:40:42:ST3_smx:INFO: Total # of broken channels: 128
09:40:42:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:40:43:ST3_smx:INFO: Configuring SMX FAST
09:40:45:ST3_smx:INFO: chip: 8-1 44.073563 C 1189.190035 mV
09:40:45:ST3_smx:INFO: Electrons
09:40:45:ST3_smx:INFO: # loops 0
09:40:47:ST3_smx:INFO: # loops 1
09:40:49:ST3_smx:INFO: # loops 2
09:40:51:ST3_smx:INFO: # loops 3
09:40:52:ST3_smx:INFO: # loops 4
09:40:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:40:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:40:54:ST3_smx:INFO: Total # of broken channels: 128
09:40:54:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:40:54:ST3_smx:INFO: Total # of broken channels: 128
09:40:54:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:40:55:ST3_smx:INFO: Configuring SMX FAST
09:40:57:ST3_smx:INFO: chip: 3-2 28.225000 C 1236.187875 mV
09:40:57:ST3_smx:INFO: Electrons
09:40:57:ST3_smx:INFO: # loops 0
09:40:58:ST3_smx:INFO: # loops 1
09:41:00:ST3_smx:INFO: # loops 2
09:41:02:ST3_smx:INFO: # loops 3
09:41:04:ST3_smx:INFO: # loops 4
09:41:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:05:ST3_smx:INFO: Total # of broken channels: 128
09:41:05:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:05:ST3_smx:INFO: Total # of broken channels: 128
09:41:05:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:06:ST3_smx:INFO: Configuring SMX FAST
09:41:08:ST3_smx:INFO: chip: 10-3 44.073563 C 1183.292940 mV
09:41:08:ST3_smx:INFO: Electrons
09:41:08:ST3_smx:INFO: # loops 0
09:41:10:ST3_smx:INFO: # loops 1
09:41:12:ST3_smx:INFO: # loops 2
09:41:13:ST3_smx:INFO: # loops 3
09:41:15:ST3_smx:INFO: # loops 4
09:41:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:17:ST3_smx:INFO: Total # of broken channels: 128
09:41:17:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:17:ST3_smx:INFO: Total # of broken channels: 128
09:41:17:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:18:ST3_smx:INFO: Configuring SMX FAST
09:41:20:ST3_smx:INFO: chip: 5-4 44.073563 C 1183.292940 mV
09:41:20:ST3_smx:INFO: Electrons
09:41:20:ST3_smx:INFO: # loops 0
09:41:21:ST3_smx:INFO: # loops 1
09:41:23:ST3_smx:INFO: # loops 2
09:41:25:ST3_smx:INFO: # loops 3
09:41:27:ST3_smx:INFO: # loops 4
09:41:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:28:ST3_smx:INFO: Total # of broken channels: 128
09:41:28:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:28:ST3_smx:INFO: Total # of broken channels: 128
09:41:28:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:29:ST3_smx:INFO: Configuring SMX FAST
09:41:31:ST3_smx:INFO: chip: 12-5 31.389742 C 1253.730060 mV
09:41:31:ST3_smx:INFO: Electrons
09:41:31:ST3_smx:INFO: # loops 0
09:41:33:ST3_smx:INFO: # loops 1
09:41:34:ST3_smx:INFO: # loops 2
09:41:36:ST3_smx:INFO: # loops 3
09:41:38:ST3_smx:INFO: # loops 4
09:41:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:39:ST3_smx:INFO: Total # of broken channels: 128
09:41:39:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:39:ST3_smx:INFO: Total # of broken channels: 128
09:41:39:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:40:ST3_smx:INFO: Configuring SMX FAST
09:41:42:ST3_smx:INFO: chip: 7-6 37.726682 C 1212.728715 mV
09:41:42:ST3_smx:INFO: Electrons
09:41:42:ST3_smx:INFO: # loops 0
09:41:44:ST3_smx:INFO: # loops 1
09:41:46:ST3_smx:INFO: # loops 2
09:41:47:ST3_smx:INFO: # loops 3
09:41:49:ST3_smx:INFO: # loops 4
09:41:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:51:ST3_smx:INFO: Total # of broken channels: 128
09:41:51:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:51:ST3_smx:INFO: Total # of broken channels: 128
09:41:51:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:41:52:ST3_smx:INFO: Configuring SMX FAST
09:41:54:ST3_smx:INFO: chip: 14-7 37.726682 C 1236.187875 mV
09:41:54:ST3_smx:INFO: Electrons
09:41:54:ST3_smx:INFO: # loops 0
09:41:55:ST3_smx:INFO: # loops 1
09:41:57:ST3_smx:INFO: # loops 2
09:41:59:ST3_smx:INFO: # loops 3
09:42:00:ST3_smx:INFO: # loops 4
09:42:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:42:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:42:02:ST3_smx:INFO: Total # of broken channels: 128
09:42:02:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:42:02:ST3_smx:INFO: Total # of broken channels: 128
09:42:02:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:42:03:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:42:03:febtest:INFO: 1-0 | XA-000-08-002-001-006-160-07 | 44.1 | 1177.4
09:42:03:febtest:INFO: 8-1 | XA-000-08-002-001-006-165-07 | 47.3 | 1189.2
09:42:04:febtest:INFO: 3-2 | XA-000-08-002-001-006-175-07 | 31.4 | 1230.3
09:42:04:febtest:INFO: 10-3 | XA-000-08-002-001-006-179-00 | 47.3 | 1189.2
09:42:04:febtest:INFO: 5-4 | XA-000-08-002-001-006-178-00 | 47.3 | 1183.3
09:42:04:febtest:INFO: 12-5 | XA-000-08-002-001-006-174-07 | 31.4 | 1253.7
09:42:04:febtest:INFO: 7-6 | XA-000-08-002-001-006-167-07 | 37.7 | 1212.7
09:42:05:febtest:INFO: 14-7 | XA-000-08-002-001-006-162-07 | 37.7 | 1230.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_06-09_40_16
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1101
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.4590', '1.850', '2.2750']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:42:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:42:28:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:42:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:42:29:febtest:INFO: Testing FEB with SN 1101
09:42:31:smx_tester:INFO: Scanning setup
09:42:31:elinks:INFO: Disabling clock on downlink 0
09:42:31:elinks:INFO: Disabling clock on downlink 1
09:42:31:elinks:INFO: Disabling clock on downlink 2
09:42:31:elinks:INFO: Disabling clock on downlink 3
09:42:31:elinks:INFO: Disabling clock on downlink 4
09:42:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:42:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:42:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:42:31:elinks:INFO: Disabling clock on downlink 0
09:42:31:elinks:INFO: Disabling clock on downlink 1
09:42:31:elinks:INFO: Disabling clock on downlink 2
09:42:31:elinks:INFO: Disabling clock on downlink 3
09:42:31:elinks:INFO: Disabling clock on downlink 4
09:42:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:42:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:42:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:42:32:elinks:INFO: Disabling clock on downlink 0
09:42:32:elinks:INFO: Disabling clock on downlink 1
09:42:32:elinks:INFO: Disabling clock on downlink 2
09:42:32:elinks:INFO: Disabling clock on downlink 3
09:42:32:elinks:INFO: Disabling clock on downlink 4
09:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:42:32:elinks:INFO: Disabling clock on downlink 0
09:42:32:elinks:INFO: Disabling clock on downlink 1
09:42:32:elinks:INFO: Disabling clock on downlink 2
09:42:32:elinks:INFO: Disabling clock on downlink 3
09:42:32:elinks:INFO: Disabling clock on downlink 4
09:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:42:32:elinks:INFO: Disabling clock on downlink 0
09:42:32:elinks:INFO: Disabling clock on downlink 1
09:42:32:elinks:INFO: Disabling clock on downlink 2
09:42:32:elinks:INFO: Disabling clock on downlink 3
09:42:32:elinks:INFO: Disabling clock on downlink 4
09:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:42:32:setup_element:INFO: Scanning clock phase
09:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:42:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:42:32:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:42:32:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:42:32:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:42:32:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:42:32:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:42:32:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:42:32:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:42:32:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:42:32:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:42:32:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:42:32:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:42:32:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:42:32:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:42:32:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:42:32:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:42:32:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
09:42:32:setup_element:INFO: Scanning data phases
09:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:42:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:42:38:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:42:38:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:42:38:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:42:38:setup_element:INFO: Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
09:42:38:setup_element:INFO: Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
09:42:38:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
09:42:38:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
09:42:38:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
09:42:38:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:42:38:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
09:42:38:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______
Data delay found: 10
09:42:38:setup_element:INFO: Eye window for uplink 12: _____________________________XXXX_______
Data delay found: 10
09:42:38:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
09:42:38:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
09:42:38:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
09:42:38:setup_element:INFO: Setting the data phase to 34 for uplink 0
09:42:38:setup_element:INFO: Setting the data phase to 29 for uplink 1
09:42:38:setup_element:INFO: Setting the data phase to 30 for uplink 4
09:42:38:setup_element:INFO: Setting the data phase to 26 for uplink 5
09:42:38:setup_element:INFO: Setting the data phase to 22 for uplink 6
09:42:38:setup_element:INFO: Setting the data phase to 18 for uplink 7
09:42:38:setup_element:INFO: Setting the data phase to 6 for uplink 8
09:42:38:setup_element:INFO: Setting the data phase to 12 for uplink 9
09:42:38:setup_element:INFO: Setting the data phase to 6 for uplink 10
09:42:38:setup_element:INFO: Setting the data phase to 10 for uplink 11
09:42:38:setup_element:INFO: Setting the data phase to 10 for uplink 12
09:42:38:setup_element:INFO: Setting the data phase to 13 for uplink 13
09:42:38:setup_element:INFO: Setting the data phase to 10 for uplink 14
09:42:38:setup_element:INFO: Setting the data phase to 12 for uplink 15
09:42:38:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 4: ________________________________________________________________________XXXXXX__
Uplink 5: ________________________________________________________________________XXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 4:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 5:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 6:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 12:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 13:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
]
09:42:38:setup_element:INFO: Beginning SMX ASICs map scan
09:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:42:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:42:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:42:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:42:38:uplink:INFO: Setting uplinks mask [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:42:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:42:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:42:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:42:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:42:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:42:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:42:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:42:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:42:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:42:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:42:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:42:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:42:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:42:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:42:40:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 4: ________________________________________________________________________XXXXXX__
Uplink 5: ________________________________________________________________________XXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 4:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 5:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 6:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 12:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 13:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
09:42:40:setup_element:INFO: Performing Elink synchronization
09:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:42:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:42:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:42:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:42:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:42:40:uplink:INFO: Enabling uplinks [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:42:40:ST3_emu:INFO: Number of chips: 7
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
09:42:42:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:42:42:febtest:INFO: 1-0 | XA-000-08-002-002-007-176-12 | 25.1 | 1230.3
09:42:42:febtest:INFO: 8-1 | XA-000-08-002-002-007-174-11 | 25.1 | 1224.5
09:42:42:febtest:INFO: 10-3 | XA-000-08-002-000-000-148-03 | 53.6 | 1130.0
09:42:42:febtest:INFO: 5-4 | XA-000-08-002-002-008-040-05 | 37.7 | 1183.3
09:42:43:febtest:INFO: 12-5 | XA-000-08-002-002-007-154-02 | 18.7 | 1253.7
09:42:43:febtest:INFO: 7-6 | XA-000-08-002-002-007-153-02 | 31.4 | 1224.5
09:42:43:febtest:INFO: 14-7 | XA-000-08-002-002-007-178-12 | 28.2 | 1212.7
09:42:43:ST3_smx:INFO: Configuring SMX FAST
09:42:45:ST3_smx:INFO: chip: 1-0 21.902970 C 1253.730060 mV
09:42:45:ST3_smx:INFO: Electrons
09:42:45:ST3_smx:INFO: # loops 0
09:42:47:ST3_smx:INFO: # loops 1
09:42:49:ST3_smx:INFO: # loops 2
09:42:50:ST3_smx:INFO: # loops 3
09:42:52:ST3_smx:INFO: # loops 4
09:42:54:ST3_smx:INFO: Total # of broken channels: 0
09:42:54:ST3_smx:INFO: List of broken channels: []
09:42:54:ST3_smx:INFO: Total # of broken channels: 0
09:42:54:ST3_smx:INFO: List of broken channels: []
09:42:55:ST3_smx:INFO: Configuring SMX FAST
09:42:57:ST3_smx:INFO: chip: 8-1 31.389742 C 1200.969315 mV
09:42:57:ST3_smx:INFO: Electrons
09:42:57:ST3_smx:INFO: # loops 0
09:42:58:ST3_smx:INFO: # loops 1
09:43:00:ST3_smx:INFO: # loops 2
09:43:01:ST3_smx:INFO: # loops 3
09:43:03:ST3_smx:INFO: # loops 4
09:43:05:ST3_smx:INFO: Total # of broken channels: 0
09:43:05:ST3_smx:INFO: List of broken channels: []
09:43:05:ST3_smx:INFO: Total # of broken channels: 0
09:43:05:ST3_smx:INFO: List of broken channels: []
09:43:06:ST3_smx:INFO: Configuring SMX FAST
09:43:08:ST3_smx:INFO: chip: 10-3 53.612520 C 1135.937260 mV
09:43:08:ST3_smx:INFO: Electrons
09:43:08:ST3_smx:INFO: # loops 0
09:43:09:ST3_smx:INFO: # loops 1
09:43:11:ST3_smx:INFO: # loops 2
09:43:13:ST3_smx:INFO: # loops 3
09:43:14:ST3_smx:INFO: # loops 4
09:43:16:ST3_smx:INFO: Total # of broken channels: 0
09:43:16:ST3_smx:INFO: List of broken channels: []
09:43:16:ST3_smx:INFO: Total # of broken channels: 0
09:43:16:ST3_smx:INFO: List of broken channels: []
09:43:17:ST3_smx:INFO: Configuring SMX FAST
09:43:19:ST3_smx:INFO: chip: 5-4 37.726682 C 1189.190035 mV
09:43:19:ST3_smx:INFO: Electrons
09:43:19:ST3_smx:INFO: # loops 0
09:43:21:ST3_smx:INFO: # loops 1
09:43:22:ST3_smx:INFO: # loops 2
09:43:24:ST3_smx:INFO: # loops 3
09:43:26:ST3_smx:INFO: # loops 4
09:43:27:ST3_smx:INFO: Total # of broken channels: 0
09:43:27:ST3_smx:INFO: List of broken channels: []
09:43:27:ST3_smx:INFO: Total # of broken channels: 0
09:43:27:ST3_smx:INFO: List of broken channels: []
09:43:28:ST3_smx:INFO: Configuring SMX FAST
09:43:30:ST3_smx:INFO: chip: 12-5 28.225000 C 1224.468235 mV
09:43:30:ST3_smx:INFO: Electrons
09:43:30:ST3_smx:INFO: # loops 0
09:43:32:ST3_smx:INFO: # loops 1
09:43:33:ST3_smx:INFO: # loops 2
09:43:35:ST3_smx:INFO: # loops 3
09:43:36:ST3_smx:INFO: # loops 4
09:43:38:ST3_smx:INFO: Total # of broken channels: 0
09:43:38:ST3_smx:INFO: List of broken channels: []
09:43:38:ST3_smx:INFO: Total # of broken channels: 0
09:43:38:ST3_smx:INFO: List of broken channels: []
09:43:39:ST3_smx:INFO: Configuring SMX FAST
09:43:41:ST3_smx:INFO: chip: 7-6 31.389742 C 1224.468235 mV
09:43:41:ST3_smx:INFO: Electrons
09:43:41:ST3_smx:INFO: # loops 0
09:43:43:ST3_smx:INFO: # loops 1
09:43:44:ST3_smx:INFO: # loops 2
09:43:46:ST3_smx:INFO: # loops 3
09:43:47:ST3_smx:INFO: # loops 4
09:43:49:ST3_smx:INFO: Total # of broken channels: 0
09:43:49:ST3_smx:INFO: List of broken channels: []
09:43:49:ST3_smx:INFO: Total # of broken channels: 0
09:43:49:ST3_smx:INFO: List of broken channels: []
09:43:50:ST3_smx:INFO: Configuring SMX FAST
09:43:52:ST3_smx:INFO: chip: 14-7 18.745682 C 1247.887635 mV
09:43:52:ST3_smx:INFO: Electrons
09:43:52:ST3_smx:INFO: # loops 0
09:43:54:ST3_smx:INFO: # loops 1
09:43:55:ST3_smx:INFO: # loops 2
09:43:57:ST3_smx:INFO: # loops 3
09:43:58:ST3_smx:INFO: # loops 4
09:44:00:ST3_smx:INFO: Total # of broken channels: 0
09:44:00:ST3_smx:INFO: List of broken channels: []
09:44:00:ST3_smx:INFO: Total # of broken channels: 0
09:44:00:ST3_smx:INFO: List of broken channels: []
09:44:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:44:01:febtest:INFO: 1-0 | XA-000-08-002-002-007-176-12 | 21.9 | 1247.9
09:44:02:febtest:INFO: 8-1 | XA-000-08-002-002-007-174-11 | 31.4 | 1201.0
09:44:02:febtest:INFO: 10-3 | XA-000-08-002-000-000-148-03 | 53.6 | 1135.9
09:44:02:febtest:INFO: 5-4 | XA-000-08-002-002-008-040-05 | 40.9 | 1189.2
09:44:02:febtest:INFO: 12-5 | XA-000-08-002-002-007-154-02 | 31.4 | 1224.5
09:44:02:febtest:INFO: 7-6 | XA-000-08-002-002-007-153-02 | 34.6 | 1218.6
09:44:03:febtest:INFO: 14-7 | XA-000-08-002-002-007-178-12 | 18.7 | 1247.9
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_06-09_42_28
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1101
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.9760', '1.850', '2.6370']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:44:09:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1101/TestDate_2024_02_06-09_42_28/