
FEB_1102 22.02.24 09:23:46
TextEdit.txt
09:14:48:febtest:INFO: FEB type: 8.2 09:14:48:febtest:INFO: FEB SN: 2108 09:14:48:febtest:INFO: FEB A: 0 09:14:48:febtest:INFO: FEB B: 1 09:14:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:14:57:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 09:14:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:14:57:febtest:INFO: Testing FEB with SN 2108 09:15:00:smx_tester:INFO: Scanning setup 09:15:00:elinks:INFO: Disabling clock on downlink 0 09:15:00:elinks:INFO: Disabling clock on downlink 1 09:15:00:elinks:INFO: Disabling clock on downlink 2 09:15:00:elinks:INFO: Disabling clock on downlink 3 09:15:00:elinks:INFO: Disabling clock on downlink 4 09:15:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:15:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:00:elinks:INFO: Disabling clock on downlink 0 09:15:00:elinks:INFO: Disabling clock on downlink 1 09:15:00:elinks:INFO: Disabling clock on downlink 2 09:15:00:elinks:INFO: Disabling clock on downlink 3 09:15:00:elinks:INFO: Disabling clock on downlink 4 09:15:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:15:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:00:elinks:INFO: Disabling clock on downlink 0 09:15:00:elinks:INFO: Disabling clock on downlink 1 09:15:00:elinks:INFO: Disabling clock on downlink 2 09:15:00:elinks:INFO: Disabling clock on downlink 3 09:15:00:elinks:INFO: Disabling clock on downlink 4 09:15:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:15:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:15:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:00:elinks:INFO: Disabling clock on downlink 0 09:15:00:elinks:INFO: Disabling clock on downlink 1 09:15:00:elinks:INFO: Disabling clock on downlink 2 09:15:00:elinks:INFO: Disabling clock on downlink 3 09:15:01:elinks:INFO: Disabling clock on downlink 4 09:15:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:15:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:01:elinks:INFO: Disabling clock on downlink 0 09:15:01:elinks:INFO: Disabling clock on downlink 1 09:15:01:elinks:INFO: Disabling clock on downlink 2 09:15:01:elinks:INFO: Disabling clock on downlink 3 09:15:01:elinks:INFO: Disabling clock on downlink 4 09:15:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:15:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:01:setup_element:INFO: Scanning clock phase 09:15:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:15:01:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:15:01:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:15:01:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:15:01:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:15:01:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:15:01:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:15:01:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 09:15:01:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 09:15:01:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:15:01:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:15:01:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:15:01:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:15:01:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:15:01:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:15:01:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXXX Clock Delay: 36 09:15:01:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXXX Clock Delay: 36 09:15:01:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 09:15:01:setup_element:INFO: Scanning data phases 09:15:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:07:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:15:07:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 09:15:07:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_ Data delay found: 16 09:15:07:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX Data delay found: 18 09:15:07:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 09:15:07:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX Data delay found: 18 09:15:07:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX Data delay found: 17 09:15:07:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXX_ Data delay found: 17 09:15:07:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__ Data delay found: 15 09:15:07:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________ Data delay found: 28 09:15:07:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 09:15:07:setup_element:INFO: Eye window for uplink 26: ______XXXX______________________________ Data delay found: 27 09:15:07:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________ Data delay found: 31 09:15:07:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________ Data delay found: 33 09:15:07:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________ Data delay found: 35 09:15:07:setup_element:INFO: Eye window for uplink 30: ________________XXXXX___________________ Data delay found: 38 09:15:07:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________ Data delay found: 36 09:15:07:setup_element:INFO: Setting the data phase to 20 for uplink 16 09:15:07:setup_element:INFO: Setting the data phase to 16 for uplink 17 09:15:07:setup_element:INFO: Setting the data phase to 18 for uplink 18 09:15:07:setup_element:INFO: Setting the data phase to 15 for uplink 19 09:15:07:setup_element:INFO: Setting the data phase to 18 for uplink 20 09:15:07:setup_element:INFO: Setting the data phase to 17 for uplink 21 09:15:07:setup_element:INFO: Setting the data phase to 17 for uplink 22 09:15:07:setup_element:INFO: Setting the data phase to 15 for uplink 23 09:15:07:setup_element:INFO: Setting the data phase to 28 for uplink 24 09:15:07:setup_element:INFO: Setting the data phase to 31 for uplink 25 09:15:07:setup_element:INFO: Setting the data phase to 27 for uplink 26 09:15:07:setup_element:INFO: Setting the data phase to 31 for uplink 27 09:15:07:setup_element:INFO: Setting the data phase to 33 for uplink 28 09:15:07:setup_element:INFO: Setting the data phase to 35 for uplink 29 09:15:07:setup_element:INFO: Setting the data phase to 38 for uplink 30 09:15:07:setup_element:INFO: Setting the data phase to 36 for uplink 31 09:15:07:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: _________________________________________________________________________XXXXXX_ Uplink 17: _________________________________________________________________________XXXXXX_ Uplink 18: ________________________________________________________________________XXXXXXXX Uplink 19: ________________________________________________________________________XXXXXXXX Uplink 20: _______________________________________________________________________XXXXXXXX_ Uplink 21: _______________________________________________________________________XXXXXXXX_ Uplink 22: ______________________________________________________________________XXXXXXXXX_ Uplink 23: ______________________________________________________________________XXXXXXXXX_ Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: ________________________________________________________________________XXXXXXX_ Uplink 29: ________________________________________________________________________XXXXXXX_ Uplink 30: _________________________________________________________________________XXXXXXX Uplink 31: _________________________________________________________________________XXXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXX_ Uplink 23: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 24: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 27: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 28: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 31: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ ] 09:15:07:setup_element:INFO: Beginning SMX ASICs map scan 09:15:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:15:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:15:07:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:15:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:15:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:15:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:15:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:15:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:15:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:15:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:15:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:15:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:15:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:15:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:15:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:15:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:15:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:15:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:15:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:15:10:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: _________________________________________________________________________XXXXXX_ Uplink 17: _________________________________________________________________________XXXXXX_ Uplink 18: ________________________________________________________________________XXXXXXXX Uplink 19: ________________________________________________________________________XXXXXXXX Uplink 20: _______________________________________________________________________XXXXXXXX_ Uplink 21: _______________________________________________________________________XXXXXXXX_ Uplink 22: ______________________________________________________________________XXXXXXXXX_ Uplink 23: ______________________________________________________________________XXXXXXXXX_ Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: ________________________________________________________________________XXXXXXX_ Uplink 29: ________________________________________________________________________XXXXXXX_ Uplink 30: _________________________________________________________________________XXXXXXX Uplink 31: _________________________________________________________________________XXXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXX_ Uplink 23: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 24: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 27: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 28: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 31: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ 09:15:10:setup_element:INFO: Performing Elink synchronization 09:15:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:15:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:15:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:15:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:15:10:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] FEB type: B FEB_A: 0 FEB_B: 1 09:15:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:15:11:febtest:INFO: 23-0 | XA-000-08-002-001-006-071-06 | 37.7 | 1177.4 09:15:11:febtest:INFO: 30-1 | XA-000-08-002-001-006-097-08 | 44.1 | 1159.7 09:15:12:febtest:INFO: 21-2 | XA-000-08-002-001-006-074-06 | 28.2 | 1206.9 09:15:12:febtest:INFO: 28-3 | XA-000-08-002-001-006-094-01 | 44.1 | 1171.5 09:15:12:febtest:INFO: 19-4 | XA-000-08-002-001-006-077-06 | 34.6 | 1189.2 09:15:12:febtest:INFO: 26-5 | XA-000-08-002-001-006-067-06 | 40.9 | 1171.5 09:15:12:febtest:INFO: 17-6 | XA-000-08-002-001-006-069-06 | 18.7 | 1236.2 09:15:13:febtest:INFO: 24-7 | XA-000-08-002-001-006-068-06 | 40.9 | 1171.5 09:15:13:ST3_smx:INFO: Configuring SMX FAST 09:15:15:ST3_smx:INFO: chip: 23-0 40.898880 C 1159.654860 mV 09:15:15:ST3_smx:INFO: Electrons 09:15:15:ST3_smx:INFO: # loops 0 09:15:16:ST3_smx:INFO: # loops 1 09:15:18:ST3_smx:INFO: # loops 2 09:15:20:ST3_smx:INFO: # loops 3 09:15:21:ST3_smx:INFO: # loops 4 09:15:23:ST3_smx:INFO: Total # of broken channels: 0 09:15:23:ST3_smx:INFO: List of broken channels: [] 09:15:23:ST3_smx:INFO: Total # of broken channels: 0 09:15:23:ST3_smx:INFO: List of broken channels: [] 09:15:24:ST3_smx:INFO: Configuring SMX FAST 09:15:26:ST3_smx:INFO: chip: 30-1 50.430383 C 1147.806000 mV 09:15:26:ST3_smx:INFO: Electrons 09:15:26:ST3_smx:INFO: # loops 0 09:15:27:ST3_smx:INFO: # loops 1 09:15:29:ST3_smx:INFO: # loops 2 09:15:31:ST3_smx:INFO: # loops 3 09:15:33:ST3_smx:INFO: # loops 4 09:15:34:ST3_smx:INFO: Total # of broken channels: 0 09:15:34:ST3_smx:INFO: List of broken channels: [] 09:15:34:ST3_smx:INFO: Total # of broken channels: 0 09:15:34:ST3_smx:INFO: List of broken channels: [] 09:15:35:ST3_smx:INFO: Configuring SMX FAST 09:15:37:ST3_smx:INFO: chip: 21-2 40.898880 C 1183.292940 mV 09:15:37:ST3_smx:INFO: Electrons 09:15:37:ST3_smx:INFO: # loops 0 09:15:39:ST3_smx:INFO: # loops 1 09:15:40:ST3_smx:INFO: # loops 2 09:15:42:ST3_smx:INFO: # loops 3 09:15:44:ST3_smx:INFO: # loops 4 09:15:46:ST3_smx:INFO: Total # of broken channels: 0 09:15:46:ST3_smx:INFO: List of broken channels: [] 09:15:46:ST3_smx:INFO: Total # of broken channels: 0 09:15:46:ST3_smx:INFO: List of broken channels: [] 09:15:46:ST3_smx:INFO: Configuring SMX FAST 09:15:48:ST3_smx:INFO: chip: 28-3 44.073563 C 1183.292940 mV 09:15:48:ST3_smx:INFO: Electrons 09:15:48:ST3_smx:INFO: # loops 0 09:15:50:ST3_smx:INFO: # loops 1 09:15:52:ST3_smx:INFO: # loops 2 09:15:53:ST3_smx:INFO: # loops 3 09:15:55:ST3_smx:INFO: # loops 4 09:15:57:ST3_smx:INFO: Total # of broken channels: 0 09:15:57:ST3_smx:INFO: List of broken channels: [] 09:15:57:ST3_smx:INFO: Total # of broken channels: 0 09:15:57:ST3_smx:INFO: List of broken channels: [] 09:15:58:ST3_smx:INFO: Configuring SMX FAST 09:16:00:ST3_smx:INFO: chip: 19-4 47.250730 C 1165.571835 mV 09:16:00:ST3_smx:INFO: Electrons 09:16:00:ST3_smx:INFO: # loops 0 09:16:01:ST3_smx:INFO: # loops 1 09:16:03:ST3_smx:INFO: # loops 2 09:16:05:ST3_smx:INFO: # loops 3 09:16:06:ST3_smx:INFO: # loops 4 09:16:08:ST3_smx:INFO: Total # of broken channels: 0 09:16:08:ST3_smx:INFO: List of broken channels: [] 09:16:08:ST3_smx:INFO: Total # of broken channels: 0 09:16:08:ST3_smx:INFO: List of broken channels: [] 09:16:09:ST3_smx:INFO: Configuring SMX FAST 09:16:11:ST3_smx:INFO: chip: 26-5 50.430383 C 1153.732915 mV 09:16:11:ST3_smx:INFO: Electrons 09:16:11:ST3_smx:INFO: # loops 0 09:16:12:ST3_smx:INFO: # loops 1 09:16:14:ST3_smx:INFO: # loops 2 09:16:16:ST3_smx:INFO: # loops 3 09:16:17:ST3_smx:INFO: # loops 4 09:16:19:ST3_smx:INFO: Total # of broken channels: 0 09:16:19:ST3_smx:INFO: List of broken channels: [] 09:16:19:ST3_smx:INFO: Total # of broken channels: 0 09:16:19:ST3_smx:INFO: List of broken channels: [] 09:16:20:ST3_smx:INFO: Configuring SMX FAST 09:16:22:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV 09:16:22:ST3_smx:INFO: Electrons 09:16:22:ST3_smx:INFO: # loops 0 09:16:23:ST3_smx:INFO: # loops 1 09:16:25:ST3_smx:INFO: # loops 2 09:16:27:ST3_smx:INFO: # loops 3 09:16:28:ST3_smx:INFO: # loops 4 09:16:30:ST3_smx:INFO: Total # of broken channels: 0 09:16:30:ST3_smx:INFO: List of broken channels: [] 09:16:30:ST3_smx:INFO: Total # of broken channels: 0 09:16:30:ST3_smx:INFO: List of broken channels: [] 09:16:31:ST3_smx:INFO: Configuring SMX FAST 09:16:33:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV 09:16:33:ST3_smx:INFO: Electrons 09:16:33:ST3_smx:INFO: # loops 0 09:16:35:ST3_smx:INFO: # loops 1 09:16:36:ST3_smx:INFO: # loops 2 09:16:38:ST3_smx:INFO: # loops 3 09:16:40:ST3_smx:INFO: # loops 4 09:16:41:ST3_smx:INFO: Total # of broken channels: 0 09:16:41:ST3_smx:INFO: List of broken channels: [] 09:16:41:ST3_smx:INFO: Total # of broken channels: 0 09:16:41:ST3_smx:INFO: List of broken channels: [] 09:16:42:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:16:42:febtest:INFO: 23-0 | XA-000-08-002-001-006-071-06 | 47.3 | 1159.7 09:16:42:febtest:INFO: 30-1 | XA-000-08-002-001-006-097-08 | 53.6 | 1153.7 09:16:43:febtest:INFO: 21-2 | XA-000-08-002-001-006-074-06 | 40.9 | 1183.3 09:16:43:febtest:INFO: 28-3 | XA-000-08-002-001-006-094-01 | 44.1 | 1183.3 09:16:43:febtest:INFO: 19-4 | XA-000-08-002-001-006-077-06 | 47.3 | 1165.6 09:16:43:febtest:INFO: 26-5 | XA-000-08-002-001-006-067-06 | 50.4 | 1153.7 09:16:44:febtest:INFO: 17-6 | XA-000-08-002-001-006-069-06 | 40.9 | 1177.4 09:16:44:febtest:INFO: 24-7 | XA-000-08-002-001-006-068-06 | 44.1 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_02_22-09_14_57 OPERATOR : Kerstin S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L5DL500118 M5DL5B0001180B2 62 C FEB_SN : 2108 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.4930', '1.850', '2.4720'] VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9610', '1.850', '0.4103'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 09:23:23:febtest:INFO: FEB type: 8.2 09:23:23:febtest:INFO: FEB SN: 1102 09:23:23:febtest:INFO: FEB A: 1 09:23:23:febtest:INFO: FEB B: 0 09:23:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:23:46:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 09:23:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:23:47:febtest:INFO: Testing FEB with SN 1102 09:23:49:smx_tester:INFO: Scanning setup 09:23:49:elinks:INFO: Disabling clock on downlink 0 09:23:49:elinks:INFO: Disabling clock on downlink 1 09:23:49:elinks:INFO: Disabling clock on downlink 2 09:23:49:elinks:INFO: Disabling clock on downlink 3 09:23:49:elinks:INFO: Disabling clock on downlink 4 09:23:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:23:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:50:elinks:INFO: Disabling clock on downlink 0 09:23:50:elinks:INFO: Disabling clock on downlink 1 09:23:50:elinks:INFO: Disabling clock on downlink 2 09:23:50:elinks:INFO: Disabling clock on downlink 3 09:23:50:elinks:INFO: Disabling clock on downlink 4 09:23:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:23:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:23:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:50:elinks:INFO: Disabling clock on downlink 0 09:23:50:elinks:INFO: Disabling clock on downlink 1 09:23:50:elinks:INFO: Disabling clock on downlink 2 09:23:50:elinks:INFO: Disabling clock on downlink 3 09:23:50:elinks:INFO: Disabling clock on downlink 4 09:23:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:23:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:50:elinks:INFO: Disabling clock on downlink 0 09:23:50:elinks:INFO: Disabling clock on downlink 1 09:23:50:elinks:INFO: Disabling clock on downlink 2 09:23:50:elinks:INFO: Disabling clock on downlink 3 09:23:50:elinks:INFO: Disabling clock on downlink 4 09:23:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:23:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:50:elinks:INFO: Disabling clock on downlink 0 09:23:50:elinks:INFO: Disabling clock on downlink 1 09:23:50:elinks:INFO: Disabling clock on downlink 2 09:23:50:elinks:INFO: Disabling clock on downlink 3 09:23:50:elinks:INFO: Disabling clock on downlink 4 09:23:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:23:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:50:setup_element:INFO: Scanning clock phase 09:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:51:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:23:51:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:23:51:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:23:51:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX Clock Delay: 36 09:23:51:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX Clock Delay: 36 09:23:51:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 09:23:51:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 09:23:51:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________ Clock Delay: 40 09:23:51:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________ Clock Delay: 40 09:23:51:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:23:51:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:23:51:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:23:51:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:23:51:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:23:51:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:23:51:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:23:51:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:23:51:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 09:23:51:setup_element:INFO: Scanning data phases 09:23:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:56:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:23:56:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXX______________________ Data delay found: 34 09:23:56:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________ Data delay found: 30 09:23:56:setup_element:INFO: Eye window for uplink 2 : _________XXXXXX_________________________ Data delay found: 31 09:23:56:setup_element:INFO: Eye window for uplink 3 : ______XXXXXX____________________________ Data delay found: 28 09:23:56:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________ Data delay found: 27 09:23:56:setup_element:INFO: Eye window for uplink 5 : __XXXX__________________________________ Data delay found: 23 09:23:56:setup_element:INFO: Eye window for uplink 6 : XX___________________________________XXX Data delay found: 19 09:23:56:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXXXX__ Data delay found: 14 09:23:56:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________ Data delay found: 6 09:23:56:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXX______ Data delay found: 11 09:23:56:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________ Data delay found: 7 09:23:56:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______ Data delay found: 11 09:23:56:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________ Data delay found: 8 09:23:56:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______ Data delay found: 11 09:23:57:setup_element:INFO: Eye window for uplink 14: _______________________________XXXX_____ Data delay found: 12 09:23:57:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXXX__ Data delay found: 14 09:23:57:setup_element:INFO: Setting the data phase to 34 for uplink 0 09:23:57:setup_element:INFO: Setting the data phase to 30 for uplink 1 09:23:57:setup_element:INFO: Setting the data phase to 31 for uplink 2 09:23:57:setup_element:INFO: Setting the data phase to 28 for uplink 3 09:23:57:setup_element:INFO: Setting the data phase to 27 for uplink 4 09:23:57:setup_element:INFO: Setting the data phase to 23 for uplink 5 09:23:57:setup_element:INFO: Setting the data phase to 19 for uplink 6 09:23:57:setup_element:INFO: Setting the data phase to 14 for uplink 7 09:23:57:setup_element:INFO: Setting the data phase to 6 for uplink 8 09:23:57:setup_element:INFO: Setting the data phase to 11 for uplink 9 09:23:57:setup_element:INFO: Setting the data phase to 7 for uplink 10 09:23:57:setup_element:INFO: Setting the data phase to 11 for uplink 11 09:23:57:setup_element:INFO: Setting the data phase to 8 for uplink 12 09:23:57:setup_element:INFO: Setting the data phase to 11 for uplink 13 09:23:57:setup_element:INFO: Setting the data phase to 12 for uplink 14 09:23:57:setup_element:INFO: Setting the data phase to 14 for uplink 15 09:23:57:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 0: _________________________________________________________________________XXXXXX_ Uplink 1: _________________________________________________________________________XXXXXX_ Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: ______________________________________________________________________XXXXXXXXX_ Uplink 5: ______________________________________________________________________XXXXXXXXX_ Uplink 6: ________________________________________________________________________________ Uplink 7: ________________________________________________________________________________ Uplink 8: _____________________________________________________________________XXXXXXXXX__ Uplink 9: _____________________________________________________________________XXXXXXXXX__ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ________________________________________________________________________XXXXXXXX Uplink 15: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 1: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 2: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 3: Optimal Phase: 28 Window Length: 34 Eye Window: ______XXXXXX____________________________ Uplink 4: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 5: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ Uplink 6: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 7: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ Uplink 8: Optimal Phase: 6 Window Length: 36 Eye Window: _________________________XXXX___________ Uplink 9: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 10: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 11: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 12: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 14: Optimal Phase: 12 Window Length: 36 Eye Window: _______________________________XXXX_____ Uplink 15: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ ] 09:23:57:setup_element:INFO: Beginning SMX ASICs map scan 09:23:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:23:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:23:57:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:23:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:23:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:23:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:23:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:23:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:23:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:23:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:23:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:23:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:23:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:23:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:23:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:23:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:23:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:23:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:23:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:23:59:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 0: _________________________________________________________________________XXXXXX_ Uplink 1: _________________________________________________________________________XXXXXX_ Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: ______________________________________________________________________XXXXXXXXX_ Uplink 5: ______________________________________________________________________XXXXXXXXX_ Uplink 6: ________________________________________________________________________________ Uplink 7: ________________________________________________________________________________ Uplink 8: _____________________________________________________________________XXXXXXXXX__ Uplink 9: _____________________________________________________________________XXXXXXXXX__ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ________________________________________________________________________XXXXXXXX Uplink 15: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 1: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 2: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 3: Optimal Phase: 28 Window Length: 34 Eye Window: ______XXXXXX____________________________ Uplink 4: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 5: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ Uplink 6: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 7: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ Uplink 8: Optimal Phase: 6 Window Length: 36 Eye Window: _________________________XXXX___________ Uplink 9: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 10: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 11: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 12: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 14: Optimal Phase: 12 Window Length: 36 Eye Window: _______________________________XXXX_____ Uplink 15: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ 09:23:59:setup_element:INFO: Performing Elink synchronization 09:23:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:23:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:23:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:23:59:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:24:00:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 09:24:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:24:01:febtest:INFO: 1-0 | XA-000-08-002-001-006-158-14 | 31.4 | 1177.4 09:24:01:febtest:INFO: 8-1 | XA-000-08-002-001-006-110-08 | 50.4 | 1135.9 09:24:02:febtest:INFO: 3-2 | XA-000-08-002-001-006-151-14 | 40.9 | 1153.7 09:24:02:febtest:INFO: 10-3 | XA-000-08-002-001-006-109-08 | 53.6 | 1130.0 09:24:02:febtest:INFO: 5-4 | XA-000-08-002-001-006-159-14 | 25.1 | 1224.5 09:24:02:febtest:INFO: 12-5 | XA-000-08-002-002-007-015-15 | 31.4 | 1195.1 09:24:02:febtest:INFO: 7-6 | XA-000-08-002-001-006-113-15 | 15.6 | 1265.4 09:24:03:febtest:INFO: 14-7 | XA-000-08-002-001-006-149-14 | 37.7 | 1177.4 09:24:03:ST3_smx:INFO: Configuring SMX FAST 09:24:05:ST3_smx:INFO: chip: 1-0 37.726682 C 1165.571835 mV 09:24:05:ST3_smx:INFO: Electrons 09:24:05:ST3_smx:INFO: # loops 0 09:24:06:ST3_smx:INFO: # loops 1 09:24:08:ST3_smx:INFO: # loops 2 09:24:09:ST3_smx:INFO: # loops 3 09:24:11:ST3_smx:INFO: # loops 4 09:24:13:ST3_smx:INFO: Total # of broken channels: 0 09:24:13:ST3_smx:INFO: List of broken channels: [] 09:24:13:ST3_smx:INFO: Total # of broken channels: 0 09:24:13:ST3_smx:INFO: List of broken channels: [] 09:24:13:ST3_smx:INFO: Configuring SMX FAST 09:24:15:ST3_smx:INFO: chip: 8-1 47.250730 C 1135.937260 mV 09:24:15:ST3_smx:INFO: Electrons 09:24:15:ST3_smx:INFO: # loops 0 09:24:17:ST3_smx:INFO: # loops 1 09:24:19:ST3_smx:INFO: # loops 2 09:24:20:ST3_smx:INFO: # loops 3 09:24:22:ST3_smx:INFO: # loops 4 09:24:24:ST3_smx:INFO: Total # of broken channels: 0 09:24:24:ST3_smx:INFO: List of broken channels: [] 09:24:24:ST3_smx:INFO: Total # of broken channels: 0 09:24:24:ST3_smx:INFO: List of broken channels: [] 09:24:24:ST3_smx:INFO: Configuring SMX FAST 09:24:26:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV 09:24:26:ST3_smx:INFO: Electrons 09:24:26:ST3_smx:INFO: # loops 0 09:24:28:ST3_smx:INFO: # loops 1 09:24:30:ST3_smx:INFO: # loops 2 09:24:31:ST3_smx:INFO: # loops 3 09:24:33:ST3_smx:INFO: # loops 4 09:24:34:ST3_smx:INFO: Total # of broken channels: 0 09:24:34:ST3_smx:INFO: List of broken channels: [] 09:24:34:ST3_smx:INFO: Total # of broken channels: 0 09:24:34:ST3_smx:INFO: List of broken channels: [] 09:24:35:ST3_smx:INFO: Configuring SMX FAST 09:24:37:ST3_smx:INFO: chip: 10-3 47.250730 C 1147.806000 mV 09:24:37:ST3_smx:INFO: Electrons 09:24:37:ST3_smx:INFO: # loops 0 09:24:39:ST3_smx:INFO: # loops 1 09:24:40:ST3_smx:INFO: # loops 2 09:24:42:ST3_smx:INFO: # loops 3 09:24:43:ST3_smx:INFO: # loops 4 09:24:45:ST3_smx:INFO: Total # of broken channels: 0 09:24:45:ST3_smx:INFO: List of broken channels: [] 09:24:45:ST3_smx:INFO: Total # of broken channels: 0 09:24:45:ST3_smx:INFO: List of broken channels: [] 09:24:46:ST3_smx:INFO: Configuring SMX FAST 09:24:48:ST3_smx:INFO: chip: 5-4 28.225000 C 1230.330540 mV 09:24:48:ST3_smx:INFO: Electrons 09:24:48:ST3_smx:INFO: # loops 0 09:24:49:ST3_smx:INFO: # loops 1 09:24:51:ST3_smx:INFO: # loops 2 09:24:52:ST3_smx:INFO: # loops 3 09:24:54:ST3_smx:INFO: # loops 4 09:24:55:ST3_smx:INFO: Total # of broken channels: 0 09:24:55:ST3_smx:INFO: List of broken channels: [] 09:24:55:ST3_smx:INFO: Total # of broken channels: 0 09:24:55:ST3_smx:INFO: List of broken channels: [] 09:24:56:ST3_smx:INFO: Configuring SMX FAST 09:24:58:ST3_smx:INFO: chip: 12-5 37.726682 C 1183.292940 mV 09:24:58:ST3_smx:INFO: Electrons 09:24:58:ST3_smx:INFO: # loops 0 09:25:00:ST3_smx:INFO: # loops 1 09:25:01:ST3_smx:INFO: # loops 2 09:25:03:ST3_smx:INFO: # loops 3 09:25:04:ST3_smx:INFO: # loops 4 09:25:06:ST3_smx:INFO: Total # of broken channels: 0 09:25:06:ST3_smx:INFO: List of broken channels: [] 09:25:06:ST3_smx:INFO: Total # of broken channels: 0 09:25:06:ST3_smx:INFO: List of broken channels: [] 09:25:07:ST3_smx:INFO: Configuring SMX FAST 09:25:09:ST3_smx:INFO: chip: 7-6 34.556970 C 1212.728715 mV 09:25:09:ST3_smx:INFO: Electrons 09:25:09:ST3_smx:INFO: # loops 0 09:25:10:ST3_smx:INFO: # loops 1 09:25:12:ST3_smx:INFO: # loops 2 09:25:13:ST3_smx:INFO: # loops 3 09:25:15:ST3_smx:INFO: # loops 4 09:25:17:ST3_smx:INFO: Total # of broken channels: 0 09:25:17:ST3_smx:INFO: List of broken channels: [] 09:25:17:ST3_smx:INFO: Total # of broken channels: 0 09:25:17:ST3_smx:INFO: List of broken channels: [] 09:25:18:ST3_smx:INFO: Configuring SMX FAST 09:25:19:ST3_smx:INFO: chip: 14-7 40.898880 C 1171.483840 mV 09:25:19:ST3_smx:INFO: Electrons 09:25:19:ST3_smx:INFO: # loops 0 09:25:21:ST3_smx:INFO: # loops 1 09:25:23:ST3_smx:INFO: # loops 2 09:25:24:ST3_smx:INFO: # loops 3 09:25:26:ST3_smx:INFO: # loops 4 09:25:27:ST3_smx:INFO: Total # of broken channels: 0 09:25:27:ST3_smx:INFO: List of broken channels: [] 09:25:27:ST3_smx:INFO: Total # of broken channels: 0 09:25:27:ST3_smx:INFO: List of broken channels: [] 09:25:28:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:25:28:febtest:INFO: 1-0 | XA-000-08-002-001-006-158-14 | 40.9 | 1165.6 09:25:29:febtest:INFO: 8-1 | XA-000-08-002-001-006-110-08 | 50.4 | 1141.9 09:25:29:febtest:INFO: 3-2 | XA-000-08-002-001-006-151-14 | 37.7 | 1171.5 09:25:29:febtest:INFO: 10-3 | XA-000-08-002-001-006-109-08 | 47.3 | 1147.8 09:25:29:febtest:INFO: 5-4 | XA-000-08-002-001-006-159-14 | 25.1 | 1230.3 09:25:30:febtest:INFO: 12-5 | XA-000-08-002-002-007-015-15 | 37.7 | 1183.3 09:25:30:febtest:INFO: 7-6 | XA-000-08-002-001-006-113-15 | 34.6 | 1212.7 09:25:30:febtest:INFO: 14-7 | XA-000-08-002-001-006-149-14 | 40.9 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_02_22-09_23_46 OPERATOR : Kerstin S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L5DL500118 M5DL5B0001180B2 62 C FEB_SN : 1102 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.5220', '1.850', '2.2190'] VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9610', '1.850', '0.4103'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 09:25:36:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1102/TestDate_2024_02_22-09_23_46/