FEB_1103    07.02.24 14:45:04

TextEdit.txt
            14:45:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:45:04:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
14:45:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:45:05:febtest:INFO:	Testing FEB with SN 1103
14:45:07:smx_tester:INFO:	Scanning setup
14:45:07:elinks:INFO:	Disabling clock on downlink 0
14:45:07:elinks:INFO:	Disabling clock on downlink 1
14:45:07:elinks:INFO:	Disabling clock on downlink 2
14:45:07:elinks:INFO:	Disabling clock on downlink 3
14:45:07:elinks:INFO:	Disabling clock on downlink 4
14:45:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:45:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:45:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:45:07:elinks:INFO:	Disabling clock on downlink 0
14:45:07:elinks:INFO:	Disabling clock on downlink 1
14:45:07:elinks:INFO:	Disabling clock on downlink 2
14:45:07:elinks:INFO:	Disabling clock on downlink 3
14:45:07:elinks:INFO:	Disabling clock on downlink 4
14:45:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:45:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:45:08:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:45:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:45:08:elinks:INFO:	Disabling clock on downlink 0
14:45:08:elinks:INFO:	Disabling clock on downlink 1
14:45:08:elinks:INFO:	Disabling clock on downlink 2
14:45:08:elinks:INFO:	Disabling clock on downlink 3
14:45:08:elinks:INFO:	Disabling clock on downlink 4
14:45:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:45:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:45:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:45:08:elinks:INFO:	Disabling clock on downlink 0
14:45:08:elinks:INFO:	Disabling clock on downlink 1
14:45:08:elinks:INFO:	Disabling clock on downlink 2
14:45:08:elinks:INFO:	Disabling clock on downlink 3
14:45:08:elinks:INFO:	Disabling clock on downlink 4
14:45:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:45:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:45:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:45:08:elinks:INFO:	Disabling clock on downlink 0
14:45:08:elinks:INFO:	Disabling clock on downlink 1
14:45:08:elinks:INFO:	Disabling clock on downlink 2
14:45:08:elinks:INFO:	Disabling clock on downlink 3
14:45:08:elinks:INFO:	Disabling clock on downlink 4
14:45:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:45:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:45:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:45:08:setup_element:INFO:	Scanning clock phase
14:45:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:45:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:08:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:45:08:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:45:08:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:45:08:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:45:08:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:45:08:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:45:09:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:45:09:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
14:45:09:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
14:45:09:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:45:09:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:45:09:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:45:09:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:45:09:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:45:09:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:45:09:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:45:09:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:45:09:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
14:45:09:setup_element:INFO:	Scanning data phases
14:45:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:45:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:14:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:45:14:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXXX______________________
Data delay found: 34
14:45:14:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
14:45:14:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
14:45:14:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXX______________________________
Data delay found: 26
14:45:14:setup_element:INFO:	Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
14:45:14:setup_element:INFO:	Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
14:45:14:setup_element:INFO:	Eye window for uplink 6 : _XXXXX__________________________________
Data delay found: 23
14:45:14:setup_element:INFO:	Eye window for uplink 7 : XXX__________________________________XXX
Data delay found: 19
14:45:14:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
14:45:14:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
14:45:14:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
14:45:14:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXX_____
Data delay found: 11
14:45:14:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
14:45:14:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
14:45:14:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
14:45:14:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
14:45:14:setup_element:INFO:	Setting the data phase to 34 for uplink 0
14:45:14:setup_element:INFO:	Setting the data phase to 30 for uplink 1
14:45:14:setup_element:INFO:	Setting the data phase to 29 for uplink 2
14:45:14:setup_element:INFO:	Setting the data phase to 26 for uplink 3
14:45:14:setup_element:INFO:	Setting the data phase to 28 for uplink 4
14:45:14:setup_element:INFO:	Setting the data phase to 24 for uplink 5
14:45:14:setup_element:INFO:	Setting the data phase to 23 for uplink 6
14:45:14:setup_element:INFO:	Setting the data phase to 19 for uplink 7
14:45:14:setup_element:INFO:	Setting the data phase to 6 for uplink 8
14:45:14:setup_element:INFO:	Setting the data phase to 11 for uplink 9
14:45:14:setup_element:INFO:	Setting the data phase to 7 for uplink 10
14:45:14:setup_element:INFO:	Setting the data phase to 11 for uplink 11
14:45:14:setup_element:INFO:	Setting the data phase to 10 for uplink 12
14:45:14:setup_element:INFO:	Setting the data phase to 12 for uplink 13
14:45:14:setup_element:INFO:	Setting the data phase to 10 for uplink 14
14:45:14:setup_element:INFO:	Setting the data phase to 11 for uplink 15
14:45:14:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: ________________________________________________________________________XXXXXXXX
      Uplink  7: ________________________________________________________________________XXXXXXXX
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 7:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
]
14:45:14:setup_element:INFO:	Beginning SMX ASICs map scan
14:45:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:45:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:14:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:45:14:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:45:14:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:45:14:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:45:14:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:45:14:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:45:15:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:45:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:45:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:45:15:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:45:15:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:45:15:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:45:15:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:45:15:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:45:15:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:45:15:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:45:15:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:45:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:45:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:45:17:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: ________________________________________________________________________XXXXXXXX
      Uplink  7: ________________________________________________________________________XXXXXXXX
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 7:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____

14:45:17:setup_element:INFO:	Performing Elink synchronization
14:45:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:45:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:17:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:45:17:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:45:17:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:45:17:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:45:17:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
14:45:18:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:45:18:febtest:INFO:	1-0 | XA-000-08-002-000-005-080-07 |  28.2 | 1201.0
14:45:19:febtest:INFO:	8-1 | XA-000-08-002-000-000-139-04 |  34.6 | 1183.3
14:45:19:febtest:INFO:	3-2 | XA-000-08-002-000-005-081-07 |  28.2 | 1195.1
14:45:19:febtest:INFO:	10-3 | XA-000-08-002-000-006-237-10 |  34.6 | 1189.2
14:45:19:febtest:INFO:	5-4 | XA-000-08-002-000-006-243-13 |  44.1 | 1147.8
14:45:20:febtest:INFO:	12-5 | XA-000-08-002-000-000-133-04 |  25.1 | 1230.3
14:45:20:febtest:INFO:	7-6 | XA-000-08-002-000-006-248-13 |  40.9 | 1165.6
14:45:20:febtest:INFO:	14-7 | XA-000-08-002-000-006-238-10 |  31.4 | 1201.0
14:45:20:ST3_smx:INFO:	Configuring SMX FAST
14:45:22:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1200.969315 mV
14:45:22:ST3_smx:INFO:		Electrons
14:45:22:ST3_smx:INFO:	# loops 0
14:45:24:ST3_smx:INFO:	# loops 1
14:45:26:ST3_smx:INFO:	# loops 2
14:45:27:ST3_smx:INFO:	# loops 3
14:45:29:ST3_smx:INFO:	# loops 4
14:45:31:ST3_smx:INFO:	Total # of broken channels: 0
14:45:31:ST3_smx:INFO:	List of broken channels: []
14:45:31:ST3_smx:INFO:	Total # of broken channels: 0
14:45:31:ST3_smx:INFO:	List of broken channels: []
14:45:32:ST3_smx:INFO:	Configuring SMX FAST
14:45:34:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1183.292940 mV
14:45:34:ST3_smx:INFO:		Electrons
14:45:34:ST3_smx:INFO:	# loops 0
14:45:36:ST3_smx:INFO:	# loops 1
14:45:37:ST3_smx:INFO:	# loops 2
14:45:39:ST3_smx:INFO:	# loops 3
14:45:41:ST3_smx:INFO:	# loops 4
14:45:43:ST3_smx:INFO:	Total # of broken channels: 0
14:45:43:ST3_smx:INFO:	List of broken channels: []
14:45:43:ST3_smx:INFO:	Total # of broken channels: 0
14:45:43:ST3_smx:INFO:	List of broken channels: []
14:45:43:ST3_smx:INFO:	Configuring SMX FAST
14:45:46:ST3_smx:INFO:	chip: 3-2 	 37.726682 C 	 1177.390875 mV
14:45:46:ST3_smx:INFO:		Electrons
14:45:46:ST3_smx:INFO:	# loops 0
14:45:47:ST3_smx:INFO:	# loops 1
14:45:49:ST3_smx:INFO:	# loops 2
14:45:51:ST3_smx:INFO:	# loops 3
14:45:53:ST3_smx:INFO:	# loops 4
14:45:54:ST3_smx:INFO:	Total # of broken channels: 0
14:45:54:ST3_smx:INFO:	List of broken channels: []
14:45:54:ST3_smx:INFO:	Total # of broken channels: 0
14:45:54:ST3_smx:INFO:	List of broken channels: []
14:45:55:ST3_smx:INFO:	Configuring SMX FAST
14:45:57:ST3_smx:INFO:	chip: 10-3 	 37.726682 C 	 1189.190035 mV
14:45:57:ST3_smx:INFO:		Electrons
14:45:57:ST3_smx:INFO:	# loops 0
14:45:59:ST3_smx:INFO:	# loops 1
14:46:01:ST3_smx:INFO:	# loops 2
14:46:02:ST3_smx:INFO:	# loops 3
14:46:04:ST3_smx:INFO:	# loops 4
14:46:06:ST3_smx:INFO:	Total # of broken channels: 0
14:46:06:ST3_smx:INFO:	List of broken channels: []
14:46:06:ST3_smx:INFO:	Total # of broken channels: 0
14:46:06:ST3_smx:INFO:	List of broken channels: []
14:46:07:ST3_smx:INFO:	Configuring SMX FAST
14:46:09:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1171.483840 mV
14:46:09:ST3_smx:INFO:		Electrons
14:46:09:ST3_smx:INFO:	# loops 0
14:46:11:ST3_smx:INFO:	# loops 1
14:46:12:ST3_smx:INFO:	# loops 2
14:46:14:ST3_smx:INFO:	# loops 3
14:46:16:ST3_smx:INFO:	# loops 4
14:46:18:ST3_smx:INFO:	Total # of broken channels: 0
14:46:18:ST3_smx:INFO:	List of broken channels: []
14:46:18:ST3_smx:INFO:	Total # of broken channels: 0
14:46:18:ST3_smx:INFO:	List of broken channels: []
14:46:19:ST3_smx:INFO:	Configuring SMX FAST
14:46:21:ST3_smx:INFO:	chip: 12-5 	 28.225000 C 	 1224.468235 mV
14:46:21:ST3_smx:INFO:		Electrons
14:46:21:ST3_smx:INFO:	# loops 0
14:46:22:ST3_smx:INFO:	# loops 1
14:46:24:ST3_smx:INFO:	# loops 2
14:46:26:ST3_smx:INFO:	# loops 3
14:46:27:ST3_smx:INFO:	# loops 4
14:46:29:ST3_smx:INFO:	Total # of broken channels: 0
14:46:29:ST3_smx:INFO:	List of broken channels: []
14:46:29:ST3_smx:INFO:	Total # of broken channels: 0
14:46:29:ST3_smx:INFO:	List of broken channels: []
14:46:30:ST3_smx:INFO:	Configuring SMX FAST
14:46:32:ST3_smx:INFO:	chip: 7-6 	 37.726682 C 	 1195.082160 mV
14:46:32:ST3_smx:INFO:		Electrons
14:46:32:ST3_smx:INFO:	# loops 0
14:46:34:ST3_smx:INFO:	# loops 1
14:46:35:ST3_smx:INFO:	# loops 2
14:46:37:ST3_smx:INFO:	# loops 3
14:46:39:ST3_smx:INFO:	# loops 4
14:46:41:ST3_smx:INFO:	Total # of broken channels: 0
14:46:41:ST3_smx:INFO:	List of broken channels: []
14:46:41:ST3_smx:INFO:	Total # of broken channels: 0
14:46:41:ST3_smx:INFO:	List of broken channels: []
14:46:41:ST3_smx:INFO:	Configuring SMX FAST
14:46:43:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1200.969315 mV
14:46:43:ST3_smx:INFO:		Electrons
14:46:43:ST3_smx:INFO:	# loops 0
14:46:45:ST3_smx:INFO:	# loops 1
14:46:47:ST3_smx:INFO:	# loops 2
14:46:48:ST3_smx:INFO:	# loops 3
14:46:50:ST3_smx:INFO:	# loops 4
14:46:52:ST3_smx:INFO:	Total # of broken channels: 0
14:46:52:ST3_smx:INFO:	List of broken channels: []
14:46:52:ST3_smx:INFO:	Total # of broken channels: 0
14:46:52:ST3_smx:INFO:	List of broken channels: []
14:46:53:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:46:53:febtest:INFO:	1-0 | XA-000-08-002-000-005-080-07 |  31.4 | 1201.0
14:46:53:febtest:INFO:	8-1 | XA-000-08-002-000-000-139-04 |  37.7 | 1177.4
14:46:53:febtest:INFO:	3-2 | XA-000-08-002-000-005-081-07 |  37.7 | 1177.4
14:46:54:febtest:INFO:	10-3 | XA-000-08-002-000-006-237-10 |  37.7 | 1183.3
14:46:54:febtest:INFO:	5-4 | XA-000-08-002-000-006-243-13 |  40.9 | 1171.5
14:46:54:febtest:INFO:	12-5 | XA-000-08-002-000-000-133-04 |  28.2 | 1218.6
14:46:54:febtest:INFO:	7-6 | XA-000-08-002-000-006-248-13 |  37.7 | 1195.1
14:46:55:febtest:INFO:	14-7 | XA-000-08-002-000-006-238-10 |  34.6 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_07-14_45_04
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 1103
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.6130', '1.850', '1.8990']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
14:46:59:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1103/TestDate_2024_02_07-14_45_04/