
FEB_1110 12.03.24 13:53:51
TextEdit.txt
13:53:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:53:51:ST3_Shared:INFO: FEB-Microcable 13:53:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:53:52:febtest:INFO: Testing FEB with SN 1110 13:53:54:smx_tester:INFO: Scanning setup 13:53:54:elinks:INFO: Disabling clock on downlink 0 13:53:54:elinks:INFO: Disabling clock on downlink 1 13:53:54:elinks:INFO: Disabling clock on downlink 2 13:53:54:elinks:INFO: Disabling clock on downlink 3 13:53:54:elinks:INFO: Disabling clock on downlink 4 13:53:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:53:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:53:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:53:54:elinks:INFO: Disabling clock on downlink 0 13:53:54:elinks:INFO: Disabling clock on downlink 1 13:53:54:elinks:INFO: Disabling clock on downlink 2 13:53:54:elinks:INFO: Disabling clock on downlink 3 13:53:54:elinks:INFO: Disabling clock on downlink 4 13:53:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:53:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 13:53:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 13:53:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:53:55:elinks:INFO: Disabling clock on downlink 0 13:53:55:elinks:INFO: Disabling clock on downlink 1 13:53:55:elinks:INFO: Disabling clock on downlink 2 13:53:55:elinks:INFO: Disabling clock on downlink 3 13:53:55:elinks:INFO: Disabling clock on downlink 4 13:53:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:53:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:53:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:53:55:elinks:INFO: Disabling clock on downlink 0 13:53:55:elinks:INFO: Disabling clock on downlink 1 13:53:55:elinks:INFO: Disabling clock on downlink 2 13:53:55:elinks:INFO: Disabling clock on downlink 3 13:53:55:elinks:INFO: Disabling clock on downlink 4 13:53:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:53:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:53:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:53:55:elinks:INFO: Disabling clock on downlink 0 13:53:55:elinks:INFO: Disabling clock on downlink 1 13:53:55:elinks:INFO: Disabling clock on downlink 2 13:53:55:elinks:INFO: Disabling clock on downlink 3 13:53:55:elinks:INFO: Disabling clock on downlink 4 13:53:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:53:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:53:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:53:55:setup_element:INFO: Scanning clock phase 13:53:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:53:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:53:55:setup_element:INFO: Clock phase scan results for group 0, downlink 1 13:53:55:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:53:55:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:53:55:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:53:55:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:53:55:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:53:55:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:53:55:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:53:55:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:53:55:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:53:55:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:53:55:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:53:55:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:53:55:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:53:55:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:53:55:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___ Clock Delay: 33 13:53:56:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___ Clock Delay: 33 13:53:56:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 13:53:56:setup_element:INFO: Scanning data phases 13:53:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:53:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:54:01:setup_element:INFO: Data phase scan results for group 0, downlink 1 13:54:01:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________ Data delay found: 34 13:54:01:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________ Data delay found: 30 13:54:01:setup_element:INFO: Eye window for uplink 2 : __________XXXX__________________________ Data delay found: 31 13:54:01:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________ Data delay found: 29 13:54:01:setup_element:INFO: Eye window for uplink 4 : _______XXXXX____________________________ Data delay found: 29 13:54:01:setup_element:INFO: Eye window for uplink 5 : ___XXXXX________________________________ Data delay found: 25 13:54:01:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________ Data delay found: 22 13:54:01:setup_element:INFO: Eye window for uplink 7 : XX_________________________________XXXXX Data delay found: 18 13:54:01:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________ Data delay found: 8 13:54:01:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___ Data delay found: 14 13:54:01:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________ Data delay found: 8 13:54:01:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____ Data delay found: 12 13:54:01:setup_element:INFO: Eye window for uplink 12: _____________________________XXXX_______ Data delay found: 10 13:54:01:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____ Data delay found: 13 13:54:01:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____ Data delay found: 12 13:54:01:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___ Data delay found: 13 13:54:01:setup_element:INFO: Setting the data phase to 34 for uplink 0 13:54:01:setup_element:INFO: Setting the data phase to 30 for uplink 1 13:54:01:setup_element:INFO: Setting the data phase to 31 for uplink 2 13:54:01:setup_element:INFO: Setting the data phase to 29 for uplink 3 13:54:01:setup_element:INFO: Setting the data phase to 29 for uplink 4 13:54:01:setup_element:INFO: Setting the data phase to 25 for uplink 5 13:54:01:setup_element:INFO: Setting the data phase to 22 for uplink 6 13:54:01:setup_element:INFO: Setting the data phase to 18 for uplink 7 13:54:01:setup_element:INFO: Setting the data phase to 8 for uplink 8 13:54:01:setup_element:INFO: Setting the data phase to 14 for uplink 9 13:54:01:setup_element:INFO: Setting the data phase to 8 for uplink 10 13:54:01:setup_element:INFO: Setting the data phase to 12 for uplink 11 13:54:01:setup_element:INFO: Setting the data phase to 10 for uplink 12 13:54:01:setup_element:INFO: Setting the data phase to 13 for uplink 13 13:54:01:setup_element:INFO: Setting the data phase to 12 for uplink 14 13:54:01:setup_element:INFO: Setting the data phase to 13 for uplink 15 13:54:01:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: ________________________________________________________________________XXXXXXX_ Uplink 3: ________________________________________________________________________XXXXXXX_ Uplink 4: ________________________________________________________________________XXXXXX__ Uplink 5: ________________________________________________________________________XXXXXX__ Uplink 6: _______________________________________________________________________XXXXXXX__ Uplink 7: _______________________________________________________________________XXXXXXX__ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: ______________________________________________________________________XXXXXXXX__ Uplink 13: ______________________________________________________________________XXXXXXXX__ Uplink 14: _______________________________________________________________________XXXXXX___ Uplink 15: _______________________________________________________________________XXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 1: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 2: Optimal Phase: 31 Window Length: 36 Eye Window: __________XXXX__________________________ Uplink 3: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 4: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 5: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 10: Optimal Phase: 8 Window Length: 34 Eye Window: __________________________XXXXXX________ Uplink 11: Optimal Phase: 12 Window Length: 34 Eye Window: ______________________________XXXXXX____ Uplink 12: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 15: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ ] 13:54:01:setup_element:INFO: Beginning SMX ASICs map scan 13:54:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:54:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:54:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:54:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:54:01:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 13:54:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 13:54:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 13:54:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 13:54:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 13:54:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 13:54:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 13:54:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 13:54:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 13:54:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 13:54:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 13:54:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 13:54:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 13:54:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 13:54:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 13:54:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 13:54:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 13:54:04:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: ________________________________________________________________________XXXXXXX_ Uplink 3: ________________________________________________________________________XXXXXXX_ Uplink 4: ________________________________________________________________________XXXXXX__ Uplink 5: ________________________________________________________________________XXXXXX__ Uplink 6: _______________________________________________________________________XXXXXXX__ Uplink 7: _______________________________________________________________________XXXXXXX__ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: ______________________________________________________________________XXXXXXXX__ Uplink 13: ______________________________________________________________________XXXXXXXX__ Uplink 14: _______________________________________________________________________XXXXXX___ Uplink 15: _______________________________________________________________________XXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 1: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 2: Optimal Phase: 31 Window Length: 36 Eye Window: __________XXXX__________________________ Uplink 3: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 4: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 5: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 10: Optimal Phase: 8 Window Length: 34 Eye Window: __________________________XXXXXX________ Uplink 11: Optimal Phase: 12 Window Length: 34 Eye Window: ______________________________XXXXXX____ Uplink 12: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 15: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ 13:54:04:setup_element:INFO: Performing Elink synchronization 13:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:54:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:54:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:54:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:54:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 13:54:04:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 13:54:04:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 13:54:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:54:06:febtest:INFO: 01-00 | XA-000-08-002-000-008-060-11 | 34.6 | 1183.3 13:54:06:febtest:INFO: 08-01 | XA-000-08-002-000-008-048-11 | 3.0 | 1277.1 13:54:06:febtest:INFO: 03-02 | XA-000-08-002-000-008-057-11 | 15.6 | 1253.7 13:54:06:febtest:INFO: 10-03 | XA-000-08-002-000-008-026-05 | 40.9 | 1147.8 13:54:07:febtest:INFO: 05-04 | XA-000-08-002-000-008-051-11 | 25.1 | 1230.3 13:54:07:febtest:INFO: 12-05 | XA-000-08-002-000-008-027-05 | 15.6 | 1242.0 13:54:07:febtest:INFO: 07-06 | XA-000-08-002-000-008-052-11 | 6.1 | 1294.5 13:54:07:febtest:INFO: 14-07 | XA-000-08-002-000-008-044-12 | 21.9 | 1224.5 13:54:07:ST3_smx:INFO: Configuring SMX FAST 13:54:09:ST3_smx:INFO: chip: 1-0 28.225000 C 1212.728715 mV 13:54:09:ST3_smx:INFO: Electrons 13:54:09:ST3_smx:INFO: # loops 0 13:54:11:ST3_smx:INFO: # loops 1 13:54:13:ST3_smx:INFO: # loops 2 13:54:14:ST3_smx:INFO: Total # of broken channels: 0 13:54:14:ST3_smx:INFO: List of broken channels: [] 13:54:14:ST3_smx:INFO: Total # of broken channels: 0 13:54:14:ST3_smx:INFO: List of broken channels: [] 13:54:15:ST3_smx:INFO: Configuring SMX FAST 13:54:17:ST3_smx:INFO: chip: 8-1 15.590880 C 1242.040240 mV 13:54:17:ST3_smx:INFO: Electrons 13:54:17:ST3_smx:INFO: # loops 0 13:54:19:ST3_smx:INFO: # loops 1 13:54:21:ST3_smx:INFO: # loops 2 13:54:22:ST3_smx:INFO: Total # of broken channels: 0 13:54:22:ST3_smx:INFO: List of broken channels: [] 13:54:22:ST3_smx:INFO: Total # of broken channels: 0 13:54:22:ST3_smx:INFO: List of broken channels: [] 13:54:23:ST3_smx:INFO: Configuring SMX FAST 13:54:25:ST3_smx:INFO: chip: 3-2 28.225000 C 1206.851500 mV 13:54:25:ST3_smx:INFO: Electrons 13:54:25:ST3_smx:INFO: # loops 0 13:54:27:ST3_smx:INFO: # loops 1 13:54:29:ST3_smx:INFO: # loops 2 13:54:30:ST3_smx:INFO: Total # of broken channels: 0 13:54:30:ST3_smx:INFO: List of broken channels: [] 13:54:30:ST3_smx:INFO: Total # of broken channels: 0 13:54:30:ST3_smx:INFO: List of broken channels: [] 13:54:31:ST3_smx:INFO: Configuring SMX FAST 13:54:33:ST3_smx:INFO: chip: 10-3 37.726682 C 1177.390875 mV 13:54:33:ST3_smx:INFO: Electrons 13:54:33:ST3_smx:INFO: # loops 0 13:54:35:ST3_smx:INFO: # loops 1 13:54:37:ST3_smx:INFO: # loops 2 13:54:38:ST3_smx:INFO: Total # of broken channels: 0 13:54:38:ST3_smx:INFO: List of broken channels: [] 13:54:38:ST3_smx:INFO: Total # of broken channels: 1 13:54:38:ST3_smx:INFO: List of broken channels: [0] 13:54:39:ST3_smx:INFO: Configuring SMX FAST 13:54:41:ST3_smx:INFO: chip: 5-4 18.745682 C 1247.887635 mV 13:54:41:ST3_smx:INFO: Electrons 13:54:41:ST3_smx:INFO: # loops 0 13:54:43:ST3_smx:INFO: # loops 1 13:54:45:ST3_smx:INFO: # loops 2 13:54:46:ST3_smx:INFO: Total # of broken channels: 0 13:54:46:ST3_smx:INFO: List of broken channels: [] 13:54:46:ST3_smx:INFO: Total # of broken channels: 0 13:54:46:ST3_smx:INFO: List of broken channels: [] 13:54:47:ST3_smx:INFO: Configuring SMX FAST 13:54:49:ST3_smx:INFO: chip: 12-5 28.225000 C 1212.728715 mV 13:54:49:ST3_smx:INFO: Electrons 13:54:49:ST3_smx:INFO: # loops 0 13:54:51:ST3_smx:INFO: # loops 1 13:54:53:ST3_smx:INFO: # loops 2 13:54:54:ST3_smx:INFO: Total # of broken channels: 0 13:54:54:ST3_smx:INFO: List of broken channels: [] 13:54:54:ST3_smx:INFO: Total # of broken channels: 0 13:54:54:ST3_smx:INFO: List of broken channels: [] 13:54:55:ST3_smx:INFO: Configuring SMX FAST 13:54:57:ST3_smx:INFO: chip: 7-6 18.745682 C 1259.567515 mV 13:54:57:ST3_smx:INFO: Electrons 13:54:57:ST3_smx:INFO: # loops 0 13:54:59:ST3_smx:INFO: # loops 1 13:55:01:ST3_smx:INFO: # loops 2 13:55:02:ST3_smx:INFO: Total # of broken channels: 0 13:55:02:ST3_smx:INFO: List of broken channels: [] 13:55:02:ST3_smx:INFO: Total # of broken channels: 0 13:55:02:ST3_smx:INFO: List of broken channels: [] 13:55:03:ST3_smx:INFO: Configuring SMX FAST 13:55:05:ST3_smx:INFO: chip: 14-7 34.556970 C 1189.190035 mV 13:55:05:ST3_smx:INFO: Electrons 13:55:05:ST3_smx:INFO: # loops 0 13:55:07:ST3_smx:INFO: # loops 1 13:55:08:ST3_smx:INFO: # loops 2 13:55:10:ST3_smx:INFO: Total # of broken channels: 0 13:55:10:ST3_smx:INFO: List of broken channels: [] 13:55:10:ST3_smx:INFO: Total # of broken channels: 0 13:55:10:ST3_smx:INFO: List of broken channels: [] 13:55:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:55:11:febtest:INFO: 01-00 | XA-000-08-002-000-008-060-11 | 25.1 | 1212.7 13:55:11:febtest:INFO: 08-01 | XA-000-08-002-000-008-048-11 | 18.7 | 1242.0 13:55:12:febtest:INFO: 03-02 | XA-000-08-002-000-008-057-11 | 28.2 | 1212.7 13:55:12:febtest:INFO: 10-03 | XA-000-08-002-000-008-026-05 | 34.6 | 1177.4 13:55:12:febtest:INFO: 05-04 | XA-000-08-002-000-008-051-11 | 18.7 | 1247.9 13:55:12:febtest:INFO: 12-05 | XA-000-08-002-000-008-027-05 | 28.2 | 1212.7 13:55:13:febtest:INFO: 07-06 | XA-000-08-002-000-008-052-11 | 18.7 | 1259.6 13:55:13:febtest:INFO: 14-07 | XA-000-08-002-000-008-044-12 | 34.6 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_03_12-13_53_51 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L7DL100122 M7DL1T1001221A2 62 A FEB_SN : 1110 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '1.4110', '1.850', '2.2570', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9600', '1.850', '0.5234', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9540', '1.850', '0.3111', '0.000', '0.0000', '0.000', '0.0000']