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FEB_1112 18.03.24 08:47:28
Info
08:47:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:47:28:ST3_Shared:INFO: FEB-Sensor
08:47:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:47:42:ST3_ModuleSelector:INFO: L5DL100116 M5DL1T3001163A2 124 B
08:47:42:ST3_ModuleSelector:INFO: 06114
08:47:43:febtest:INFO: Testing FEB with SN 1112
08:47:45:smx_tester:INFO: Scanning setup
08:47:45:elinks:INFO: Disabling clock on downlink 0
08:47:45:elinks:INFO: Disabling clock on downlink 1
08:47:45:elinks:INFO: Disabling clock on downlink 2
08:47:45:elinks:INFO: Disabling clock on downlink 3
08:47:45:elinks:INFO: Disabling clock on downlink 4
08:47:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:47:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:47:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:47:45:elinks:INFO: Disabling clock on downlink 0
08:47:45:elinks:INFO: Disabling clock on downlink 1
08:47:45:elinks:INFO: Disabling clock on downlink 2
08:47:45:elinks:INFO: Disabling clock on downlink 3
08:47:45:elinks:INFO: Disabling clock on downlink 4
08:47:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:47:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:47:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:47:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:47:45:elinks:INFO: Disabling clock on downlink 0
08:47:45:elinks:INFO: Disabling clock on downlink 1
08:47:45:elinks:INFO: Disabling clock on downlink 2
08:47:45:elinks:INFO: Disabling clock on downlink 3
08:47:45:elinks:INFO: Disabling clock on downlink 4
08:47:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:47:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:47:46:elinks:INFO: Disabling clock on downlink 0
08:47:46:elinks:INFO: Disabling clock on downlink 1
08:47:46:elinks:INFO: Disabling clock on downlink 2
08:47:46:elinks:INFO: Disabling clock on downlink 3
08:47:46:elinks:INFO: Disabling clock on downlink 4
08:47:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:47:46:elinks:INFO: Disabling clock on downlink 0
08:47:46:elinks:INFO: Disabling clock on downlink 1
08:47:46:elinks:INFO: Disabling clock on downlink 2
08:47:46:elinks:INFO: Disabling clock on downlink 3
08:47:46:elinks:INFO: Disabling clock on downlink 4
08:47:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:47:46:setup_element:INFO: Scanning clock phase
08:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:47:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:47:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:47:46:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:47:46:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:47:46:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:47:46:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:47:46:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:47:46:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
08:47:46:setup_element:INFO: Scanning data phases
08:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:47:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:47:51:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:47:51:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
08:47:51:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
08:47:51:setup_element:INFO: Eye window for uplink 2 : _______XXXXXX___________________________
Data delay found: 29
08:47:51:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
08:47:51:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
08:47:51:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
08:47:51:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
08:47:51:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
08:47:51:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXX______________
Data delay found: 2
08:47:51:setup_element:INFO: Eye window for uplink 9 : __________________________XXXX__________
Data delay found: 7
08:47:51:setup_element:INFO: Eye window for uplink 10: _____________________________XXXX_______
Data delay found: 10
08:47:51:setup_element:INFO: Eye window for uplink 11: _________________________________XXXX___
Data delay found: 14
08:47:51:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____
Data delay found: 12
08:47:51:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__
Data delay found: 15
08:47:51:setup_element:INFO: Eye window for uplink 14: __________________________XXXXXX________
Data delay found: 8
08:47:51:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
08:47:51:setup_element:INFO: Setting the data phase to 32 for uplink 0
08:47:51:setup_element:INFO: Setting the data phase to 28 for uplink 1
08:47:51:setup_element:INFO: Setting the data phase to 29 for uplink 2
08:47:51:setup_element:INFO: Setting the data phase to 27 for uplink 3
08:47:51:setup_element:INFO: Setting the data phase to 26 for uplink 4
08:47:51:setup_element:INFO: Setting the data phase to 23 for uplink 5
08:47:51:setup_element:INFO: Setting the data phase to 20 for uplink 6
08:47:51:setup_element:INFO: Setting the data phase to 15 for uplink 7
08:47:51:setup_element:INFO: Setting the data phase to 2 for uplink 8
08:47:51:setup_element:INFO: Setting the data phase to 7 for uplink 9
08:47:51:setup_element:INFO: Setting the data phase to 10 for uplink 10
08:47:51:setup_element:INFO: Setting the data phase to 14 for uplink 11
08:47:51:setup_element:INFO: Setting the data phase to 12 for uplink 12
08:47:51:setup_element:INFO: Setting the data phase to 15 for uplink 13
08:47:51:setup_element:INFO: Setting the data phase to 8 for uplink 14
08:47:51:setup_element:INFO: Setting the data phase to 10 for uplink 15
08:47:51:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ________________________________________________________________________XXXXXX__
Uplink 9: ________________________________________________________________________XXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 1:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 9:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 10:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 12:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 15:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
]
08:47:51:setup_element:INFO: Beginning SMX ASICs map scan
08:47:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:47:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:47:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:47:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:47:51:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:47:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:47:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:47:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:47:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:47:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:47:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:47:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:47:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:47:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:47:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:47:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:47:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:47:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:47:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:47:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:47:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:47:54:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ________________________________________________________________________XXXXXX__
Uplink 9: ________________________________________________________________________XXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 1:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 9:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 10:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 12:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 15:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
08:47:54:setup_element:INFO: Performing Elink synchronization
08:47:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:47:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:47:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:47:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:47:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:47:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:47:54:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
08:47:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:47:55:febtest:INFO: 01-00 | XA-000-08-001-064-041-248-01 | 37.7 | 1135.9
08:47:56:febtest:INFO: 08-01 | XA-000-08-001-064-043-224-05 | 25.1 | 1183.3
08:47:56:febtest:INFO: 03-02 | XA-000-08-001-064-042-024-14 | 15.6 | 1230.3
08:47:56:febtest:INFO: 10-03 | XA-000-08-002-000-003-187-03 | 15.6 | 1212.7
08:47:56:febtest:INFO: 05-04 | XA-000-08-002-000-005-143-15 | 34.6 | 1153.7
08:47:57:febtest:INFO: 12-05 | XA-000-08-002-000-006-083-09 | 21.9 | 1189.2
08:47:57:febtest:INFO: 07-06 | XA-000-08-002-000-000-008-14 | 31.4 | 1177.4
08:47:57:febtest:INFO: 14-07 | XA-000-08-001-064-042-200-06 | 18.7 | 1201.0
08:47:58:ST3_smx:INFO: Configuring SMX FAST
08:48:00:ST3_smx:INFO: chip: 1-0 44.073563 C 1129.995435 mV
08:48:00:ST3_smx:INFO: Electrons
08:48:00:ST3_smx:INFO: # loops 0
08:48:01:ST3_smx:INFO: # loops 1
08:48:03:ST3_smx:INFO: # loops 2
08:48:04:ST3_smx:INFO: # loops 3
08:48:06:ST3_smx:INFO: # loops 4
08:48:07:ST3_smx:INFO: Total # of broken channels: 0
08:48:07:ST3_smx:INFO: List of broken channels: []
08:48:07:ST3_smx:INFO: Total # of broken channels: 0
08:48:07:ST3_smx:INFO: List of broken channels: []
08:48:08:ST3_smx:INFO: Configuring SMX FAST
08:48:10:ST3_smx:INFO: chip: 8-1 21.902970 C 1200.969315 mV
08:48:10:ST3_smx:INFO: Electrons
08:48:10:ST3_smx:INFO: # loops 0
08:48:12:ST3_smx:INFO: # loops 1
08:48:13:ST3_smx:INFO: # loops 2
08:48:15:ST3_smx:INFO: # loops 3
08:48:17:ST3_smx:INFO: # loops 4
08:48:18:ST3_smx:INFO: Total # of broken channels: 0
08:48:18:ST3_smx:INFO: List of broken channels: []
08:48:18:ST3_smx:INFO: Total # of broken channels: 0
08:48:18:ST3_smx:INFO: List of broken channels: []
08:48:19:ST3_smx:INFO: Configuring SMX FAST
08:48:21:ST3_smx:INFO: chip: 3-2 15.590880 C 1224.468235 mV
08:48:21:ST3_smx:INFO: Electrons
08:48:21:ST3_smx:INFO: # loops 0
08:48:23:ST3_smx:INFO: # loops 1
08:48:24:ST3_smx:INFO: # loops 2
08:48:26:ST3_smx:INFO: # loops 3
08:48:27:ST3_smx:INFO: # loops 4
08:48:29:ST3_smx:INFO: Total # of broken channels: 0
08:48:29:ST3_smx:INFO: List of broken channels: []
08:48:29:ST3_smx:INFO: Total # of broken channels: 0
08:48:29:ST3_smx:INFO: List of broken channels: []
08:48:30:ST3_smx:INFO: Configuring SMX FAST
08:48:32:ST3_smx:INFO: chip: 10-3 28.225000 C 1165.571835 mV
08:48:32:ST3_smx:INFO: Electrons
08:48:32:ST3_smx:INFO: # loops 0
08:48:33:ST3_smx:INFO: # loops 1
08:48:35:ST3_smx:INFO: # loops 2
08:48:37:ST3_smx:INFO: # loops 3
08:48:38:ST3_smx:INFO: # loops 4
08:48:40:ST3_smx:INFO: Total # of broken channels: 0
08:48:40:ST3_smx:INFO: List of broken channels: []
08:48:40:ST3_smx:INFO: Total # of broken channels: 0
08:48:40:ST3_smx:INFO: List of broken channels: []
08:48:41:ST3_smx:INFO: Configuring SMX FAST
08:48:43:ST3_smx:INFO: chip: 5-4 37.726682 C 1147.806000 mV
08:48:43:ST3_smx:INFO: Electrons
08:48:43:ST3_smx:INFO: # loops 0
08:48:45:ST3_smx:INFO: # loops 1
08:48:47:ST3_smx:INFO: # loops 2
08:48:48:ST3_smx:INFO: # loops 3
08:48:50:ST3_smx:INFO: # loops 4
08:48:51:ST3_smx:INFO: Total # of broken channels: 0
08:48:51:ST3_smx:INFO: List of broken channels: []
08:48:51:ST3_smx:INFO: Total # of broken channels: 2
08:48:51:ST3_smx:INFO: List of broken channels: [85, 105]
08:48:52:ST3_smx:INFO: Configuring SMX FAST
08:48:54:ST3_smx:INFO: chip: 12-5 25.062742 C 1177.390875 mV
08:48:54:ST3_smx:INFO: Electrons
08:48:54:ST3_smx:INFO: # loops 0
08:48:56:ST3_smx:INFO: # loops 1
08:48:57:ST3_smx:INFO: # loops 2
08:48:59:ST3_smx:INFO: # loops 3
08:49:01:ST3_smx:INFO: # loops 4
08:49:02:ST3_smx:INFO: Total # of broken channels: 0
08:49:02:ST3_smx:INFO: List of broken channels: []
08:49:02:ST3_smx:INFO: Total # of broken channels: 0
08:49:02:ST3_smx:INFO: List of broken channels: []
08:49:03:ST3_smx:INFO: Configuring SMX FAST
08:49:05:ST3_smx:INFO: chip: 7-6 40.898880 C 1147.806000 mV
08:49:05:ST3_smx:INFO: Electrons
08:49:05:ST3_smx:INFO: # loops 0
08:49:07:ST3_smx:INFO: # loops 1
08:49:08:ST3_smx:INFO: # loops 2
08:49:10:ST3_smx:INFO: # loops 3
08:49:11:ST3_smx:INFO: # loops 4
08:49:13:ST3_smx:INFO: Total # of broken channels: 0
08:49:13:ST3_smx:INFO: List of broken channels: []
08:49:13:ST3_smx:INFO: Total # of broken channels: 0
08:49:13:ST3_smx:INFO: List of broken channels: []
08:49:14:ST3_smx:INFO: Configuring SMX FAST
08:49:16:ST3_smx:INFO: chip: 14-7 31.389742 C 1171.483840 mV
08:49:16:ST3_smx:INFO: Electrons
08:49:16:ST3_smx:INFO: # loops 0
08:49:17:ST3_smx:INFO: # loops 1
08:49:19:ST3_smx:INFO: # loops 2
08:49:21:ST3_smx:INFO: # loops 3
08:49:22:ST3_smx:INFO: # loops 4
08:49:24:ST3_smx:INFO: Total # of broken channels: 0
08:49:24:ST3_smx:INFO: List of broken channels: []
08:49:24:ST3_smx:INFO: Total # of broken channels: 0
08:49:24:ST3_smx:INFO: List of broken channels: []
08:49:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:49:25:febtest:INFO: 01-00 | XA-000-08-001-064-041-248-01 | 44.1 | 1130.0
08:49:25:febtest:INFO: 08-01 | XA-000-08-001-064-043-224-05 | 21.9 | 1201.0
08:49:25:febtest:INFO: 03-02 | XA-000-08-001-064-042-024-14 | 18.7 | 1224.5
08:49:26:febtest:INFO: 10-03 | XA-000-08-002-000-003-187-03 | 31.4 | 1165.6
08:49:26:febtest:INFO: 05-04 | XA-000-08-002-000-005-143-15 | 37.7 | 1147.8
08:49:26:febtest:INFO: 12-05 | XA-000-08-002-000-006-083-09 | 28.2 | 1177.4
08:49:26:febtest:INFO: 07-06 | XA-000-08-002-000-000-008-14 | 40.9 | 1153.7
08:49:27:febtest:INFO: 14-07 | XA-000-08-001-064-042-200-06 | 31.4 | 1171.5
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_03_18-08_47_28
OPERATOR : Oleksandr S.; Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5DL100116 M5DL1T3001163A2 124 B
FEB_SN : 1112
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 06114
MODULE_NAME: L5DL100116 M5DL1T3001163A2 124 B
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['2.450', '1.8460', '1.850', '0.4972', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0100', '1.850', '0.4633', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9900', '1.850', '0.3249', '0.000', '0.0000', '0.000', '0.0000']
08:49:31:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; Robert V.;
08:49:32:ST3_Shared:INFO: Listo of operators:Kerstin S.; Olga B.; Oleksandr S.; Robert V.;
08:49:33:ST3_Shared:INFO: Listo of operators:Kerstin S.; Olga B.; Oleksandr S.;