
FEB_1112 14.03.24 09:43:57
TextEdit.txt
09:43:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:43:57:ST3_Shared:INFO: FEB-Microcable 09:43:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:43:57:febtest:INFO: Testing FEB with SN 1112 09:44:00:smx_tester:INFO: Scanning setup 09:44:00:elinks:INFO: Disabling clock on downlink 0 09:44:00:elinks:INFO: Disabling clock on downlink 1 09:44:00:elinks:INFO: Disabling clock on downlink 2 09:44:00:elinks:INFO: Disabling clock on downlink 3 09:44:00:elinks:INFO: Disabling clock on downlink 4 09:44:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:44:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:44:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:44:00:elinks:INFO: Disabling clock on downlink 0 09:44:00:elinks:INFO: Disabling clock on downlink 1 09:44:00:elinks:INFO: Disabling clock on downlink 2 09:44:00:elinks:INFO: Disabling clock on downlink 3 09:44:00:elinks:INFO: Disabling clock on downlink 4 09:44:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:44:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:44:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:44:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:44:00:elinks:INFO: Disabling clock on downlink 0 09:44:00:elinks:INFO: Disabling clock on downlink 1 09:44:00:elinks:INFO: Disabling clock on downlink 2 09:44:00:elinks:INFO: Disabling clock on downlink 3 09:44:00:elinks:INFO: Disabling clock on downlink 4 09:44:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:44:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:44:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:44:00:elinks:INFO: Disabling clock on downlink 0 09:44:00:elinks:INFO: Disabling clock on downlink 1 09:44:01:elinks:INFO: Disabling clock on downlink 2 09:44:01:elinks:INFO: Disabling clock on downlink 3 09:44:01:elinks:INFO: Disabling clock on downlink 4 09:44:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:44:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:44:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:44:01:elinks:INFO: Disabling clock on downlink 0 09:44:01:elinks:INFO: Disabling clock on downlink 1 09:44:01:elinks:INFO: Disabling clock on downlink 2 09:44:01:elinks:INFO: Disabling clock on downlink 3 09:44:01:elinks:INFO: Disabling clock on downlink 4 09:44:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:44:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:44:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:44:01:setup_element:INFO: Scanning clock phase 09:44:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:44:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:44:01:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:44:01:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXXX Clock Delay: 35 09:44:01:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXXX Clock Delay: 35 09:44:01:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:44:01:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:44:01:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 09:44:01:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 09:44:01:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 09:44:01:setup_element:INFO: Scanning data phases 09:44:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:44:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:44:07:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:44:07:setup_element:INFO: Eye window for uplink 0 : __________XXXXXX________________________ Data delay found: 32 09:44:07:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________ Data delay found: 28 09:44:07:setup_element:INFO: Eye window for uplink 2 : _______XXXXXXX__________________________ Data delay found: 30 09:44:07:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________ Data delay found: 27 09:44:07:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________ Data delay found: 26 09:44:07:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________ Data delay found: 23 09:44:07:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX Data delay found: 20 09:44:07:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXXX_ Data delay found: 15 09:44:07:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXX_______________ Data delay found: 2 09:44:07:setup_element:INFO: Eye window for uplink 9 : __________________________XXXX__________ Data delay found: 7 09:44:07:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______ Data delay found: 10 09:44:07:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXXX__ Data delay found: 14 09:44:07:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____ Data delay found: 12 09:44:07:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__ Data delay found: 15 09:44:07:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXXX_______ Data delay found: 9 09:44:07:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____ Data delay found: 11 09:44:07:setup_element:INFO: Setting the data phase to 32 for uplink 0 09:44:07:setup_element:INFO: Setting the data phase to 28 for uplink 1 09:44:07:setup_element:INFO: Setting the data phase to 30 for uplink 2 09:44:07:setup_element:INFO: Setting the data phase to 27 for uplink 3 09:44:07:setup_element:INFO: Setting the data phase to 26 for uplink 4 09:44:07:setup_element:INFO: Setting the data phase to 23 for uplink 5 09:44:07:setup_element:INFO: Setting the data phase to 20 for uplink 6 09:44:07:setup_element:INFO: Setting the data phase to 15 for uplink 7 09:44:07:setup_element:INFO: Setting the data phase to 2 for uplink 8 09:44:07:setup_element:INFO: Setting the data phase to 7 for uplink 9 09:44:07:setup_element:INFO: Setting the data phase to 10 for uplink 10 09:44:07:setup_element:INFO: Setting the data phase to 14 for uplink 11 09:44:07:setup_element:INFO: Setting the data phase to 12 for uplink 12 09:44:07:setup_element:INFO: Setting the data phase to 15 for uplink 13 09:44:07:setup_element:INFO: Setting the data phase to 9 for uplink 14 09:44:07:setup_element:INFO: Setting the data phase to 11 for uplink 15 09:44:07:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXXXX Uplink 3: _______________________________________________________________________XXXXXXXXX Uplink 4: ______________________________________________________________________XXXXXXXX__ Uplink 5: ______________________________________________________________________XXXXXXXX__ Uplink 6: _______________________________________________________________________XXXXXXX__ Uplink 7: _______________________________________________________________________XXXXXXX__ Uplink 8: ________________________________________________________________________XXXXXX__ Uplink 9: ________________________________________________________________________XXXXXX__ Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: _______________________________________________________________________XXXXXXX__ Uplink 15: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 30 Window Length: 33 Eye Window: _______XXXXXXX__________________________ Uplink 3: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 4: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 5: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 6: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 7: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 8: Optimal Phase: 2 Window Length: 35 Eye Window: ____________________XXXXX_______________ Uplink 9: Optimal Phase: 7 Window Length: 36 Eye Window: __________________________XXXX__________ Uplink 10: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 11: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ Uplink 12: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 13: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 14: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 15: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ ] 09:44:07:setup_element:INFO: Beginning SMX ASICs map scan 09:44:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:44:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:44:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:44:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:44:07:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:44:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:44:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:44:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:44:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:44:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:44:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:44:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:44:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:44:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:44:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:44:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:44:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:44:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:44:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:44:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:44:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:44:10:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXXXX Uplink 3: _______________________________________________________________________XXXXXXXXX Uplink 4: ______________________________________________________________________XXXXXXXX__ Uplink 5: ______________________________________________________________________XXXXXXXX__ Uplink 6: _______________________________________________________________________XXXXXXX__ Uplink 7: _______________________________________________________________________XXXXXXX__ Uplink 8: ________________________________________________________________________XXXXXX__ Uplink 9: ________________________________________________________________________XXXXXX__ Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: _______________________________________________________________________XXXXXXX__ Uplink 15: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 30 Window Length: 33 Eye Window: _______XXXXXXX__________________________ Uplink 3: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 4: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 5: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 6: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 7: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 8: Optimal Phase: 2 Window Length: 35 Eye Window: ____________________XXXXX_______________ Uplink 9: Optimal Phase: 7 Window Length: 36 Eye Window: __________________________XXXX__________ Uplink 10: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 11: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ Uplink 12: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 13: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 14: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 15: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ 09:44:10:setup_element:INFO: Performing Elink synchronization 09:44:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:44:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:44:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:44:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:44:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:44:10:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:44:10:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 09:44:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:44:11:febtest:INFO: 01-00 | XA-000-08-001-064-041-248-01 | 53.6 | 1135.9 09:44:12:febtest:INFO: 08-01 | XA-000-08-001-064-043-224-05 | 37.7 | 1183.3 09:44:12:febtest:INFO: 03-02 | XA-000-08-001-064-042-024-14 | 28.2 | 1224.5 09:44:12:febtest:INFO: 10-03 | XA-000-08-002-000-003-187-03 | 28.2 | 1212.7 09:44:12:febtest:INFO: 05-04 | XA-000-08-002-000-005-143-15 | 40.9 | 1177.4 09:44:12:febtest:INFO: 12-05 | XA-000-08-002-000-006-083-09 | 34.6 | 1189.2 09:44:13:febtest:INFO: 07-06 | XA-000-08-002-000-000-008-14 | 44.1 | 1171.5 09:44:13:febtest:INFO: 14-07 | XA-000-08-001-064-042-200-06 | 31.4 | 1206.9 09:44:13:ST3_smx:INFO: Configuring SMX FAST 09:44:15:ST3_smx:INFO: chip: 1-0 56.797143 C 1124.048640 mV 09:44:15:ST3_smx:INFO: Electrons 09:44:15:ST3_smx:INFO: # loops 0 09:44:17:ST3_smx:INFO: # loops 1 09:44:18:ST3_smx:INFO: # loops 2 09:44:20:ST3_smx:INFO: Total # of broken channels: 0 09:44:20:ST3_smx:INFO: List of broken channels: [] 09:44:20:ST3_smx:INFO: Total # of broken channels: 0 09:44:20:ST3_smx:INFO: List of broken channels: [] 09:44:21:ST3_smx:INFO: Configuring SMX FAST 09:44:23:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV 09:44:23:ST3_smx:INFO: Electrons 09:44:23:ST3_smx:INFO: # loops 0 09:44:25:ST3_smx:INFO: # loops 1 09:44:26:ST3_smx:INFO: # loops 2 09:44:28:ST3_smx:INFO: Total # of broken channels: 0 09:44:28:ST3_smx:INFO: List of broken channels: [] 09:44:28:ST3_smx:INFO: Total # of broken channels: 0 09:44:28:ST3_smx:INFO: List of broken channels: [] 09:44:29:ST3_smx:INFO: Configuring SMX FAST 09:44:31:ST3_smx:INFO: chip: 3-2 31.389742 C 1224.468235 mV 09:44:31:ST3_smx:INFO: Electrons 09:44:31:ST3_smx:INFO: # loops 0 09:44:33:ST3_smx:INFO: # loops 1 09:44:34:ST3_smx:INFO: # loops 2 09:44:36:ST3_smx:INFO: Total # of broken channels: 0 09:44:36:ST3_smx:INFO: List of broken channels: [] 09:44:36:ST3_smx:INFO: Total # of broken channels: 0 09:44:36:ST3_smx:INFO: List of broken channels: [] 09:44:37:ST3_smx:INFO: Configuring SMX FAST 09:44:39:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV 09:44:39:ST3_smx:INFO: Electrons 09:44:39:ST3_smx:INFO: # loops 0 09:44:41:ST3_smx:INFO: # loops 1 09:44:42:ST3_smx:INFO: # loops 2 09:44:44:ST3_smx:INFO: Total # of broken channels: 0 09:44:44:ST3_smx:INFO: List of broken channels: [] 09:44:44:ST3_smx:INFO: Total # of broken channels: 0 09:44:44:ST3_smx:INFO: List of broken channels: [] 09:44:45:ST3_smx:INFO: Configuring SMX FAST 09:44:47:ST3_smx:INFO: chip: 5-4 50.430383 C 1147.806000 mV 09:44:47:ST3_smx:INFO: Electrons 09:44:47:ST3_smx:INFO: # loops 0 09:44:49:ST3_smx:INFO: # loops 1 09:44:50:ST3_smx:INFO: # loops 2 09:44:52:ST3_smx:INFO: Total # of broken channels: 0 09:44:52:ST3_smx:INFO: List of broken channels: [] 09:44:52:ST3_smx:INFO: Total # of broken channels: 0 09:44:52:ST3_smx:INFO: List of broken channels: [] 09:44:53:ST3_smx:INFO: Configuring SMX FAST 09:44:55:ST3_smx:INFO: chip: 12-5 37.726682 C 1177.390875 mV 09:44:55:ST3_smx:INFO: Electrons 09:44:55:ST3_smx:INFO: # loops 0 09:44:57:ST3_smx:INFO: # loops 1 09:44:58:ST3_smx:INFO: # loops 2 09:45:00:ST3_smx:INFO: Total # of broken channels: 0 09:45:00:ST3_smx:INFO: List of broken channels: [] 09:45:00:ST3_smx:INFO: Total # of broken channels: 0 09:45:00:ST3_smx:INFO: List of broken channels: [] 09:45:01:ST3_smx:INFO: Configuring SMX FAST 09:45:03:ST3_smx:INFO: chip: 7-6 53.612520 C 1147.806000 mV 09:45:03:ST3_smx:INFO: Electrons 09:45:03:ST3_smx:INFO: # loops 0 09:45:05:ST3_smx:INFO: # loops 1 09:45:06:ST3_smx:INFO: # loops 2 09:45:08:ST3_smx:INFO: Total # of broken channels: 0 09:45:08:ST3_smx:INFO: List of broken channels: [] 09:45:08:ST3_smx:INFO: Total # of broken channels: 0 09:45:08:ST3_smx:INFO: List of broken channels: [] 09:45:09:ST3_smx:INFO: Configuring SMX FAST 09:45:11:ST3_smx:INFO: chip: 14-7 40.898880 C 1177.390875 mV 09:45:11:ST3_smx:INFO: Electrons 09:45:11:ST3_smx:INFO: # loops 0 09:45:13:ST3_smx:INFO: # loops 1 09:45:14:ST3_smx:INFO: # loops 2 09:45:16:ST3_smx:INFO: Total # of broken channels: 0 09:45:16:ST3_smx:INFO: List of broken channels: [] 09:45:16:ST3_smx:INFO: Total # of broken channels: 0 09:45:16:ST3_smx:INFO: List of broken channels: [] 09:45:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:45:17:febtest:INFO: 01-00 | XA-000-08-001-064-041-248-01 | 56.8 | 1124.0 09:45:18:febtest:INFO: 08-01 | XA-000-08-001-064-043-224-05 | 34.6 | 1201.0 09:45:18:febtest:INFO: 03-02 | XA-000-08-001-064-042-024-14 | 31.4 | 1224.5 09:45:18:febtest:INFO: 10-03 | XA-000-08-002-000-003-187-03 | 40.9 | 1165.6 09:45:18:febtest:INFO: 05-04 | XA-000-08-002-000-005-143-15 | 50.4 | 1147.8 09:45:18:febtest:INFO: 12-05 | XA-000-08-002-000-006-083-09 | 40.9 | 1177.4 09:45:19:febtest:INFO: 07-06 | XA-000-08-002-000-000-008-14 | 53.6 | 1147.8 09:45:19:febtest:INFO: 14-07 | XA-000-08-001-064-042-200-06 | 40.9 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_03_14-09_43_57 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L5DL100116 M5DL1T0001160A2 42 A FEB_SN : 1112 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.450', '1.4270', '1.849', '2.5380', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0060', '1.850', '0.5511', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9970', '1.850', '0.3268', '0.000', '0.0000', '0.000', '0.0000']