09:39:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:31:ST3_Shared:INFO:	                         FEB-Sensor                         
09:39:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:26:ST3_ModuleSelector:INFO:	L5DL300117 M5DL3B1001171B2 62 B

09:40:26:ST3_ModuleSelector:INFO:	07333

09:40:27:febtest:INFO:	Testing FEB with SN 1131
09:40:29:smx_tester:INFO:	Scanning setup
09:40:30:elinks:INFO:	Disabling clock on downlink 0
09:40:30:elinks:INFO:	Disabling clock on downlink 1
09:40:30:elinks:INFO:	Disabling clock on downlink 2
09:40:30:elinks:INFO:	Disabling clock on downlink 3
09:40:30:elinks:INFO:	Disabling clock on downlink 4
09:40:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:40:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:40:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:40:30:elinks:INFO:	Disabling clock on downlink 0
09:40:30:elinks:INFO:	Disabling clock on downlink 1
09:40:30:elinks:INFO:	Disabling clock on downlink 2
09:40:30:elinks:INFO:	Disabling clock on downlink 3
09:40:30:elinks:INFO:	Disabling clock on downlink 4
09:40:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:40:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:40:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:40:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:40:30:elinks:INFO:	Disabling clock on downlink 0
09:40:30:elinks:INFO:	Disabling clock on downlink 1
09:40:30:elinks:INFO:	Disabling clock on downlink 2
09:40:30:elinks:INFO:	Disabling clock on downlink 3
09:40:30:elinks:INFO:	Disabling clock on downlink 4
09:40:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:40:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:40:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:40:30:elinks:INFO:	Disabling clock on downlink 0
09:40:30:elinks:INFO:	Disabling clock on downlink 1
09:40:30:elinks:INFO:	Disabling clock on downlink 2
09:40:30:elinks:INFO:	Disabling clock on downlink 3
09:40:30:elinks:INFO:	Disabling clock on downlink 4
09:40:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:40:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:40:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:40:30:elinks:INFO:	Disabling clock on downlink 0
09:40:30:elinks:INFO:	Disabling clock on downlink 1
09:40:30:elinks:INFO:	Disabling clock on downlink 2
09:40:30:elinks:INFO:	Disabling clock on downlink 3
09:40:30:elinks:INFO:	Disabling clock on downlink 4
09:40:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:40:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:40:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:40:30:setup_element:INFO:	Scanning clock phase
09:40:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:40:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:31:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:40:31:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:40:31:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:40:31:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:40:31:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:40:31:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:40:31:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:40:31:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:40:31:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:40:31:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:40:31:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:40:31:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:40:31:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:40:31:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:40:31:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:40:31:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:40:31:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:40:31:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:40:31:setup_element:INFO:	Scanning data phases
09:40:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:40:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:36:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:40:36:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
09:40:36:setup_element:INFO:	Eye window for uplink 1 : _________XXXXXX_________________________
Data delay found: 31
09:40:36:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
09:40:36:setup_element:INFO:	Eye window for uplink 3 : ______XXXXXX____________________________
Data delay found: 28
09:40:36:setup_element:INFO:	Eye window for uplink 4 : _______XXXXX____________________________
Data delay found: 29
09:40:36:setup_element:INFO:	Eye window for uplink 5 : ___XXXX_________________________________
Data delay found: 24
09:40:36:setup_element:INFO:	Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
09:40:36:setup_element:INFO:	Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
09:40:36:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
09:40:36:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:40:36:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
09:40:36:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
09:40:36:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
09:40:36:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
09:40:36:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
09:40:36:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
09:40:36:setup_element:INFO:	Setting the data phase to 36 for uplink 0
09:40:36:setup_element:INFO:	Setting the data phase to 31 for uplink 1
09:40:36:setup_element:INFO:	Setting the data phase to 31 for uplink 2
09:40:36:setup_element:INFO:	Setting the data phase to 28 for uplink 3
09:40:36:setup_element:INFO:	Setting the data phase to 29 for uplink 4
09:40:36:setup_element:INFO:	Setting the data phase to 24 for uplink 5
09:40:36:setup_element:INFO:	Setting the data phase to 21 for uplink 6
09:40:36:setup_element:INFO:	Setting the data phase to 17 for uplink 7
09:40:36:setup_element:INFO:	Setting the data phase to 6 for uplink 8
09:40:36:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:40:36:setup_element:INFO:	Setting the data phase to 9 for uplink 10
09:40:36:setup_element:INFO:	Setting the data phase to 13 for uplink 11
09:40:36:setup_element:INFO:	Setting the data phase to 10 for uplink 12
09:40:36:setup_element:INFO:	Setting the data phase to 13 for uplink 13
09:40:36:setup_element:INFO:	Setting the data phase to 11 for uplink 14
09:40:36:setup_element:INFO:	Setting the data phase to 13 for uplink 15
09:40:36:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: ________________________________________________________________________XXXXXX__
      Uplink  3: ________________________________________________________________________XXXXXX__
      Uplink  4: ________________________________________________________________________XXXXXXX_
      Uplink  5: ________________________________________________________________________XXXXXXX_
      Uplink  6: ________________________________________________________________________XXXXXX__
      Uplink  7: ________________________________________________________________________XXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: _______________________________________________________________________XXXXXXX__
      Uplink 13: _______________________________________________________________________XXXXXXX__
      Uplink 14: ________________________________________________________________________XXXXXXX_
      Uplink 15: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 1:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 4:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
]
09:40:36:setup_element:INFO:	Beginning SMX ASICs map scan
09:40:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:40:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:40:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:40:37:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:40:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:40:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:40:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:40:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:40:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:40:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:40:37:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:40:37:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:40:37:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:40:37:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:40:37:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:40:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:40:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:40:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:40:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:40:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:40:39:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: ________________________________________________________________________XXXXXX__
      Uplink  3: ________________________________________________________________________XXXXXX__
      Uplink  4: ________________________________________________________________________XXXXXXX_
      Uplink  5: ________________________________________________________________________XXXXXXX_
      Uplink  6: ________________________________________________________________________XXXXXX__
      Uplink  7: ________________________________________________________________________XXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: _______________________________________________________________________XXXXXXX__
      Uplink 13: _______________________________________________________________________XXXXXXX__
      Uplink 14: ________________________________________________________________________XXXXXXX_
      Uplink 15: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 1:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 4:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 36
      Eye Window: _________________________XXXX___________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____

09:40:39:setup_element:INFO:	Performing Elink synchronization
09:40:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:40:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:40:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:40:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:40:39:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:40:39:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:40:39:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
09:40:41:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:40:41:febtest:INFO:	01-00 | XA-000-08-002-000-004-062-01 |   6.1 | 1242.0
09:40:41:febtest:INFO:	08-01 | XA-000-08-002-000-004-025-15 |  31.4 | 1159.7
09:40:41:febtest:INFO:	03-02 | XA-000-08-002-000-004-064-13 |  21.9 | 1206.9
09:40:42:febtest:INFO:	10-03 | XA-000-08-002-000-004-026-15 |  15.6 | 1218.6
09:40:42:febtest:INFO:	05-04 | XA-000-08-002-000-004-060-01 |  28.2 | 1183.3
09:40:42:febtest:INFO:	12-05 | XA-000-08-002-000-004-027-15 |  18.7 | 1212.7
09:40:42:febtest:INFO:	07-06 | XA-000-08-002-000-004-061-01 |  25.1 | 1183.3
09:40:43:febtest:INFO:	14-07 | XA-000-08-002-000-004-030-15 |  34.6 | 1147.8
09:40:43:ST3_smx:INFO:	Configuring SMX FAST
09:40:45:ST3_smx:INFO:	chip: 1-0 	 15.590880 C 	 1224.468235 mV
09:40:45:ST3_smx:INFO:		Electrons
09:40:45:ST3_smx:INFO:	# loops 0
09:40:47:ST3_smx:INFO:	# loops 1
09:40:49:ST3_smx:INFO:	# loops 2
09:40:50:ST3_smx:INFO:	# loops 3
09:40:52:ST3_smx:INFO:	# loops 4
09:40:54:ST3_smx:INFO:	Total # of broken channels: 0
09:40:54:ST3_smx:INFO:	List of broken channels: []
09:40:54:ST3_smx:INFO:	Total # of broken channels: 1
09:40:54:ST3_smx:INFO:	List of broken channels: [103]
09:40:55:ST3_smx:INFO:	Configuring SMX FAST
09:40:57:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1177.390875 mV
09:40:57:ST3_smx:INFO:		Electrons
09:40:57:ST3_smx:INFO:	# loops 0
09:40:59:ST3_smx:INFO:	# loops 1
09:41:00:ST3_smx:INFO:	# loops 2
09:41:02:ST3_smx:INFO:	# loops 3
09:41:04:ST3_smx:INFO:	# loops 4
09:41:05:ST3_smx:INFO:	Total # of broken channels: 0
09:41:05:ST3_smx:INFO:	List of broken channels: []
09:41:05:ST3_smx:INFO:	Total # of broken channels: 3
09:41:05:ST3_smx:INFO:	List of broken channels: [123, 125, 127]
09:41:06:ST3_smx:INFO:	Configuring SMX FAST
09:41:08:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1165.571835 mV
09:41:08:ST3_smx:INFO:		Electrons
09:41:08:ST3_smx:INFO:	# loops 0
09:41:10:ST3_smx:INFO:	# loops 1
09:41:12:ST3_smx:INFO:	# loops 2
09:41:13:ST3_smx:INFO:	# loops 3
09:41:15:ST3_smx:INFO:	# loops 4
09:41:17:ST3_smx:INFO:	Total # of broken channels: 0
09:41:17:ST3_smx:INFO:	List of broken channels: []
09:41:17:ST3_smx:INFO:	Total # of broken channels: 0
09:41:17:ST3_smx:INFO:	List of broken channels: []
09:41:18:ST3_smx:INFO:	Configuring SMX FAST
09:41:20:ST3_smx:INFO:	chip: 10-3 	 21.902970 C 	 1206.851500 mV
09:41:20:ST3_smx:INFO:		Electrons
09:41:20:ST3_smx:INFO:	# loops 0
09:41:21:ST3_smx:INFO:	# loops 1
09:41:23:ST3_smx:INFO:	# loops 2
09:41:25:ST3_smx:INFO:	# loops 3
09:41:26:ST3_smx:INFO:	# loops 4
09:41:28:ST3_smx:INFO:	Total # of broken channels: 9
09:41:28:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17]
09:41:28:ST3_smx:INFO:	Total # of broken channels: 9
09:41:28:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17]
09:41:29:ST3_smx:INFO:	Configuring SMX FAST
09:41:31:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1189.190035 mV
09:41:31:ST3_smx:INFO:		Electrons
09:41:31:ST3_smx:INFO:	# loops 0
09:41:33:ST3_smx:INFO:	# loops 1
09:41:34:ST3_smx:INFO:	# loops 2
09:41:36:ST3_smx:INFO:	# loops 3
09:41:38:ST3_smx:INFO:	# loops 4
09:41:39:ST3_smx:INFO:	Total # of broken channels: 0
09:41:39:ST3_smx:INFO:	List of broken channels: []
09:41:39:ST3_smx:INFO:	Total # of broken channels: 1
09:41:39:ST3_smx:INFO:	List of broken channels: [103]
09:41:40:ST3_smx:INFO:	Configuring SMX FAST
09:41:42:ST3_smx:INFO:	chip: 12-5 	 25.062742 C 	 1195.082160 mV
09:41:42:ST3_smx:INFO:		Electrons
09:41:42:ST3_smx:INFO:	# loops 0
09:41:44:ST3_smx:INFO:	# loops 1
09:41:46:ST3_smx:INFO:	# loops 2
09:41:47:ST3_smx:INFO:	# loops 3
09:41:49:ST3_smx:INFO:	# loops 4
09:41:51:ST3_smx:INFO:	Total # of broken channels: 0
09:41:51:ST3_smx:INFO:	List of broken channels: []
09:41:51:ST3_smx:INFO:	Total # of broken channels: 1
09:41:51:ST3_smx:INFO:	List of broken channels: [127]
09:41:52:ST3_smx:INFO:	Configuring SMX FAST
09:41:54:ST3_smx:INFO:	chip: 7-6 	 28.225000 C 	 1195.082160 mV
09:41:54:ST3_smx:INFO:		Electrons
09:41:54:ST3_smx:INFO:	# loops 0
09:41:55:ST3_smx:INFO:	# loops 1
09:41:57:ST3_smx:INFO:	# loops 2
09:41:59:ST3_smx:INFO:	# loops 3
09:42:00:ST3_smx:INFO:	# loops 4
09:42:02:ST3_smx:INFO:	Total # of broken channels: 0
09:42:02:ST3_smx:INFO:	List of broken channels: []
09:42:02:ST3_smx:INFO:	Total # of broken channels: 0
09:42:02:ST3_smx:INFO:	List of broken channels: []
09:42:03:ST3_smx:INFO:	Configuring SMX FAST
09:42:05:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1171.483840 mV
09:42:05:ST3_smx:INFO:		Electrons
09:42:05:ST3_smx:INFO:	# loops 0
09:42:07:ST3_smx:INFO:	# loops 1
09:42:08:ST3_smx:INFO:	# loops 2
09:42:10:ST3_smx:INFO:	# loops 3
09:42:12:ST3_smx:INFO:	# loops 4
09:42:14:ST3_smx:INFO:	Total # of broken channels: 0
09:42:14:ST3_smx:INFO:	List of broken channels: []
09:42:14:ST3_smx:INFO:	Total # of broken channels: 0
09:42:14:ST3_smx:INFO:	List of broken channels: []
09:42:14:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:42:15:febtest:INFO:	01-00 | XA-000-08-002-000-004-062-01 |  18.7 | 1224.5
09:42:15:febtest:INFO:	08-01 | XA-000-08-002-000-004-025-15 |  28.2 | 1183.3
09:42:15:febtest:INFO:	03-02 | XA-000-08-002-000-004-064-13 |  34.6 | 1165.6
09:42:15:febtest:INFO:	10-03 | XA-000-08-002-000-004-026-15 |  21.9 | 1206.9
09:42:16:febtest:INFO:	05-04 | XA-000-08-002-000-004-060-01 |  28.2 | 1189.2
09:42:16:febtest:INFO:	12-05 | XA-000-08-002-000-004-027-15 |  25.1 | 1195.1
09:42:16:febtest:INFO:	07-06 | XA-000-08-002-000-004-061-01 |  28.2 | 1195.1
09:42:16:febtest:INFO:	14-07 | XA-000-08-002-000-004-030-15 |  34.6 | 1171.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_03_06-09_39_31
OPERATOR  : Alois Alzheimer
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5DL300117 M5DL3B1001171B2 62 B

FEB_SN : 1131
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	07333

MODULE_NAME:	L5DL300117 M5DL3B1001171B2 62 B

MODULE_TYPE:	
MODULE_LADDER:	L5DL300117
MODULE_MODULE:	M5DL3B1001171B2
MODULE_SIZE:	62
MODULE_GRADE:	B
---------------------------------------
VI_before_Init : ['2.450', '1.8500', '1.850', '0.5612', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9930', '1.850', '0.6106', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.3211', '0.000', '0.0000', '0.000', '0.0000']
09:42:34:ST3_Shared:INFO:	Listo of operators:Robert V.; 
09:42:50:febtest:INFO:	FEB type: 8.2
09:42:50:febtest:INFO:	FEB SN: 1120