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FEB_1123 29.02.24 21:56:42
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21:56:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
21:56:42:ST3_Shared:INFO: FEB-ASIC
21:56:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
21:56:42:febtest:INFO: Testing FEB with SN 1123
21:56:45:smx_tester:INFO: Scanning setup
21:56:45:elinks:INFO: Disabling clock on downlink 0
21:56:45:elinks:INFO: Disabling clock on downlink 1
21:56:45:elinks:INFO: Disabling clock on downlink 2
21:56:45:elinks:INFO: Disabling clock on downlink 3
21:56:45:elinks:INFO: Disabling clock on downlink 4
21:56:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
21:56:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
21:56:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
21:56:45:elinks:INFO: Disabling clock on downlink 0
21:56:45:elinks:INFO: Disabling clock on downlink 1
21:56:45:elinks:INFO: Disabling clock on downlink 2
21:56:45:elinks:INFO: Disabling clock on downlink 3
21:56:45:elinks:INFO: Disabling clock on downlink 4
21:56:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
21:56:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
21:56:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
21:56:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
21:56:45:elinks:INFO: Disabling clock on downlink 0
21:56:45:elinks:INFO: Disabling clock on downlink 1
21:56:45:elinks:INFO: Disabling clock on downlink 2
21:56:45:elinks:INFO: Disabling clock on downlink 3
21:56:45:elinks:INFO: Disabling clock on downlink 4
21:56:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
21:56:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
21:56:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
21:56:46:elinks:INFO: Disabling clock on downlink 0
21:56:46:elinks:INFO: Disabling clock on downlink 1
21:56:46:elinks:INFO: Disabling clock on downlink 2
21:56:46:elinks:INFO: Disabling clock on downlink 3
21:56:46:elinks:INFO: Disabling clock on downlink 4
21:56:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
21:56:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
21:56:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
21:56:46:elinks:INFO: Disabling clock on downlink 0
21:56:46:elinks:INFO: Disabling clock on downlink 1
21:56:46:elinks:INFO: Disabling clock on downlink 2
21:56:46:elinks:INFO: Disabling clock on downlink 3
21:56:46:elinks:INFO: Disabling clock on downlink 4
21:56:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
21:56:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
21:56:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
21:56:46:setup_element:INFO: Scanning clock phase
21:56:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
21:56:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
21:56:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
21:56:46:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
21:56:46:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
21:56:46:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
21:56:46:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
21:56:46:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
21:56:46:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
21:56:46:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
21:56:46:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
21:56:46:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
21:56:46:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
21:56:46:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
21:56:46:setup_element:INFO: Scanning data phases
21:56:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
21:56:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
21:56:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
21:56:52:setup_element:INFO: Eye window for uplink 0 : _____________XXXX_______________________
Data delay found: 34
21:56:52:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
21:56:52:setup_element:INFO: Eye window for uplink 2 : ______XXXXXX____________________________
Data delay found: 28
21:56:52:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
21:56:52:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
21:56:52:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
21:56:52:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
21:56:52:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
21:56:52:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________
Data delay found: 7
21:56:52:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
21:56:52:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
21:56:52:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
21:56:52:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
21:56:52:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
21:56:52:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
21:56:52:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
21:56:52:setup_element:INFO: Setting the data phase to 34 for uplink 0
21:56:52:setup_element:INFO: Setting the data phase to 30 for uplink 1
21:56:52:setup_element:INFO: Setting the data phase to 28 for uplink 2
21:56:52:setup_element:INFO: Setting the data phase to 26 for uplink 3
21:56:52:setup_element:INFO: Setting the data phase to 28 for uplink 4
21:56:52:setup_element:INFO: Setting the data phase to 24 for uplink 5
21:56:52:setup_element:INFO: Setting the data phase to 20 for uplink 6
21:56:52:setup_element:INFO: Setting the data phase to 16 for uplink 7
21:56:52:setup_element:INFO: Setting the data phase to 7 for uplink 8
21:56:52:setup_element:INFO: Setting the data phase to 12 for uplink 9
21:56:52:setup_element:INFO: Setting the data phase to 10 for uplink 10
21:56:52:setup_element:INFO: Setting the data phase to 14 for uplink 11
21:56:52:setup_element:INFO: Setting the data phase to 8 for uplink 12
21:56:52:setup_element:INFO: Setting the data phase to 11 for uplink 13
21:56:52:setup_element:INFO: Setting the data phase to 10 for uplink 14
21:56:52:setup_element:INFO: Setting the data phase to 12 for uplink 15
21:56:52:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 8:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
]
21:56:52:setup_element:INFO: Beginning SMX ASICs map scan
21:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
21:56:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
21:56:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
21:56:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
21:56:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
21:56:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
21:56:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
21:56:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
21:56:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
21:56:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
21:56:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
21:56:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
21:56:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
21:56:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
21:56:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
21:56:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
21:56:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
21:56:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
21:56:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
21:56:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
21:56:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
21:56:55:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 8:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
21:56:55:setup_element:INFO: Performing Elink synchronization
21:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
21:56:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
21:56:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
21:56:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
21:56:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
21:56:55:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
21:56:55:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
21:56:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
21:56:57:febtest:INFO: 01-00 | XA-000-08-002-001-006-160-07 | 31.4 | 1195.1
21:56:57:febtest:INFO: 08-01 | XA-000-08-002-001-006-165-07 | 31.4 | 1206.9
21:56:57:febtest:INFO: 03-02 | XA-000-08-002-001-006-175-07 | 18.7 | 1242.0
21:56:57:febtest:INFO: 10-03 | XA-000-08-002-001-006-179-00 | 34.6 | 1195.1
21:56:58:febtest:INFO: 05-04 | XA-000-08-002-001-006-178-00 | 34.6 | 1189.2
21:56:58:febtest:INFO: 12-05 | XA-000-08-002-001-006-174-07 | 9.3 | 1294.5
21:56:58:febtest:INFO: 07-06 | XA-000-08-002-001-006-167-07 | 28.2 | 1212.7
21:56:58:febtest:INFO: 14-07 | XA-000-08-002-001-006-162-07 | 28.2 | 1224.5
21:56:58:ST3_smx:INFO: Configuring SMX FAST
21:57:00:ST3_smx:INFO: chip: 1-0 37.726682 C 1177.390875 mV
21:57:01:ST3_smx:INFO: Electrons
21:57:01:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:02:ST3_smx:INFO: ----> Checking Analog response
21:57:02:ST3_smx:INFO: ----> Checking broken channels
21:57:03:ST3_smx:INFO: Total # broken ch: 0
21:57:03:ST3_smx:INFO: List FAST: []
21:57:03:ST3_smx:INFO: List SLOW: []
21:57:03:ST3_smx:INFO: Holes
21:57:03:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:05:ST3_smx:INFO: ----> Checking Analog response
21:57:05:ST3_smx:INFO: ----> Checking broken channels
21:57:05:ST3_smx:INFO: Total # broken ch: 0
21:57:05:ST3_smx:INFO: List FAST: []
21:57:05:ST3_smx:INFO: List SLOW: []
21:57:06:ST3_smx:INFO: Configuring SMX FAST
21:57:08:ST3_smx:INFO: chip: 8-1 37.726682 C 1189.190035 mV
21:57:08:ST3_smx:INFO: Electrons
21:57:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:10:ST3_smx:INFO: ----> Checking Analog response
21:57:10:ST3_smx:INFO: ----> Checking broken channels
21:57:10:ST3_smx:INFO: Total # broken ch: 0
21:57:10:ST3_smx:INFO: List FAST: []
21:57:10:ST3_smx:INFO: List SLOW: []
21:57:10:ST3_smx:INFO: Holes
21:57:10:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:12:ST3_smx:INFO: ----> Checking Analog response
21:57:12:ST3_smx:INFO: ----> Checking broken channels
21:57:13:ST3_smx:INFO: Total # broken ch: 0
21:57:13:ST3_smx:INFO: List FAST: []
21:57:13:ST3_smx:INFO: List SLOW: []
21:57:13:ST3_smx:INFO: Configuring SMX FAST
21:57:15:ST3_smx:INFO: chip: 3-2 21.902970 C 1236.187875 mV
21:57:15:ST3_smx:INFO: Electrons
21:57:15:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:17:ST3_smx:INFO: ----> Checking Analog response
21:57:17:ST3_smx:INFO: ----> Checking broken channels
21:57:18:ST3_smx:INFO: Total # broken ch: 0
21:57:18:ST3_smx:INFO: List FAST: []
21:57:18:ST3_smx:INFO: List SLOW: []
21:57:18:ST3_smx:INFO: Holes
21:57:18:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:20:ST3_smx:INFO: ----> Checking Analog response
21:57:20:ST3_smx:INFO: ----> Checking broken channels
21:57:20:ST3_smx:INFO: Total # broken ch: 0
21:57:20:ST3_smx:INFO: List FAST: []
21:57:20:ST3_smx:INFO: List SLOW: []
21:57:21:ST3_smx:INFO: Configuring SMX FAST
21:57:23:ST3_smx:INFO: chip: 10-3 37.726682 C 1189.190035 mV
21:57:23:ST3_smx:INFO: Electrons
21:57:23:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:25:ST3_smx:INFO: ----> Checking Analog response
21:57:25:ST3_smx:INFO: ----> Checking broken channels
21:57:25:ST3_smx:INFO: Total # broken ch: 0
21:57:25:ST3_smx:INFO: List FAST: []
21:57:25:ST3_smx:INFO: List SLOW: []
21:57:25:ST3_smx:INFO: Holes
21:57:25:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:27:ST3_smx:INFO: ----> Checking Analog response
21:57:27:ST3_smx:INFO: ----> Checking broken channels
21:57:27:ST3_smx:INFO: Total # broken ch: 0
21:57:27:ST3_smx:INFO: List FAST: []
21:57:27:ST3_smx:INFO: List SLOW: []
21:57:28:ST3_smx:INFO: Configuring SMX FAST
21:57:30:ST3_smx:INFO: chip: 5-4 37.726682 C 1183.292940 mV
21:57:30:ST3_smx:INFO: Electrons
21:57:30:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:32:ST3_smx:INFO: ----> Checking Analog response
21:57:32:ST3_smx:INFO: ----> Checking broken channels
21:57:32:ST3_smx:INFO: Total # broken ch: 0
21:57:32:ST3_smx:INFO: List FAST: []
21:57:32:ST3_smx:INFO: List SLOW: []
21:57:32:ST3_smx:INFO: Holes
21:57:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:34:ST3_smx:INFO: ----> Checking Analog response
21:57:34:ST3_smx:INFO: ----> Checking broken channels
21:57:35:ST3_smx:INFO: Total # broken ch: 0
21:57:35:ST3_smx:INFO: List FAST: []
21:57:35:ST3_smx:INFO: List SLOW: []
21:57:35:ST3_smx:INFO: Configuring SMX FAST
21:57:37:ST3_smx:INFO: chip: 12-5 18.745682 C 1259.567515 mV
21:57:37:ST3_smx:INFO: Electrons
21:57:37:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:39:ST3_smx:INFO: ----> Checking Analog response
21:57:39:ST3_smx:INFO: ----> Checking broken channels
21:57:39:ST3_smx:INFO: Total # broken ch: 0
21:57:39:ST3_smx:INFO: List FAST: []
21:57:39:ST3_smx:INFO: List SLOW: []
21:57:39:ST3_smx:INFO: Holes
21:57:39:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:42:ST3_smx:INFO: ----> Checking Analog response
21:57:42:ST3_smx:INFO: ----> Checking broken channels
21:57:42:ST3_smx:INFO: Total # broken ch: 0
21:57:42:ST3_smx:INFO: List FAST: []
21:57:42:ST3_smx:INFO: List SLOW: []
21:57:43:ST3_smx:INFO: Configuring SMX FAST
21:57:45:ST3_smx:INFO: chip: 7-6 31.389742 C 1212.728715 mV
21:57:45:ST3_smx:INFO: Electrons
21:57:45:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:47:ST3_smx:INFO: ----> Checking Analog response
21:57:47:ST3_smx:INFO: ----> Checking broken channels
21:57:47:ST3_smx:INFO: Total # broken ch: 0
21:57:47:ST3_smx:INFO: List FAST: []
21:57:47:ST3_smx:INFO: List SLOW: []
21:57:47:ST3_smx:INFO: Holes
21:57:47:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:49:ST3_smx:INFO: ----> Checking Analog response
21:57:49:ST3_smx:INFO: ----> Checking broken channels
21:57:49:ST3_smx:INFO: Total # broken ch: 0
21:57:49:ST3_smx:INFO: List FAST: []
21:57:49:ST3_smx:INFO: List SLOW: []
21:57:50:ST3_smx:INFO: Configuring SMX FAST
21:57:52:ST3_smx:INFO: chip: 14-7 28.225000 C 1236.187875 mV
21:57:52:ST3_smx:INFO: Electrons
21:57:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:54:ST3_smx:INFO: ----> Checking Analog response
21:57:54:ST3_smx:INFO: ----> Checking broken channels
21:57:54:ST3_smx:INFO: Total # broken ch: 0
21:57:54:ST3_smx:INFO: List FAST: []
21:57:54:ST3_smx:INFO: List SLOW: []
21:57:54:ST3_smx:INFO: Holes
21:57:54:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
21:57:56:ST3_smx:INFO: ----> Checking Analog response
21:57:56:ST3_smx:INFO: ----> Checking broken channels
21:57:57:ST3_smx:INFO: Total # broken ch: 0
21:57:57:ST3_smx:INFO: List FAST: []
21:57:57:ST3_smx:INFO: List SLOW: []
21:57:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
21:57:58:febtest:INFO: 01-00 | XA-000-08-002-001-006-160-07 | 37.7 | 1177.4
21:57:58:febtest:INFO: 08-01 | XA-000-08-002-001-006-165-07 | 37.7 | 1189.2
21:57:58:febtest:INFO: 03-02 | XA-000-08-002-001-006-175-07 | 25.1 | 1236.2
21:57:58:febtest:INFO: 10-03 | XA-000-08-002-001-006-179-00 | 37.7 | 1189.2
21:57:58:febtest:INFO: 05-04 | XA-000-08-002-001-006-178-00 | 37.7 | 1183.3
21:57:59:febtest:INFO: 12-05 | XA-000-08-002-001-006-174-07 | 21.9 | 1253.7
21:57:59:febtest:INFO: 07-06 | XA-000-08-002-001-006-167-07 | 31.4 | 1212.7
21:57:59:febtest:INFO: 14-07 | XA-000-08-002-001-006-162-07 | 28.2 | 1230.3
############################################################
# S U M M A R Y #
############################################################
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_02_29-21_56_42
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1123
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.451', '1.8200', '1.850', '2.2430', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9680', '1.850', '0.4331', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.3108', '0.000', '0.0000', '0.000', '0.0000']