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FEB_1127 09.04.24 15:13:57
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15:13:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:13:57:ST3_Shared:INFO: FEB-ASIC
15:13:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:13:58:febtest:INFO: Testing FEB with SN 1127
15:14:00:smx_tester:INFO: Scanning setup
15:14:00:elinks:INFO: Disabling clock on downlink 0
15:14:00:elinks:INFO: Disabling clock on downlink 1
15:14:00:elinks:INFO: Disabling clock on downlink 2
15:14:00:elinks:INFO: Disabling clock on downlink 3
15:14:00:elinks:INFO: Disabling clock on downlink 4
15:14:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:14:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:01:elinks:INFO: Disabling clock on downlink 0
15:14:01:elinks:INFO: Disabling clock on downlink 1
15:14:01:elinks:INFO: Disabling clock on downlink 2
15:14:01:elinks:INFO: Disabling clock on downlink 3
15:14:01:elinks:INFO: Disabling clock on downlink 4
15:14:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:14:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:14:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:14:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:14:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:14:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:14:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:01:elinks:INFO: Disabling clock on downlink 0
15:14:01:elinks:INFO: Disabling clock on downlink 1
15:14:01:elinks:INFO: Disabling clock on downlink 2
15:14:01:elinks:INFO: Disabling clock on downlink 3
15:14:01:elinks:INFO: Disabling clock on downlink 4
15:14:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:14:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:01:elinks:INFO: Disabling clock on downlink 0
15:14:01:elinks:INFO: Disabling clock on downlink 1
15:14:01:elinks:INFO: Disabling clock on downlink 2
15:14:01:elinks:INFO: Disabling clock on downlink 3
15:14:01:elinks:INFO: Disabling clock on downlink 4
15:14:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:14:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:01:elinks:INFO: Disabling clock on downlink 0
15:14:01:elinks:INFO: Disabling clock on downlink 1
15:14:01:elinks:INFO: Disabling clock on downlink 2
15:14:01:elinks:INFO: Disabling clock on downlink 3
15:14:01:elinks:INFO: Disabling clock on downlink 4
15:14:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:14:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:01:setup_element:INFO: Scanning clock phase
15:14:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:02:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:14:02:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:14:02:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:14:02:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:14:02:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:14:02:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:02:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:02:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
15:14:02:setup_element:INFO: Scanning data phases
15:14:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:07:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:14:07:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
15:14:07:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXX_
Data delay found: 16
15:14:07:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXXX____
Data delay found: 12
15:14:07:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
15:14:07:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
15:14:07:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXXX_
Data delay found: 15
15:14:07:setup_element:INFO: Setting the data phase to 12 for uplink 10
15:14:07:setup_element:INFO: Setting the data phase to 16 for uplink 11
15:14:07:setup_element:INFO: Setting the data phase to 12 for uplink 12
15:14:07:setup_element:INFO: Setting the data phase to 16 for uplink 13
15:14:07:setup_element:INFO: Setting the data phase to 13 for uplink 14
15:14:07:setup_element:INFO: Setting the data phase to 15 for uplink 15
15:14:07:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 72
Eye Windows:
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 10:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 15:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
]
15:14:07:setup_element:INFO: Beginning SMX ASICs map scan
15:14:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:14:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:14:07:uplink:INFO: Setting uplinks mask [10, 11, 12, 13, 14, 15]
15:14:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:14:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:14:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:14:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:14:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:14:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:14:10:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 72
Eye Windows:
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 10:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 15:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
15:14:10:setup_element:INFO: Performing Elink synchronization
15:14:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:14:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:14:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:14:10:uplink:INFO: Enabling uplinks [10, 11, 12, 13, 14, 15]
15:14:10:ST3_emu:INFO: Number of chips: 3
addr | upli | dwnli | grp | uplinks | uplinks_map
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
15:14:10:febtest:ERROR: HW addres 3 != 0
15:14:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:14:14:febtest:INFO: 10-03 | XA-000-08-002-000-008-081-00 | 47.3 | 1165.6
15:14:14:febtest:INFO: 12-05 | XA-000-08-002-000-008-082-00 | 50.4 | 1153.7
15:14:15:febtest:INFO: 14-07 | XA-000-08-002-000-008-088-00 | 47.3 | 1159.7
15:14:15:ST3_smx:INFO: Configuring SMX FAST
15:14:17:ST3_smx:INFO: chip: 10-3 50.430383 C 1153.732915 mV
15:14:17:ST3_smx:INFO: Electrons
15:14:17:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:14:19:ST3_smx:INFO: ----> Checking Analog response
15:14:19:ST3_smx:INFO: ----> Checking broken channels
15:14:20:ST3_smx:INFO: Total # broken ch: 3
15:14:20:ST3_smx:INFO: List FAST: [2, 53, 111]
15:14:20:ST3_smx:INFO: List SLOW: []
15:14:20:ST3_smx:INFO: Holes
15:14:20:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:14:22:ST3_smx:INFO: ----> Checking Analog response
15:14:22:ST3_smx:INFO: ----> Checking broken channels
15:14:22:ST3_smx:INFO: Total # broken ch: 3
15:14:22:ST3_smx:INFO: List FAST: [2, 53, 111]
15:14:22:ST3_smx:INFO: List SLOW: []
15:14:22:ST3_smx:INFO: Configuring SMX FAST
15:14:24:ST3_smx:INFO: chip: 12-5 47.250730 C 1165.571835 mV
15:14:24:ST3_smx:INFO: Electrons
15:14:24:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:14:27:ST3_smx:INFO: ----> Checking Analog response
15:14:27:ST3_smx:INFO: ----> Checking broken channels
15:14:27:ST3_smx:INFO: Total # broken ch: 6
15:14:27:ST3_smx:INFO: List FAST: [16, 25, 31, 37, 97, 116]
15:14:27:ST3_smx:INFO: List SLOW: []
15:14:27:ST3_smx:INFO: Holes
15:14:27:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:14:29:ST3_smx:INFO: ----> Checking Analog response
15:14:29:ST3_smx:INFO: ----> Checking broken channels
15:14:29:ST3_smx:INFO: Total # broken ch: 6
15:14:29:ST3_smx:INFO: List FAST: [16, 25, 31, 37, 97, 116]
15:14:29:ST3_smx:INFO: List SLOW: []
15:14:30:ST3_smx:INFO: Configuring SMX FAST
15:14:32:ST3_smx:INFO: chip: 14-7 50.430383 C 1153.732915 mV
15:14:32:ST3_smx:INFO: Electrons
15:14:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:14:34:ST3_smx:INFO: ----> Checking Analog response
15:14:34:ST3_smx:INFO: ----> Checking broken channels
15:14:34:ST3_smx:INFO: Total # broken ch: 1
15:14:34:ST3_smx:INFO: List FAST: [81]
15:14:34:ST3_smx:INFO: List SLOW: []
15:14:34:ST3_smx:INFO: Holes
15:14:34:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
15:14:36:ST3_smx:INFO: ----> Checking Analog response
15:14:36:ST3_smx:INFO: ----> Checking broken channels
15:14:36:ST3_smx:INFO: Total # broken ch: 1
15:14:36:ST3_smx:INFO: List FAST: [81]
15:14:36:ST3_smx:INFO: List SLOW: []
15:14:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:14:37:febtest:INFO: 10-03 | XA-000-08-002-000-008-081-00 | 53.6 | 1147.8
15:14:37:febtest:INFO: 12-05 | XA-000-08-002-000-008-082-00 | 50.4 | 1159.7
15:14:37:febtest:INFO: 14-07 | XA-000-08-002-000-008-088-00 | 50.4 | 1147.8
############################################################
# S U M M A R Y #
############################################################
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_04_09-15_13_57
OPERATOR : Irakli K.; Ralf K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1127
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.451', '0.7364', '1.850', '1.3880', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9567', '1.850', '0.9094', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9526', '1.850', '0.6151', '0.000', '0.0000', '0.000', '0.0000']