
FEB_1127 11.04.24 12:53:48
TextEdit.txt
12:53:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:53:48:ST3_Shared:INFO: FEB-Microcable 12:53:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:53:48:febtest:INFO: Testing FEB with SN 1127 12:53:51:smx_tester:INFO: Scanning setup 12:53:51:elinks:INFO: Disabling clock on downlink 0 12:53:51:elinks:INFO: Disabling clock on downlink 1 12:53:51:elinks:INFO: Disabling clock on downlink 2 12:53:51:elinks:INFO: Disabling clock on downlink 3 12:53:51:elinks:INFO: Disabling clock on downlink 4 12:53:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:53:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:51:elinks:INFO: Disabling clock on downlink 0 12:53:51:elinks:INFO: Disabling clock on downlink 1 12:53:51:elinks:INFO: Disabling clock on downlink 2 12:53:51:elinks:INFO: Disabling clock on downlink 3 12:53:51:elinks:INFO: Disabling clock on downlink 4 12:53:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 12:53:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 12:53:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:51:elinks:INFO: Disabling clock on downlink 0 12:53:51:elinks:INFO: Disabling clock on downlink 1 12:53:51:elinks:INFO: Disabling clock on downlink 2 12:53:51:elinks:INFO: Disabling clock on downlink 3 12:53:51:elinks:INFO: Disabling clock on downlink 4 12:53:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:53:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:51:elinks:INFO: Disabling clock on downlink 0 12:53:51:elinks:INFO: Disabling clock on downlink 1 12:53:51:elinks:INFO: Disabling clock on downlink 2 12:53:51:elinks:INFO: Disabling clock on downlink 3 12:53:51:elinks:INFO: Disabling clock on downlink 4 12:53:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:53:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:51:elinks:INFO: Disabling clock on downlink 0 12:53:51:elinks:INFO: Disabling clock on downlink 1 12:53:51:elinks:INFO: Disabling clock on downlink 2 12:53:51:elinks:INFO: Disabling clock on downlink 3 12:53:51:elinks:INFO: Disabling clock on downlink 4 12:53:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:53:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:52:setup_element:INFO: Scanning clock phase 12:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:53:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:53:52:setup_element:INFO: Clock phase scan results for group 0, downlink 1 12:53:52:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:53:52:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:53:52:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 12:53:52:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 12:53:52:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:53:52:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:53:52:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 12:53:52:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 12:53:52:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:53:52:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:53:52:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:53:52:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:53:52:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:53:52:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:53:52:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________ Clock Delay: 40 12:53:52:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________ Clock Delay: 40 12:53:52:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 12:53:52:setup_element:INFO: Scanning data phases 12:53:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:53:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:53:57:setup_element:INFO: Data phase scan results for group 0, downlink 1 12:53:57:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________ Data delay found: 32 12:53:57:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________ Data delay found: 28 12:53:57:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________ Data delay found: 28 12:53:57:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_______________________________ Data delay found: 25 12:53:57:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________ Data delay found: 25 12:53:57:setup_element:INFO: Eye window for uplink 5 : XXXX___________________________________X Data delay found: 21 12:53:57:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX Data delay found: 20 12:53:57:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX Data delay found: 17 12:53:57:setup_element:INFO: Eye window for uplink 8 : __________________________XXXX__________ Data delay found: 7 12:53:57:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____ Data delay found: 12 12:53:57:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 12:53:57:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 12:53:57:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX_________ Data delay found: 8 12:53:57:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______ Data delay found: 11 12:53:57:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______ Data delay found: 10 12:53:57:setup_element:INFO: Eye window for uplink 15: _______________________________XXXX_____ Data delay found: 12 12:53:57:setup_element:INFO: Setting the data phase to 32 for uplink 0 12:53:57:setup_element:INFO: Setting the data phase to 28 for uplink 1 12:53:57:setup_element:INFO: Setting the data phase to 28 for uplink 2 12:53:57:setup_element:INFO: Setting the data phase to 25 for uplink 3 12:53:57:setup_element:INFO: Setting the data phase to 25 for uplink 4 12:53:57:setup_element:INFO: Setting the data phase to 21 for uplink 5 12:53:57:setup_element:INFO: Setting the data phase to 20 for uplink 6 12:53:57:setup_element:INFO: Setting the data phase to 17 for uplink 7 12:53:57:setup_element:INFO: Setting the data phase to 7 for uplink 8 12:53:57:setup_element:INFO: Setting the data phase to 12 for uplink 9 12:53:57:setup_element:INFO: Setting the data phase to 8 for uplink 10 12:53:57:setup_element:INFO: Setting the data phase to 12 for uplink 11 12:53:57:setup_element:INFO: Setting the data phase to 8 for uplink 12 12:53:57:setup_element:INFO: Setting the data phase to 11 for uplink 13 12:53:57:setup_element:INFO: Setting the data phase to 10 for uplink 14 12:53:57:setup_element:INFO: Setting the data phase to 12 for uplink 15 12:53:57:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 71 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXX__ Uplink 1: _______________________________________________________________________XXXXXXX__ Uplink 2: ________________________________________________________________________XXXXXX__ Uplink 3: ________________________________________________________________________XXXXXX__ Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXXX_ Uplink 7: ________________________________________________________________________XXXXXXX_ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: _______________________________________________________________________XXXXXXX__ Uplink 13: _______________________________________________________________________XXXXXXX__ Uplink 14: ________________________________________________________________________________ Uplink 15: ________________________________________________________________________________ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 6: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 8: Optimal Phase: 7 Window Length: 36 Eye Window: __________________________XXXX__________ Uplink 9: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 36 Eye Window: _______________________________XXXX_____ ] 12:53:57:setup_element:INFO: Beginning SMX ASICs map scan 12:53:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:53:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:53:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 12:53:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 12:53:57:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 12:53:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 12:53:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 12:53:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 12:53:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 12:53:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 12:53:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 12:53:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 12:53:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 12:53:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 12:53:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 12:53:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 12:53:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 12:53:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 12:53:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 12:53:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 12:53:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 12:54:00:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 71 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXX__ Uplink 1: _______________________________________________________________________XXXXXXX__ Uplink 2: ________________________________________________________________________XXXXXX__ Uplink 3: ________________________________________________________________________XXXXXX__ Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXXX_ Uplink 7: ________________________________________________________________________XXXXXXX_ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: _______________________________________________________________________XXXXXXX__ Uplink 13: _______________________________________________________________________XXXXXXX__ Uplink 14: ________________________________________________________________________________ Uplink 15: ________________________________________________________________________________ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 6: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 8: Optimal Phase: 7 Window Length: 36 Eye Window: __________________________XXXX__________ Uplink 9: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 36 Eye Window: _______________________________XXXX_____ 12:54:00:setup_element:INFO: Performing Elink synchronization 12:54:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:54:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:54:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 12:54:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 12:54:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 12:54:00:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 12:54:00:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 12:54:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:54:02:febtest:INFO: 01-00 | XA-000-08-002-000-003-202-15 | 18.7 | 1224.5 12:54:02:febtest:INFO: 08-01 | XA-000-08-002-001-006-059-10 | 37.7 | 1165.6 12:54:02:febtest:INFO: 03-02 | XA-000-08-002-000-003-208-08 | 25.1 | 1206.9 12:54:02:febtest:INFO: 10-03 | XA-000-08-002-000-008-081-00 | 34.6 | 1177.4 12:54:02:febtest:INFO: 05-04 | XA-000-08-002-000-003-204-15 | 40.9 | 1153.7 12:54:03:febtest:INFO: 12-05 | XA-000-08-002-000-008-082-00 | 40.9 | 1153.7 12:54:03:febtest:INFO: 07-06 | XA-000-08-002-000-003-207-15 | 25.1 | 1206.9 12:54:03:febtest:INFO: 14-07 | XA-000-08-002-000-008-088-00 | 34.6 | 1165.6 12:54:03:ST3_smx:INFO: Configuring SMX FAST 12:54:05:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV 12:54:05:ST3_smx:INFO: Electrons 12:54:05:ST3_smx:INFO: # loops 0 12:54:07:ST3_smx:INFO: # loops 1 12:54:09:ST3_smx:INFO: # loops 2 12:54:10:ST3_smx:INFO: Total # of broken channels: 0 12:54:10:ST3_smx:INFO: List of broken channels: [] 12:54:10:ST3_smx:INFO: Total # of broken channels: 0 12:54:10:ST3_smx:INFO: List of broken channels: [] 12:54:11:ST3_smx:INFO: Configuring SMX FAST 12:54:13:ST3_smx:INFO: chip: 8-1 34.556970 C 1183.292940 mV 12:54:13:ST3_smx:INFO: Electrons 12:54:13:ST3_smx:INFO: # loops 0 12:54:15:ST3_smx:INFO: # loops 1 12:54:17:ST3_smx:INFO: # loops 2 12:54:18:ST3_smx:INFO: Total # of broken channels: 0 12:54:18:ST3_smx:INFO: List of broken channels: [] 12:54:18:ST3_smx:INFO: Total # of broken channels: 0 12:54:18:ST3_smx:INFO: List of broken channels: [] 12:54:19:ST3_smx:INFO: Configuring SMX FAST 12:54:21:ST3_smx:INFO: chip: 3-2 28.225000 C 1206.851500 mV 12:54:21:ST3_smx:INFO: Electrons 12:54:21:ST3_smx:INFO: # loops 0 12:54:23:ST3_smx:INFO: # loops 1 12:54:25:ST3_smx:INFO: # loops 2 12:54:27:ST3_smx:INFO: Total # of broken channels: 0 12:54:27:ST3_smx:INFO: List of broken channels: [] 12:54:27:ST3_smx:INFO: Total # of broken channels: 0 12:54:27:ST3_smx:INFO: List of broken channels: [] 12:54:28:ST3_smx:INFO: Configuring SMX FAST 12:54:30:ST3_smx:INFO: chip: 10-3 40.898880 C 1159.654860 mV 12:54:30:ST3_smx:INFO: Electrons 12:54:30:ST3_smx:INFO: # loops 0 12:54:32:ST3_smx:INFO: # loops 1 12:54:33:ST3_smx:INFO: # loops 2 12:54:35:ST3_smx:INFO: Total # of broken channels: 1 12:54:35:ST3_smx:INFO: List of broken channels: [0] 12:54:35:ST3_smx:INFO: Total # of broken channels: 2 12:54:35:ST3_smx:INFO: List of broken channels: [0, 90] 12:54:36:ST3_smx:INFO: Configuring SMX FAST 12:54:38:ST3_smx:INFO: chip: 5-4 34.556970 C 1183.292940 mV 12:54:38:ST3_smx:INFO: Electrons 12:54:38:ST3_smx:INFO: # loops 0 12:54:40:ST3_smx:INFO: # loops 1 12:54:41:ST3_smx:INFO: # loops 2 12:54:43:ST3_smx:INFO: Total # of broken channels: 0 12:54:43:ST3_smx:INFO: List of broken channels: [] 12:54:43:ST3_smx:INFO: Total # of broken channels: 0 12:54:43:ST3_smx:INFO: List of broken channels: [] 12:54:44:ST3_smx:INFO: Configuring SMX FAST 12:54:46:ST3_smx:INFO: chip: 12-5 37.726682 C 1165.571835 mV 12:54:46:ST3_smx:INFO: Electrons 12:54:46:ST3_smx:INFO: # loops 0 12:54:48:ST3_smx:INFO: # loops 1 12:54:49:ST3_smx:INFO: # loops 2 12:54:51:ST3_smx:INFO: Total # of broken channels: 1 12:54:51:ST3_smx:INFO: List of broken channels: [13] 12:54:51:ST3_smx:INFO: Total # of broken channels: 1 12:54:51:ST3_smx:INFO: List of broken channels: [13] 12:54:52:ST3_smx:INFO: Configuring SMX FAST 12:54:54:ST3_smx:INFO: chip: 7-6 34.556970 C 1171.483840 mV 12:54:54:ST3_smx:INFO: Electrons 12:54:54:ST3_smx:INFO: # loops 0 12:54:56:ST3_smx:INFO: # loops 1 12:54:57:ST3_smx:INFO: # loops 2 12:54:59:ST3_smx:INFO: Total # of broken channels: 0 12:54:59:ST3_smx:INFO: List of broken channels: [] 12:54:59:ST3_smx:INFO: Total # of broken channels: 0 12:54:59:ST3_smx:INFO: List of broken channels: [] 12:55:00:ST3_smx:INFO: Configuring SMX FAST 12:55:02:ST3_smx:INFO: chip: 14-7 37.726682 C 1159.654860 mV 12:55:02:ST3_smx:INFO: Electrons 12:55:02:ST3_smx:INFO: # loops 0 12:55:04:ST3_smx:INFO: # loops 1 12:55:05:ST3_smx:INFO: # loops 2 12:55:07:ST3_smx:INFO: Total # of broken channels: 0 12:55:07:ST3_smx:INFO: List of broken channels: [] 12:55:07:ST3_smx:INFO: Total # of broken channels: 0 12:55:07:ST3_smx:INFO: List of broken channels: [] 12:55:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:55:08:febtest:INFO: 01-00 | XA-000-08-002-000-003-202-15 | 37.7 | 1171.5 12:55:09:febtest:INFO: 08-01 | XA-000-08-002-001-006-059-10 | 34.6 | 1189.2 12:55:09:febtest:INFO: 03-02 | XA-000-08-002-000-003-208-08 | 28.2 | 1201.0 12:55:09:febtest:INFO: 10-03 | XA-000-08-002-000-008-081-00 | 40.9 | 1159.7 12:55:09:febtest:INFO: 05-04 | XA-000-08-002-000-003-204-15 | 34.6 | 1183.3 12:55:09:febtest:INFO: 12-05 | XA-000-08-002-000-008-082-00 | 37.7 | 1165.6 12:55:10:febtest:INFO: 07-06 | XA-000-08-002-000-003-207-15 | 37.7 | 1177.4 12:55:10:febtest:INFO: 14-07 | XA-000-08-002-000-008-088-00 | 37.7 | 1159.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_04_11-12_53_48 OPERATOR : Robert V.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 1127 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.450', '1.4980', '1.850', '2.0630', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0050', '1.850', '0.6055', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '2.0000', '1.850', '0.3214', '0.000', '0.0000', '0.000', '0.0000']