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FEB_1134 08.04.24 08:33:44
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08:33:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:33:44:ST3_Shared:INFO: FEB-Sensor
08:33:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:34:00:ST3_ModuleSelector:INFO: L4UL401032 M4UL4B0010320A2 42 C
08:34:00:ST3_ModuleSelector:INFO: 13082
08:34:01:febtest:INFO: Testing FEB with SN 1134
08:34:03:smx_tester:INFO: Scanning setup
08:34:03:elinks:INFO: Disabling clock on downlink 0
08:34:03:elinks:INFO: Disabling clock on downlink 1
08:34:03:elinks:INFO: Disabling clock on downlink 2
08:34:03:elinks:INFO: Disabling clock on downlink 3
08:34:03:elinks:INFO: Disabling clock on downlink 4
08:34:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:34:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:34:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:34:03:elinks:INFO: Disabling clock on downlink 0
08:34:03:elinks:INFO: Disabling clock on downlink 1
08:34:04:elinks:INFO: Disabling clock on downlink 2
08:34:04:elinks:INFO: Disabling clock on downlink 3
08:34:04:elinks:INFO: Disabling clock on downlink 4
08:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:34:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:34:04:elinks:INFO: Disabling clock on downlink 0
08:34:04:elinks:INFO: Disabling clock on downlink 1
08:34:04:elinks:INFO: Disabling clock on downlink 2
08:34:04:elinks:INFO: Disabling clock on downlink 3
08:34:04:elinks:INFO: Disabling clock on downlink 4
08:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:34:04:elinks:INFO: Disabling clock on downlink 0
08:34:04:elinks:INFO: Disabling clock on downlink 1
08:34:04:elinks:INFO: Disabling clock on downlink 2
08:34:04:elinks:INFO: Disabling clock on downlink 3
08:34:04:elinks:INFO: Disabling clock on downlink 4
08:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:34:04:elinks:INFO: Disabling clock on downlink 0
08:34:04:elinks:INFO: Disabling clock on downlink 1
08:34:04:elinks:INFO: Disabling clock on downlink 2
08:34:04:elinks:INFO: Disabling clock on downlink 3
08:34:04:elinks:INFO: Disabling clock on downlink 4
08:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:34:04:setup_element:INFO: Scanning clock phase
08:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:34:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:34:05:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:34:05:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:34:05:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:34:05:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:34:05:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:34:05:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:34:05:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:34:05:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXX____
Clock Delay: 33
08:34:05:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXX____
Clock Delay: 33
08:34:05:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
08:34:05:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
08:34:05:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:34:05:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:34:05:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:34:05:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:34:05:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:34:05:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:34:05:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
08:34:05:setup_element:INFO: Scanning data phases
08:34:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:34:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:34:10:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:34:10:setup_element:INFO: Eye window for uplink 0 : ________XXXXX___________________________
Data delay found: 30
08:34:10:setup_element:INFO: Eye window for uplink 1 : ____XXXXX_______________________________
Data delay found: 26
08:34:10:setup_element:INFO: Eye window for uplink 2 : ___________XXXX_________________________
Data delay found: 32
08:34:10:setup_element:INFO: Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
08:34:10:setup_element:INFO: Eye window for uplink 4 : __XXXXX_________________________________
Data delay found: 24
08:34:10:setup_element:INFO: Eye window for uplink 5 : XXX__________________________________XXX
Data delay found: 19
08:34:10:setup_element:INFO: Eye window for uplink 6 : ___________________________________XXXX_
Data delay found: 16
08:34:10:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXXX____
Data delay found: 13
08:34:10:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX____XXXXXXXXX
Data delay found: 10
08:34:10:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXXXXXXXXX
Data delay found: 13
08:34:10:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
08:34:10:setup_element:INFO: Eye window for uplink 11: _____________________________XXXX_______
Data delay found: 10
08:34:10:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
08:34:10:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
08:34:10:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
08:34:10:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
08:34:10:setup_element:INFO: Setting the data phase to 30 for uplink 0
08:34:10:setup_element:INFO: Setting the data phase to 26 for uplink 1
08:34:10:setup_element:INFO: Setting the data phase to 32 for uplink 2
08:34:10:setup_element:INFO: Setting the data phase to 30 for uplink 3
08:34:10:setup_element:INFO: Setting the data phase to 24 for uplink 4
08:34:10:setup_element:INFO: Setting the data phase to 19 for uplink 5
08:34:10:setup_element:INFO: Setting the data phase to 16 for uplink 6
08:34:10:setup_element:INFO: Setting the data phase to 13 for uplink 7
08:34:10:setup_element:INFO: Setting the data phase to 10 for uplink 8
08:34:10:setup_element:INFO: Setting the data phase to 13 for uplink 9
08:34:10:setup_element:INFO: Setting the data phase to 7 for uplink 10
08:34:10:setup_element:INFO: Setting the data phase to 10 for uplink 11
08:34:10:setup_element:INFO: Setting the data phase to 8 for uplink 12
08:34:10:setup_element:INFO: Setting the data phase to 11 for uplink 13
08:34:10:setup_element:INFO: Setting the data phase to 10 for uplink 14
08:34:10:setup_element:INFO: Setting the data phase to 12 for uplink 15
08:34:10:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXX__
Uplink 1: _______________________________________________________________________XXXXXXX__
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _______________________________________________________________________XXXXX____
Uplink 7: _______________________________________________________________________XXXXX____
Uplink 8: ________________________________________________________________________________
Uplink 9: ________________________________________________________________________________
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ________________________________________________________________________XXXXXXX_
Uplink 15: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 1:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 2:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 3:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 4:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 5:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 6:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 7:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 8:
Optimal Phase: 10
Window Length: 22
Eye Window: ______________________XXXXX____XXXXXXXXX
Uplink 9:
Optimal Phase: 13
Window Length: 27
Eye Window: ___________________________XXXXXXXXXXXXX
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
]
08:34:10:setup_element:INFO: Beginning SMX ASICs map scan
08:34:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:34:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:34:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:34:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:34:10:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:34:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:34:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:34:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:34:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:34:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:34:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:34:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:34:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:34:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:34:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:34:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:34:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:34:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:34:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:34:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:34:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:34:13:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXX__
Uplink 1: _______________________________________________________________________XXXXXXX__
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _______________________________________________________________________XXXXX____
Uplink 7: _______________________________________________________________________XXXXX____
Uplink 8: ________________________________________________________________________________
Uplink 9: ________________________________________________________________________________
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ________________________________________________________________________XXXXXXX_
Uplink 15: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 1:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 2:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 3:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 4:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 5:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 6:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 7:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 8:
Optimal Phase: 10
Window Length: 22
Eye Window: ______________________XXXXX____XXXXXXXXX
Uplink 9:
Optimal Phase: 13
Window Length: 27
Eye Window: ___________________________XXXXXXXXXXXXX
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
08:34:13:setup_element:INFO: Performing Elink synchronization
08:34:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:34:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:34:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:34:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:34:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:34:13:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:34:13:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
08:34:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:34:15:febtest:INFO: 01-00 | XA-000-08-002-000-001-210-11 | 31.4 | 1177.4
08:34:15:febtest:INFO: 08-01 | XA-000-08-002-000-001-199-12 | 28.2 | 1189.2
08:34:15:febtest:INFO: 03-02 | XA-000-08-002-001-006-005-03 | -0.1 | 1300.3
08:34:16:febtest:INFO: 10-03 | XA-000-08-002-000-001-180-00 | 44.1 | 1141.9
08:34:16:febtest:INFO: 05-04 | XA-000-08-002-000-001-075-06 | 44.1 | 1147.8
08:34:16:febtest:INFO: 12-05 | XA-000-08-002-000-001-109-08 | 37.7 | 1177.4
08:34:16:febtest:INFO: 07-06 | XA-000-08-002-000-001-208-11 | 31.4 | 1195.1
08:34:17:febtest:INFO: 14-07 | XA-000-08-002-000-001-108-08 | 31.4 | 1183.3
08:34:17:ST3_smx:INFO: Configuring SMX FAST
08:34:19:ST3_smx:INFO: chip: 1-0 34.556970 C 1165.571835 mV
08:34:19:ST3_smx:INFO: Electrons
08:34:19:ST3_smx:INFO: # loops 0
08:34:21:ST3_smx:INFO: # loops 1
08:34:23:ST3_smx:INFO: # loops 2
08:34:24:ST3_smx:INFO: # loops 3
08:34:26:ST3_smx:INFO: # loops 4
08:34:28:ST3_smx:INFO: Total # of broken channels: 0
08:34:28:ST3_smx:INFO: List of broken channels: []
08:34:28:ST3_smx:INFO: Total # of broken channels: 0
08:34:28:ST3_smx:INFO: List of broken channels: []
08:34:29:ST3_smx:INFO: Configuring SMX FAST
08:34:31:ST3_smx:INFO: chip: 8-1 40.898880 C 1147.806000 mV
08:34:31:ST3_smx:INFO: Electrons
08:34:31:ST3_smx:INFO: # loops 0
08:34:33:ST3_smx:INFO: # loops 1
08:34:34:ST3_smx:INFO: # loops 2
08:34:36:ST3_smx:INFO: # loops 3
08:34:38:ST3_smx:INFO: # loops 4
08:34:39:ST3_smx:INFO: Total # of broken channels: 0
08:34:39:ST3_smx:INFO: List of broken channels: []
08:34:39:ST3_smx:INFO: Total # of broken channels: 0
08:34:39:ST3_smx:INFO: List of broken channels: []
08:34:40:ST3_smx:INFO: Configuring SMX FAST
08:34:42:ST3_smx:INFO: chip: 3-2 9.288730 C 1271.227515 mV
08:34:42:ST3_smx:INFO: Electrons
08:34:42:ST3_smx:INFO: # loops 0
08:34:44:ST3_smx:INFO: # loops 1
08:34:46:ST3_smx:INFO: # loops 2
08:34:47:ST3_smx:INFO: # loops 3
08:34:49:ST3_smx:INFO: # loops 4
08:34:51:ST3_smx:INFO: Total # of broken channels: 0
08:34:51:ST3_smx:INFO: List of broken channels: []
08:34:51:ST3_smx:INFO: Total # of broken channels: 0
08:34:51:ST3_smx:INFO: List of broken channels: []
08:34:52:ST3_smx:INFO: Configuring SMX FAST
08:34:54:ST3_smx:INFO: chip: 10-3 47.250730 C 1129.995435 mV
08:34:54:ST3_smx:INFO: Electrons
08:34:54:ST3_smx:INFO: # loops 0
08:34:55:ST3_smx:INFO: # loops 1
08:34:57:ST3_smx:INFO: # loops 2
08:34:59:ST3_smx:INFO: # loops 3
08:35:01:ST3_smx:INFO: # loops 4
08:35:02:ST3_smx:INFO: Total # of broken channels: 1
08:35:02:ST3_smx:INFO: List of broken channels: [126]
08:35:02:ST3_smx:INFO: Total # of broken channels: 1
08:35:02:ST3_smx:INFO: List of broken channels: [126]
08:35:03:ST3_smx:INFO: Configuring SMX FAST
08:35:05:ST3_smx:INFO: chip: 5-4 50.430383 C 1135.937260 mV
08:35:05:ST3_smx:INFO: Electrons
08:35:05:ST3_smx:INFO: # loops 0
08:35:07:ST3_smx:INFO: # loops 1
08:35:09:ST3_smx:INFO: # loops 2
08:35:10:ST3_smx:INFO: # loops 3
08:35:12:ST3_smx:INFO: # loops 4
08:35:14:ST3_smx:INFO: Total # of broken channels: 0
08:35:14:ST3_smx:INFO: List of broken channels: []
08:35:14:ST3_smx:INFO: Total # of broken channels: 0
08:35:14:ST3_smx:INFO: List of broken channels: []
08:35:14:ST3_smx:INFO: Configuring SMX FAST
08:35:16:ST3_smx:INFO: chip: 12-5 50.430383 C 1147.806000 mV
08:35:16:ST3_smx:INFO: Electrons
08:35:16:ST3_smx:INFO: # loops 0
08:35:18:ST3_smx:INFO: # loops 1
08:35:20:ST3_smx:INFO: # loops 2
08:35:22:ST3_smx:INFO: # loops 3
08:35:23:ST3_smx:INFO: # loops 4
08:35:25:ST3_smx:INFO: Total # of broken channels: 0
08:35:25:ST3_smx:INFO: List of broken channels: []
08:35:25:ST3_smx:INFO: Total # of broken channels: 0
08:35:25:ST3_smx:INFO: List of broken channels: []
08:35:26:ST3_smx:INFO: Configuring SMX FAST
08:35:28:ST3_smx:INFO: chip: 7-6 44.073563 C 1165.571835 mV
08:35:28:ST3_smx:INFO: Electrons
08:35:28:ST3_smx:INFO: # loops 0
08:35:30:ST3_smx:INFO: # loops 1
08:35:31:ST3_smx:INFO: # loops 2
08:35:33:ST3_smx:INFO: # loops 3
08:35:35:ST3_smx:INFO: # loops 4
08:35:36:ST3_smx:INFO: Total # of broken channels: 0
08:35:36:ST3_smx:INFO: List of broken channels: []
08:35:36:ST3_smx:INFO: Total # of broken channels: 1
08:35:36:ST3_smx:INFO: List of broken channels: [1]
08:35:37:ST3_smx:INFO: Configuring SMX FAST
08:35:39:ST3_smx:INFO: chip: 14-7 40.898880 C 1165.571835 mV
08:35:39:ST3_smx:INFO: Electrons
08:35:39:ST3_smx:INFO: # loops 0
08:35:41:ST3_smx:INFO: # loops 1
08:35:43:ST3_smx:INFO: # loops 2
08:35:44:ST3_smx:INFO: # loops 3
08:35:46:ST3_smx:INFO: # loops 4
08:35:48:ST3_smx:INFO: Total # of broken channels: 0
08:35:48:ST3_smx:INFO: List of broken channels: []
08:35:48:ST3_smx:INFO: Total # of broken channels: 2
08:35:48:ST3_smx:INFO: List of broken channels: [1, 123]
08:35:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:35:49:febtest:INFO: 01-00 | XA-000-08-002-000-001-210-11 | 37.7 | 1171.5
08:35:49:febtest:INFO: 08-01 | XA-000-08-002-000-001-199-12 | 44.1 | 1147.8
08:35:49:febtest:INFO: 03-02 | XA-000-08-002-001-006-005-03 | 9.3 | 1271.2
08:35:50:febtest:INFO: 10-03 | XA-000-08-002-000-001-180-00 | 50.4 | 1130.0
08:35:50:febtest:INFO: 05-04 | XA-000-08-002-000-001-075-06 | 50.4 | 1135.9
08:35:50:febtest:INFO: 12-05 | XA-000-08-002-000-001-109-08 | 50.4 | 1147.8
08:35:50:febtest:INFO: 07-06 | XA-000-08-002-000-001-208-11 | 44.1 | 1165.6
08:35:50:febtest:INFO: 14-07 | XA-000-08-002-000-001-108-08 | 44.1 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_04_08-08_33_44
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B0010320A2 42 C
FEB_SN : 1134
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 13082
MODULE_NAME: L4UL401032 M4UL4B0010320A2 42 C
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4B0010320A2
MODULE_SIZE: 42
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.7300', '1.850', '0.5195', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0150', '1.850', '0.4755', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9990', '1.850', '0.3190', '0.000', '0.0000', '0.000', '0.0000']