
FEB_1141 26.03.24 08:16:10
TextEdit.txt
08:16:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:16:10:ST3_Shared:INFO: FEB-Sensor 08:16:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:16:22:ST3_ModuleSelector:INFO: L4DL400117 M4DL4T1001171A2 62 C 08:16:22:ST3_ModuleSelector:INFO: 08153 08:16:23:febtest:INFO: Testing FEB with SN 1141 08:16:25:smx_tester:INFO: Scanning setup 08:16:25:elinks:INFO: Disabling clock on downlink 0 08:16:25:elinks:INFO: Disabling clock on downlink 1 08:16:25:elinks:INFO: Disabling clock on downlink 2 08:16:25:elinks:INFO: Disabling clock on downlink 3 08:16:25:elinks:INFO: Disabling clock on downlink 4 08:16:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:16:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:25:elinks:INFO: Disabling clock on downlink 0 08:16:25:elinks:INFO: Disabling clock on downlink 1 08:16:25:elinks:INFO: Disabling clock on downlink 2 08:16:25:elinks:INFO: Disabling clock on downlink 3 08:16:25:elinks:INFO: Disabling clock on downlink 4 08:16:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 08:16:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 08:16:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:25:elinks:INFO: Disabling clock on downlink 0 08:16:26:elinks:INFO: Disabling clock on downlink 1 08:16:26:elinks:INFO: Disabling clock on downlink 2 08:16:26:elinks:INFO: Disabling clock on downlink 3 08:16:26:elinks:INFO: Disabling clock on downlink 4 08:16:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:16:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:26:elinks:INFO: Disabling clock on downlink 0 08:16:26:elinks:INFO: Disabling clock on downlink 1 08:16:26:elinks:INFO: Disabling clock on downlink 2 08:16:26:elinks:INFO: Disabling clock on downlink 3 08:16:26:elinks:INFO: Disabling clock on downlink 4 08:16:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:16:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:26:elinks:INFO: Disabling clock on downlink 0 08:16:26:elinks:INFO: Disabling clock on downlink 1 08:16:26:elinks:INFO: Disabling clock on downlink 2 08:16:26:elinks:INFO: Disabling clock on downlink 3 08:16:26:elinks:INFO: Disabling clock on downlink 4 08:16:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:16:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:26:setup_element:INFO: Scanning clock phase 08:16:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:26:setup_element:INFO: Clock phase scan results for group 0, downlink 1 08:16:26:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:16:26:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:16:26:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:16:26:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:16:26:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:16:26:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:16:26:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:16:26:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:16:26:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:16:26:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:16:26:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________ Clock Delay: 40 08:16:26:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________ Clock Delay: 40 08:16:26:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:16:26:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:16:26:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:16:26:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:16:26:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 08:16:26:setup_element:INFO: Scanning data phases 08:16:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:32:setup_element:INFO: Data phase scan results for group 0, downlink 1 08:16:32:setup_element:INFO: Eye window for uplink 0 : ___________XXXX_________________________ Data delay found: 32 08:16:32:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________ Data delay found: 28 08:16:32:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________ Data delay found: 28 08:16:32:setup_element:INFO: Eye window for uplink 3 : __XXXXXX________________________________ Data delay found: 24 08:16:32:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________ Data delay found: 27 08:16:32:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________ Data delay found: 23 08:16:32:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________ Data delay found: 22 08:16:32:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX Data delay found: 18 08:16:32:setup_element:INFO: Eye window for uplink 8 : __________________________XXXX__________ Data delay found: 7 08:16:32:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____ Data delay found: 13 08:16:32:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________ Data delay found: 6 08:16:32:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXX________ Data delay found: 9 08:16:32:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______ Data delay found: 11 08:16:32:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___ Data delay found: 14 08:16:32:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXX________ Data delay found: 9 08:16:32:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______ Data delay found: 10 08:16:32:setup_element:INFO: Setting the data phase to 32 for uplink 0 08:16:32:setup_element:INFO: Setting the data phase to 28 for uplink 1 08:16:32:setup_element:INFO: Setting the data phase to 28 for uplink 2 08:16:32:setup_element:INFO: Setting the data phase to 24 for uplink 3 08:16:32:setup_element:INFO: Setting the data phase to 27 for uplink 4 08:16:32:setup_element:INFO: Setting the data phase to 23 for uplink 5 08:16:32:setup_element:INFO: Setting the data phase to 22 for uplink 6 08:16:32:setup_element:INFO: Setting the data phase to 18 for uplink 7 08:16:32:setup_element:INFO: Setting the data phase to 7 for uplink 8 08:16:32:setup_element:INFO: Setting the data phase to 13 for uplink 9 08:16:32:setup_element:INFO: Setting the data phase to 6 for uplink 10 08:16:32:setup_element:INFO: Setting the data phase to 9 for uplink 11 08:16:32:setup_element:INFO: Setting the data phase to 11 for uplink 12 08:16:32:setup_element:INFO: Setting the data phase to 14 for uplink 13 08:16:32:setup_element:INFO: Setting the data phase to 9 for uplink 14 08:16:32:setup_element:INFO: Setting the data phase to 10 for uplink 15 08:16:32:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 71 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXX__ Uplink 1: ________________________________________________________________________XXXXXX__ Uplink 2: ______________________________________________________________________XXXXXXX___ Uplink 3: ______________________________________________________________________XXXXXXX___ Uplink 4: _______________________________________________________________________XXXXXXX__ Uplink 5: _______________________________________________________________________XXXXXXX__ Uplink 6: ________________________________________________________________________XXXXXXX_ Uplink 7: ________________________________________________________________________XXXXXXX_ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: ________________________________________________________________________________ Uplink 11: ________________________________________________________________________________ Uplink 12: ________________________________________________________________________XXXXXXX_ Uplink 13: ________________________________________________________________________XXXXXXX_ Uplink 14: _______________________________________________________________________XXXXXXX__ Uplink 15: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 4: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 5: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 8: Optimal Phase: 7 Window Length: 36 Eye Window: __________________________XXXX__________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 6 Window Length: 35 Eye Window: ________________________XXXXX___________ Uplink 11: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 14: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 15: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ ] 08:16:32:setup_element:INFO: Beginning SMX ASICs map scan 08:16:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:16:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:16:32:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:16:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 08:16:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 08:16:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 08:16:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 08:16:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 08:16:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 08:16:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 08:16:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 08:16:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 08:16:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 08:16:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 08:16:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 08:16:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 08:16:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 08:16:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 08:16:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 08:16:35:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 71 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXX__ Uplink 1: ________________________________________________________________________XXXXXX__ Uplink 2: ______________________________________________________________________XXXXXXX___ Uplink 3: ______________________________________________________________________XXXXXXX___ Uplink 4: _______________________________________________________________________XXXXXXX__ Uplink 5: _______________________________________________________________________XXXXXXX__ Uplink 6: ________________________________________________________________________XXXXXXX_ Uplink 7: ________________________________________________________________________XXXXXXX_ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: ________________________________________________________________________________ Uplink 11: ________________________________________________________________________________ Uplink 12: ________________________________________________________________________XXXXXXX_ Uplink 13: ________________________________________________________________________XXXXXXX_ Uplink 14: _______________________________________________________________________XXXXXXX__ Uplink 15: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ Uplink 1: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 4: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 5: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 8: Optimal Phase: 7 Window Length: 36 Eye Window: __________________________XXXX__________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 6 Window Length: 35 Eye Window: ________________________XXXXX___________ Uplink 11: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 14: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 15: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ 08:16:35:setup_element:INFO: Performing Elink synchronization 08:16:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:16:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:16:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 08:16:35:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:16:35:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 08:16:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:16:37:febtest:INFO: 01-00 | XA-000-08-002-001-007-110-05 | 31.4 | 1171.5 08:16:37:febtest:INFO: 08-01 | XA-000-08-002-001-007-148-03 | 31.4 | 1183.3 08:16:37:febtest:INFO: 03-02 | XA-000-08-002-001-007-121-02 | 31.4 | 1177.4 08:16:37:febtest:INFO: 10-03 | XA-000-08-002-001-007-155-03 | 40.9 | 1141.9 08:16:38:febtest:INFO: 05-04 | XA-000-08-002-001-007-126-02 | 28.2 | 1189.2 08:16:38:febtest:INFO: 12-05 | XA-000-08-002-001-007-139-04 | 21.9 | 1230.3 08:16:38:febtest:INFO: 07-06 | XA-000-08-002-001-007-141-04 | 31.4 | 1177.4 08:16:38:febtest:INFO: 14-07 | XA-000-08-002-001-007-070-11 | 9.3 | 1265.4 08:16:39:ST3_smx:INFO: Configuring SMX FAST 08:16:41:ST3_smx:INFO: chip: 1-0 34.556970 C 1165.571835 mV 08:16:41:ST3_smx:INFO: Electrons 08:16:41:ST3_smx:INFO: # loops 0 08:16:42:ST3_smx:INFO: # loops 1 08:16:44:ST3_smx:INFO: # loops 2 08:16:46:ST3_smx:INFO: # loops 3 08:16:47:ST3_smx:INFO: # loops 4 08:16:49:ST3_smx:INFO: Total # of broken channels: 0 08:16:49:ST3_smx:INFO: List of broken channels: [] 08:16:49:ST3_smx:INFO: Total # of broken channels: 0 08:16:49:ST3_smx:INFO: List of broken channels: [] 08:16:50:ST3_smx:INFO: Configuring SMX FAST 08:16:52:ST3_smx:INFO: chip: 8-1 21.902970 C 1212.728715 mV 08:16:52:ST3_smx:INFO: Electrons 08:16:52:ST3_smx:INFO: # loops 0 08:16:54:ST3_smx:INFO: # loops 1 08:16:55:ST3_smx:INFO: # loops 2 08:16:57:ST3_smx:INFO: # loops 3 08:16:59:ST3_smx:INFO: # loops 4 08:17:01:ST3_smx:INFO: Total # of broken channels: 0 08:17:01:ST3_smx:INFO: List of broken channels: [] 08:17:01:ST3_smx:INFO: Total # of broken channels: 0 08:17:01:ST3_smx:INFO: List of broken channels: [] 08:17:02:ST3_smx:INFO: Configuring SMX FAST 08:17:04:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV 08:17:04:ST3_smx:INFO: Electrons 08:17:04:ST3_smx:INFO: # loops 0 08:17:06:ST3_smx:INFO: # loops 1 08:17:08:ST3_smx:INFO: # loops 2 08:17:09:ST3_smx:INFO: # loops 3 08:17:11:ST3_smx:INFO: # loops 4 08:17:13:ST3_smx:INFO: Total # of broken channels: 0 08:17:13:ST3_smx:INFO: List of broken channels: [] 08:17:13:ST3_smx:INFO: Total # of broken channels: 0 08:17:13:ST3_smx:INFO: List of broken channels: [] 08:17:14:ST3_smx:INFO: Configuring SMX FAST 08:17:16:ST3_smx:INFO: chip: 10-3 40.898880 C 1153.732915 mV 08:17:16:ST3_smx:INFO: Electrons 08:17:16:ST3_smx:INFO: # loops 0 08:17:18:ST3_smx:INFO: # loops 1 08:17:20:ST3_smx:INFO: # loops 2 08:17:21:ST3_smx:INFO: # loops 3 08:17:23:ST3_smx:INFO: # loops 4 08:17:24:ST3_smx:INFO: Total # of broken channels: 0 08:17:24:ST3_smx:INFO: List of broken channels: [] 08:17:24:ST3_smx:INFO: Total # of broken channels: 1 08:17:24:ST3_smx:INFO: List of broken channels: [127] 08:17:25:ST3_smx:INFO: Configuring SMX FAST 08:17:27:ST3_smx:INFO: chip: 5-4 28.225000 C 1195.082160 mV 08:17:27:ST3_smx:INFO: Electrons 08:17:27:ST3_smx:INFO: # loops 0 08:17:29:ST3_smx:INFO: # loops 1 08:17:30:ST3_smx:INFO: # loops 2 08:17:32:ST3_smx:INFO: # loops 3 08:17:34:ST3_smx:INFO: # loops 4 08:17:35:ST3_smx:INFO: Total # of broken channels: 0 08:17:35:ST3_smx:INFO: List of broken channels: [] 08:17:35:ST3_smx:INFO: Total # of broken channels: 0 08:17:35:ST3_smx:INFO: List of broken channels: [] 08:17:36:ST3_smx:INFO: Configuring SMX FAST 08:17:38:ST3_smx:INFO: chip: 12-5 21.902970 C 1242.040240 mV 08:17:38:ST3_smx:INFO: Electrons 08:17:38:ST3_smx:INFO: # loops 0 08:17:40:ST3_smx:INFO: # loops 1 08:17:42:ST3_smx:INFO: # loops 2 08:17:44:ST3_smx:INFO: # loops 3 08:17:46:ST3_smx:INFO: # loops 4 08:17:47:ST3_smx:INFO: Total # of broken channels: 0 08:17:47:ST3_smx:INFO: List of broken channels: [] 08:17:47:ST3_smx:INFO: Total # of broken channels: 3 08:17:47:ST3_smx:INFO: List of broken channels: [3, 5, 7] 08:17:48:ST3_smx:INFO: Configuring SMX FAST 08:17:50:ST3_smx:INFO: chip: 7-6 28.225000 C 1206.851500 mV 08:17:50:ST3_smx:INFO: Electrons 08:17:50:ST3_smx:INFO: # loops 0 08:17:52:ST3_smx:INFO: # loops 1 08:17:54:ST3_smx:INFO: # loops 2 08:17:56:ST3_smx:INFO: # loops 3 08:17:57:ST3_smx:INFO: # loops 4 08:17:59:ST3_smx:INFO: Total # of broken channels: 0 08:17:59:ST3_smx:INFO: List of broken channels: [] 08:17:59:ST3_smx:INFO: Total # of broken channels: 0 08:17:59:ST3_smx:INFO: List of broken channels: [] 08:18:00:ST3_smx:INFO: Configuring SMX FAST 08:18:02:ST3_smx:INFO: chip: 14-7 15.590880 C 1253.730060 mV 08:18:02:ST3_smx:INFO: Electrons 08:18:02:ST3_smx:INFO: # loops 0 08:18:04:ST3_smx:INFO: # loops 1 08:18:05:ST3_smx:INFO: # loops 2 08:18:07:ST3_smx:INFO: # loops 3 08:18:09:ST3_smx:INFO: # loops 4 08:18:10:ST3_smx:INFO: Total # of broken channels: 0 08:18:10:ST3_smx:INFO: List of broken channels: [] 08:18:10:ST3_smx:INFO: Total # of broken channels: 0 08:18:10:ST3_smx:INFO: List of broken channels: [] 08:18:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:18:12:febtest:INFO: 01-00 | XA-000-08-002-001-007-110-05 | 34.6 | 1165.6 08:18:12:febtest:INFO: 08-01 | XA-000-08-002-001-007-148-03 | 25.1 | 1212.7 08:18:12:febtest:INFO: 03-02 | XA-000-08-002-001-007-121-02 | 34.6 | 1177.4 08:18:12:febtest:INFO: 10-03 | XA-000-08-002-001-007-155-03 | 40.9 | 1153.7 08:18:13:febtest:INFO: 05-04 | XA-000-08-002-001-007-126-02 | 28.2 | 1195.1 08:18:13:febtest:INFO: 12-05 | XA-000-08-002-001-007-139-04 | 21.9 | 1242.0 08:18:13:febtest:INFO: 07-06 | XA-000-08-002-001-007-141-04 | 28.2 | 1201.0 08:18:13:febtest:INFO: 14-07 | XA-000-08-002-001-007-070-11 | 18.7 | 1253.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_03_26-08_16_10 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4DL400117 M4DL4T1001171A2 62 C FEB_SN : 1141 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 08153 MODULE_NAME: L4DL400117 M4DL4T1001171A2 62 C MODULE_TYPE: MODULE_LADDER: L4DL400117 MODULE_MODULE: M4DL4T1001171A2 MODULE_SIZE: 62 MODULE_GRADE: C --------------------------------------- VI_before_Init : ['2.450', '1.9760', '1.850', '0.5556', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0070', '1.850', '0.5489', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9890', '1.850', '0.3226', '0.000', '0.0000', '0.000', '0.0000'] 08:18:19:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; 08:18:19:ST3_Shared:INFO: Listo of operators:Kerstin S.; Olga B.; Oleksandr S.; 08:18:20:ST3_Shared:INFO: Listo of operators:Kerstin S.; Olga B.;