Go Back
FEB_1142 02.04.24 11:05:01
Info
11:05:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:01:ST3_Shared:INFO: FEB-Microcable
11:05:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:02:febtest:INFO: Testing FEB with SN 1142
11:05:04:smx_tester:INFO: Scanning setup
11:05:04:elinks:INFO: Disabling clock on downlink 0
11:05:04:elinks:INFO: Disabling clock on downlink 1
11:05:04:elinks:INFO: Disabling clock on downlink 2
11:05:04:elinks:INFO: Disabling clock on downlink 3
11:05:04:elinks:INFO: Disabling clock on downlink 4
11:05:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:05:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:04:elinks:INFO: Disabling clock on downlink 0
11:05:04:elinks:INFO: Disabling clock on downlink 1
11:05:04:elinks:INFO: Disabling clock on downlink 2
11:05:04:elinks:INFO: Disabling clock on downlink 3
11:05:04:elinks:INFO: Disabling clock on downlink 4
11:05:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:05:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:05:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:05:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:05:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:05:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:05:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:05:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:05:elinks:INFO: Disabling clock on downlink 0
11:05:05:elinks:INFO: Disabling clock on downlink 1
11:05:05:elinks:INFO: Disabling clock on downlink 2
11:05:05:elinks:INFO: Disabling clock on downlink 3
11:05:05:elinks:INFO: Disabling clock on downlink 4
11:05:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:05:elinks:INFO: Disabling clock on downlink 0
11:05:05:elinks:INFO: Disabling clock on downlink 1
11:05:05:elinks:INFO: Disabling clock on downlink 2
11:05:05:elinks:INFO: Disabling clock on downlink 3
11:05:05:elinks:INFO: Disabling clock on downlink 4
11:05:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:05:elinks:INFO: Disabling clock on downlink 0
11:05:05:elinks:INFO: Disabling clock on downlink 1
11:05:05:elinks:INFO: Disabling clock on downlink 2
11:05:05:elinks:INFO: Disabling clock on downlink 3
11:05:05:elinks:INFO: Disabling clock on downlink 4
11:05:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:05:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:05:setup_element:INFO: Scanning clock phase
11:05:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:05:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:05:05:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:05:05:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:05:05:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:05:05:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:05:05:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:05:05:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:05:05:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:05:05:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:05:05:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:05:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:05:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
11:05:05:setup_element:INFO: Scanning data phases
11:05:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:11:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:05:11:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
11:05:11:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
11:05:11:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
11:05:11:setup_element:INFO: Eye window for uplink 3 : _______XXXX_____________________________
Data delay found: 28
11:05:11:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
11:05:11:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
11:05:11:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
11:05:11:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
11:05:11:setup_element:INFO: Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
11:05:11:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
11:05:11:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
11:05:11:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
11:05:11:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
11:05:11:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
11:05:11:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____
Data delay found: 12
11:05:11:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
11:05:11:setup_element:INFO: Setting the data phase to 35 for uplink 0
11:05:11:setup_element:INFO: Setting the data phase to 31 for uplink 1
11:05:11:setup_element:INFO: Setting the data phase to 31 for uplink 2
11:05:11:setup_element:INFO: Setting the data phase to 28 for uplink 3
11:05:11:setup_element:INFO: Setting the data phase to 28 for uplink 4
11:05:11:setup_element:INFO: Setting the data phase to 24 for uplink 5
11:05:11:setup_element:INFO: Setting the data phase to 21 for uplink 6
11:05:11:setup_element:INFO: Setting the data phase to 17 for uplink 7
11:05:11:setup_element:INFO: Setting the data phase to 7 for uplink 8
11:05:11:setup_element:INFO: Setting the data phase to 13 for uplink 9
11:05:11:setup_element:INFO: Setting the data phase to 10 for uplink 10
11:05:11:setup_element:INFO: Setting the data phase to 14 for uplink 11
11:05:11:setup_element:INFO: Setting the data phase to 11 for uplink 12
11:05:11:setup_element:INFO: Setting the data phase to 14 for uplink 13
11:05:11:setup_element:INFO: Setting the data phase to 12 for uplink 14
11:05:11:setup_element:INFO: Setting the data phase to 14 for uplink 15
11:05:11:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXX_
Uplink 1: _________________________________________________________________________XXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 15:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
]
11:05:11:setup_element:INFO: Beginning SMX ASICs map scan
11:05:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:05:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:05:11:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:05:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:05:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:05:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:05:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:05:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:05:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:05:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:05:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:05:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:05:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:05:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:05:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:05:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:05:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:05:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:05:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:05:14:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXX_
Uplink 1: _________________________________________________________________________XXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 15:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
11:05:14:setup_element:INFO: Performing Elink synchronization
11:05:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:05:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:05:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:05:14:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:05:14:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
11:05:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:05:15:febtest:INFO: 01-00 | XA-000-08-002-000-008-005-02 | 34.6 | 1195.1
11:05:16:febtest:INFO: 08-01 | XA-000-08-002-000-007-245-00 | 25.1 | 1224.5
11:05:16:febtest:INFO: 03-02 | XA-000-08-002-000-008-014-02 | 47.3 | 1165.6
11:05:16:febtest:INFO: 10-03 | XA-000-08-002-000-007-246-00 | 44.1 | 1159.7
11:05:16:febtest:INFO: 05-04 | XA-000-08-002-000-008-025-05 | 21.9 | 1247.9
11:05:17:febtest:INFO: 12-05 | XA-000-08-002-000-008-001-02 | 25.1 | 1224.5
11:05:17:febtest:INFO: 07-06 | XA-000-08-002-000-008-024-05 | 25.1 | 1242.0
11:05:17:febtest:INFO: 14-07 | XA-000-08-002-000-007-255-00 | 31.4 | 1201.0
11:05:17:ST3_smx:INFO: Configuring SMX FAST
11:05:19:ST3_smx:INFO: chip: 1-0 31.389742 C 1218.600960 mV
11:05:19:ST3_smx:INFO: Electrons
11:05:19:ST3_smx:INFO: # loops 0
11:05:21:ST3_smx:INFO: # loops 1
11:05:22:ST3_smx:INFO: # loops 2
11:05:24:ST3_smx:INFO: Total # of broken channels: 0
11:05:24:ST3_smx:INFO: List of broken channels: []
11:05:24:ST3_smx:INFO: Total # of broken channels: 0
11:05:24:ST3_smx:INFO: List of broken channels: []
11:05:25:ST3_smx:INFO: Configuring SMX FAST
11:05:27:ST3_smx:INFO: chip: 8-1 28.225000 C 1206.851500 mV
11:05:27:ST3_smx:INFO: Electrons
11:05:27:ST3_smx:INFO: # loops 0
11:05:29:ST3_smx:INFO: # loops 1
11:05:30:ST3_smx:INFO: # loops 2
11:05:32:ST3_smx:INFO: Total # of broken channels: 0
11:05:32:ST3_smx:INFO: List of broken channels: []
11:05:32:ST3_smx:INFO: Total # of broken channels: 0
11:05:32:ST3_smx:INFO: List of broken channels: []
11:05:33:ST3_smx:INFO: Configuring SMX FAST
11:05:35:ST3_smx:INFO: chip: 3-2 44.073563 C 1171.483840 mV
11:05:35:ST3_smx:INFO: Electrons
11:05:35:ST3_smx:INFO: # loops 0
11:05:36:ST3_smx:INFO: # loops 1
11:05:38:ST3_smx:INFO: # loops 2
11:05:40:ST3_smx:INFO: Total # of broken channels: 0
11:05:40:ST3_smx:INFO: List of broken channels: []
11:05:40:ST3_smx:INFO: Total # of broken channels: 0
11:05:40:ST3_smx:INFO: List of broken channels: []
11:05:41:ST3_smx:INFO: Configuring SMX FAST
11:05:43:ST3_smx:INFO: chip: 10-3 47.250730 C 1141.874115 mV
11:05:43:ST3_smx:INFO: Electrons
11:05:43:ST3_smx:INFO: # loops 0
11:05:44:ST3_smx:INFO: # loops 1
11:05:46:ST3_smx:INFO: # loops 2
11:05:48:ST3_smx:INFO: Total # of broken channels: 0
11:05:48:ST3_smx:INFO: List of broken channels: []
11:05:48:ST3_smx:INFO: Total # of broken channels: 0
11:05:48:ST3_smx:INFO: List of broken channels: []
11:05:49:ST3_smx:INFO: Configuring SMX FAST
11:05:51:ST3_smx:INFO: chip: 5-4 21.902970 C 1253.730060 mV
11:05:51:ST3_smx:INFO: Electrons
11:05:51:ST3_smx:INFO: # loops 0
11:05:52:ST3_smx:INFO: # loops 1
11:05:54:ST3_smx:INFO: # loops 2
11:05:56:ST3_smx:INFO: Total # of broken channels: 0
11:05:56:ST3_smx:INFO: List of broken channels: []
11:05:56:ST3_smx:INFO: Total # of broken channels: 0
11:05:56:ST3_smx:INFO: List of broken channels: []
11:05:57:ST3_smx:INFO: Configuring SMX FAST
11:05:58:ST3_smx:INFO: chip: 12-5 37.726682 C 1189.190035 mV
11:05:58:ST3_smx:INFO: Electrons
11:05:59:ST3_smx:INFO: # loops 0
11:06:00:ST3_smx:INFO: # loops 1
11:06:02:ST3_smx:INFO: # loops 2
11:06:03:ST3_smx:INFO: Total # of broken channels: 0
11:06:03:ST3_smx:INFO: List of broken channels: []
11:06:03:ST3_smx:INFO: Total # of broken channels: 0
11:06:03:ST3_smx:INFO: List of broken channels: []
11:06:04:ST3_smx:INFO: Configuring SMX FAST
11:06:06:ST3_smx:INFO: chip: 7-6 31.389742 C 1236.187875 mV
11:06:06:ST3_smx:INFO: Electrons
11:06:06:ST3_smx:INFO: # loops 0
11:06:08:ST3_smx:INFO: # loops 1
11:06:10:ST3_smx:INFO: # loops 2
11:06:11:ST3_smx:INFO: Total # of broken channels: 0
11:06:11:ST3_smx:INFO: List of broken channels: []
11:06:11:ST3_smx:INFO: Total # of broken channels: 0
11:06:11:ST3_smx:INFO: List of broken channels: []
11:06:12:ST3_smx:INFO: Configuring SMX FAST
11:06:14:ST3_smx:INFO: chip: 14-7 31.389742 C 1212.728715 mV
11:06:14:ST3_smx:INFO: Electrons
11:06:14:ST3_smx:INFO: # loops 0
11:06:16:ST3_smx:INFO: # loops 1
11:06:18:ST3_smx:INFO: # loops 2
11:06:19:ST3_smx:INFO: Total # of broken channels: 0
11:06:19:ST3_smx:INFO: List of broken channels: []
11:06:19:ST3_smx:INFO: Total # of broken channels: 0
11:06:19:ST3_smx:INFO: List of broken channels: []
11:06:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:06:20:febtest:INFO: 01-00 | XA-000-08-002-000-008-005-02 | 31.4 | 1218.6
11:06:21:febtest:INFO: 08-01 | XA-000-08-002-000-007-245-00 | 28.2 | 1206.9
11:06:21:febtest:INFO: 03-02 | XA-000-08-002-000-008-014-02 | 44.1 | 1171.5
11:06:21:febtest:INFO: 10-03 | XA-000-08-002-000-007-246-00 | 50.4 | 1147.8
11:06:21:febtest:INFO: 05-04 | XA-000-08-002-000-008-025-05 | 21.9 | 1259.6
11:06:21:febtest:INFO: 12-05 | XA-000-08-002-000-008-001-02 | 37.7 | 1189.2
11:06:22:febtest:INFO: 07-06 | XA-000-08-002-000-008-024-05 | 31.4 | 1236.2
11:06:22:febtest:INFO: 14-07 | XA-000-08-002-000-007-255-00 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_04_02-11_05_01
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL400117 M4DL4T0001170A2 42 C
FEB_SN : 1142
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.4910', '1.849', '2.1520', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9920', '1.850', '0.5323', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.3215', '0.000', '0.0000', '0.000', '0.0000']