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FEB_1152 16.05.24 09:14:15
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09:14:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:14:15:ST3_Shared:INFO: FEB-Sensor
09:14:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:14:44:ST3_ModuleSelector:INFO: L4DL000161 M4DL0T1001611A2 62 A
09:14:44:ST3_ModuleSelector:INFO: 25163
09:14:44:febtest:INFO: Testing FEB with SN 1152
09:14:47:smx_tester:INFO: Scanning setup
09:14:47:elinks:INFO: Disabling clock on downlink 0
09:14:47:elinks:INFO: Disabling clock on downlink 1
09:14:47:elinks:INFO: Disabling clock on downlink 2
09:14:47:elinks:INFO: Disabling clock on downlink 3
09:14:47:elinks:INFO: Disabling clock on downlink 4
09:14:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:14:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:14:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:14:47:elinks:INFO: Disabling clock on downlink 0
09:14:47:elinks:INFO: Disabling clock on downlink 1
09:14:47:elinks:INFO: Disabling clock on downlink 2
09:14:47:elinks:INFO: Disabling clock on downlink 3
09:14:47:elinks:INFO: Disabling clock on downlink 4
09:14:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:14:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:14:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:14:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:14:47:elinks:INFO: Disabling clock on downlink 0
09:14:47:elinks:INFO: Disabling clock on downlink 1
09:14:47:elinks:INFO: Disabling clock on downlink 2
09:14:47:elinks:INFO: Disabling clock on downlink 3
09:14:47:elinks:INFO: Disabling clock on downlink 4
09:14:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:14:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:14:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:14:47:elinks:INFO: Disabling clock on downlink 0
09:14:47:elinks:INFO: Disabling clock on downlink 1
09:14:47:elinks:INFO: Disabling clock on downlink 2
09:14:48:elinks:INFO: Disabling clock on downlink 3
09:14:48:elinks:INFO: Disabling clock on downlink 4
09:14:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:14:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:14:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:14:48:elinks:INFO: Disabling clock on downlink 0
09:14:48:elinks:INFO: Disabling clock on downlink 1
09:14:48:elinks:INFO: Disabling clock on downlink 2
09:14:48:elinks:INFO: Disabling clock on downlink 3
09:14:48:elinks:INFO: Disabling clock on downlink 4
09:14:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:14:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:14:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:14:48:setup_element:INFO: Scanning clock phase
09:14:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:14:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:14:48:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:14:48:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:14:48:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:14:48:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:14:48:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:14:48:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:14:48:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:14:48:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:14:48:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:14:48:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:14:48:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
09:14:48:setup_element:INFO: Scanning data phases
09:14:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:14:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:14:54:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:14:54:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
09:14:54:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
09:14:54:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
09:14:54:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
09:14:54:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
09:14:54:setup_element:INFO: Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
09:14:54:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
09:14:54:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
09:14:54:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
09:14:54:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
09:14:54:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
09:14:54:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
09:14:54:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
09:14:54:setup_element:INFO: Eye window for uplink 13: ___________________________________XXXXX
Data delay found: 17
09:14:54:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
09:14:54:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
09:14:54:setup_element:INFO: Setting the data phase to 35 for uplink 0
09:14:54:setup_element:INFO: Setting the data phase to 30 for uplink 1
09:14:54:setup_element:INFO: Setting the data phase to 30 for uplink 2
09:14:54:setup_element:INFO: Setting the data phase to 27 for uplink 3
09:14:54:setup_element:INFO: Setting the data phase to 26 for uplink 4
09:14:54:setup_element:INFO: Setting the data phase to 21 for uplink 5
09:14:54:setup_element:INFO: Setting the data phase to 20 for uplink 6
09:14:54:setup_element:INFO: Setting the data phase to 17 for uplink 7
09:14:54:setup_element:INFO: Setting the data phase to 6 for uplink 8
09:14:54:setup_element:INFO: Setting the data phase to 11 for uplink 9
09:14:54:setup_element:INFO: Setting the data phase to 12 for uplink 10
09:14:54:setup_element:INFO: Setting the data phase to 15 for uplink 11
09:14:54:setup_element:INFO: Setting the data phase to 13 for uplink 12
09:14:54:setup_element:INFO: Setting the data phase to 17 for uplink 13
09:14:54:setup_element:INFO: Setting the data phase to 10 for uplink 14
09:14:54:setup_element:INFO: Setting the data phase to 12 for uplink 15
09:14:54:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ________________________________________________________________________XXXXXX__
Uplink 3: ________________________________________________________________________XXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 13:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
09:14:54:setup_element:INFO: Beginning SMX ASICs map scan
09:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:14:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:14:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:14:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:14:54:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:14:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:14:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:14:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:14:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:14:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:14:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:14:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:14:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:14:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:14:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:14:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:14:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:14:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:14:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:14:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:14:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:14:57:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: ________________________________________________________________________XXXXXX__
Uplink 3: ________________________________________________________________________XXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 13:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
09:14:57:setup_element:INFO: Performing Elink synchronization
09:14:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:14:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:14:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:14:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:14:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:14:57:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:14:57:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
09:14:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:14:58:febtest:INFO: 01-00 | XA-000-08-002-002-006-181-01 | 47.3 | 1147.8
09:14:59:febtest:INFO: 08-01 | XA-000-08-002-002-006-200-13 | 25.1 | 1218.6
09:14:59:febtest:INFO: 03-02 | XA-000-08-002-002-006-193-13 | 37.7 | 1189.2
09:14:59:febtest:INFO: 10-03 | XA-000-08-002-002-006-078-07 | 34.6 | 1195.1
09:14:59:febtest:INFO: 05-04 | XA-000-08-002-002-006-222-10 | 47.3 | 1153.7
09:15:00:febtest:INFO: 12-05 | XA-000-08-002-002-006-039-12 | 18.7 | 1247.9
09:15:00:febtest:INFO: 07-06 | XA-000-08-002-002-006-217-10 | 34.6 | 1195.1
09:15:00:febtest:INFO: 14-07 | XA-000-08-002-002-006-197-13 | 44.1 | 1153.7
09:15:00:febtest:INFO: Init all SMX (CSA): 30
09:15:14:febtest:INFO: Set all CSA to ZERO
09:15:15:febtest:INFO: ['2.450', '2.0320', '1.850', '1.2090', '0.000', '0.0000', '0.000', '0.0000']
09:15:16:ST3_smx:INFO: chip: 1-0 50.430383 C 1124.048640 mV
09:15:16:ST3_smx:INFO: Electrons
09:15:16:ST3_smx:INFO: # loops 0
09:15:17:ST3_smx:INFO: # loops 1
09:15:19:ST3_smx:INFO: # loops 2
09:15:20:ST3_smx:INFO: # loops 3
09:15:22:ST3_smx:INFO: # loops 4
09:15:24:ST3_smx:INFO: Total # of broken channels: 0
09:15:24:ST3_smx:INFO: List of broken channels: []
09:15:24:ST3_smx:INFO: Total # of broken channels: 0
09:15:24:ST3_smx:INFO: List of broken channels: []
09:15:25:ST3_smx:INFO: chip: 8-1 31.389742 C 1183.292940 mV
09:15:25:ST3_smx:INFO: Electrons
09:15:25:ST3_smx:INFO: # loops 0
09:15:27:ST3_smx:INFO: # loops 1
09:15:29:ST3_smx:INFO: # loops 2
09:15:30:ST3_smx:INFO: # loops 3
09:15:32:ST3_smx:INFO: # loops 4
09:15:34:ST3_smx:INFO: Total # of broken channels: 0
09:15:34:ST3_smx:INFO: List of broken channels: []
09:15:34:ST3_smx:INFO: Total # of broken channels: 0
09:15:34:ST3_smx:INFO: List of broken channels: []
09:15:35:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV
09:15:35:ST3_smx:INFO: Electrons
09:15:35:ST3_smx:INFO: # loops 0
09:15:37:ST3_smx:INFO: # loops 1
09:15:39:ST3_smx:INFO: # loops 2
09:15:40:ST3_smx:INFO: # loops 3
09:15:42:ST3_smx:INFO: # loops 4
09:15:43:ST3_smx:INFO: Total # of broken channels: 0
09:15:43:ST3_smx:INFO: List of broken channels: []
09:15:43:ST3_smx:INFO: Total # of broken channels: 1
09:15:43:ST3_smx:INFO: List of broken channels: [29]
09:15:45:ST3_smx:INFO: chip: 10-3 31.389742 C 1177.390875 mV
09:15:45:ST3_smx:INFO: Electrons
09:15:45:ST3_smx:INFO: # loops 0
09:15:47:ST3_smx:INFO: # loops 1
09:15:49:ST3_smx:INFO: # loops 2
09:15:50:ST3_smx:INFO: # loops 3
09:15:52:ST3_smx:INFO: # loops 4
09:15:53:ST3_smx:INFO: Total # of broken channels: 1
09:15:53:ST3_smx:INFO: List of broken channels: [0]
09:15:53:ST3_smx:INFO: Total # of broken channels: 2
09:15:53:ST3_smx:INFO: List of broken channels: [0, 95]
09:15:55:ST3_smx:INFO: chip: 5-4 44.073563 C 1153.732915 mV
09:15:55:ST3_smx:INFO: Electrons
09:15:55:ST3_smx:INFO: # loops 0
09:15:57:ST3_smx:INFO: # loops 1
09:15:58:ST3_smx:INFO: # loops 2
09:16:00:ST3_smx:INFO: # loops 3
09:16:01:ST3_smx:INFO: # loops 4
09:16:03:ST3_smx:INFO: Total # of broken channels: 0
09:16:03:ST3_smx:INFO: List of broken channels: []
09:16:03:ST3_smx:INFO: Total # of broken channels: 0
09:16:03:ST3_smx:INFO: List of broken channels: []
09:16:05:ST3_smx:INFO: chip: 12-5 21.902970 C 1206.851500 mV
09:16:05:ST3_smx:INFO: Electrons
09:16:05:ST3_smx:INFO: # loops 0
09:16:06:ST3_smx:INFO: # loops 1
09:16:08:ST3_smx:INFO: # loops 2
09:16:10:ST3_smx:INFO: # loops 3
09:16:11:ST3_smx:INFO: # loops 4
09:16:13:ST3_smx:INFO: Total # of broken channels: 0
09:16:13:ST3_smx:INFO: List of broken channels: []
09:16:13:ST3_smx:INFO: Total # of broken channels: 0
09:16:13:ST3_smx:INFO: List of broken channels: []
09:16:15:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV
09:16:15:ST3_smx:INFO: Electrons
09:16:15:ST3_smx:INFO: # loops 0
09:16:16:ST3_smx:INFO: # loops 1
09:16:18:ST3_smx:INFO: # loops 2
09:16:19:ST3_smx:INFO: # loops 3
09:16:21:ST3_smx:INFO: # loops 4
09:16:22:ST3_smx:INFO: Total # of broken channels: 0
09:16:22:ST3_smx:INFO: List of broken channels: []
09:16:22:ST3_smx:INFO: Total # of broken channels: 0
09:16:22:ST3_smx:INFO: List of broken channels: []
09:16:24:ST3_smx:INFO: chip: 14-7 37.726682 C 1159.654860 mV
09:16:24:ST3_smx:INFO: Electrons
09:16:24:ST3_smx:INFO: # loops 0
09:16:26:ST3_smx:INFO: # loops 1
09:16:28:ST3_smx:INFO: # loops 2
09:16:29:ST3_smx:INFO: # loops 3
09:16:31:ST3_smx:INFO: # loops 4
09:16:32:ST3_smx:INFO: Total # of broken channels: 0
09:16:32:ST3_smx:INFO: List of broken channels: []
09:16:32:ST3_smx:INFO: Total # of broken channels: 0
09:16:32:ST3_smx:INFO: List of broken channels: []
09:16:33:febtest:INFO: SetCSA :30
09:16:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:16:34:febtest:INFO: 01-00 | XA-000-08-002-002-006-181-01 | 50.4 | 1112.1
09:16:34:febtest:INFO: 08-01 | XA-000-08-002-002-006-200-13 | 31.4 | 1165.6
09:16:34:febtest:INFO: 03-02 | XA-000-08-002-002-006-193-13 | 37.7 | 1159.7
09:16:34:febtest:INFO: 10-03 | XA-000-08-002-002-006-078-07 | 31.4 | 1165.6
09:16:35:febtest:INFO: 05-04 | XA-000-08-002-002-006-222-10 | 44.1 | 1135.9
09:16:35:febtest:INFO: 12-05 | XA-000-08-002-002-006-039-12 | 25.1 | 1195.1
09:16:35:febtest:INFO: 07-06 | XA-000-08-002-002-006-217-10 | 31.4 | 1183.3
09:16:35:febtest:INFO: 14-07 | XA-000-08-002-002-006-197-13 | 40.9 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_05_16-09_14_15
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1152| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID: 25163
MODULE_NAME: L4DL000161 M4DL0T1001611A2 62 A
MODULE_TYPE:
MODULE_LADDER: L4DL000161
MODULE_MODULE: M4DL0T1001611A2
MODULE_SIZE: 62
MODULE_GRADE: A
------------------------------------------------------------
VI_before_Init : ['2.451', '1.5370', '1.849', '2.1620', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0450', '1.850', '2.3220', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0500', '1.850', '2.5810', '0.000', '0.0000', '0.000', '0.0000']