09:47:23:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:23:ST3_Shared:INFO:	                         FEB-Sensor                         
09:47:23:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:25:ST3_ModuleSelector:INFO:	M4DL0B1001611B2
09:47:25:ST3_ModuleSelector:INFO:	10043
09:47:25:febtest:INFO:	Testing FEB with SN 1169
09:47:26:smx_tester:INFO:	Scanning setup
09:47:26:elinks:INFO:	Disabling clock on downlink 0
09:47:26:elinks:INFO:	Disabling clock on downlink 1
09:47:26:elinks:INFO:	Disabling clock on downlink 2
09:47:26:elinks:INFO:	Disabling clock on downlink 3
09:47:27:elinks:INFO:	Disabling clock on downlink 4
09:47:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:47:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:27:elinks:INFO:	Disabling clock on downlink 0
09:47:27:elinks:INFO:	Disabling clock on downlink 1
09:47:27:elinks:INFO:	Disabling clock on downlink 2
09:47:27:elinks:INFO:	Disabling clock on downlink 3
09:47:27:elinks:INFO:	Disabling clock on downlink 4
09:47:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:47:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:47:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:27:elinks:INFO:	Disabling clock on downlink 0
09:47:27:elinks:INFO:	Disabling clock on downlink 1
09:47:27:elinks:INFO:	Disabling clock on downlink 2
09:47:27:elinks:INFO:	Disabling clock on downlink 3
09:47:27:elinks:INFO:	Disabling clock on downlink 4
09:47:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:27:elinks:INFO:	Disabling clock on downlink 0
09:47:27:elinks:INFO:	Disabling clock on downlink 1
09:47:27:elinks:INFO:	Disabling clock on downlink 2
09:47:27:elinks:INFO:	Disabling clock on downlink 3
09:47:27:elinks:INFO:	Disabling clock on downlink 4
09:47:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:47:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:27:elinks:INFO:	Disabling clock on downlink 0
09:47:27:elinks:INFO:	Disabling clock on downlink 1
09:47:27:elinks:INFO:	Disabling clock on downlink 2
09:47:27:elinks:INFO:	Disabling clock on downlink 3
09:47:27:elinks:INFO:	Disabling clock on downlink 4
09:47:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:47:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:27:setup_element:INFO:	Scanning clock phase
09:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:28:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:47:28:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:47:28:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:47:28:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:47:28:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:47:28:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:47:28:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:47:28:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:47:28:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:47:28:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:47:28:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:47:28:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:47:28:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:47:28:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:47:28:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:47:28:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:47:28:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:47:28:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
09:47:28:setup_element:INFO:	Scanning data phases
09:47:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:33:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:47:33:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:47:33:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
09:47:33:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
09:47:33:setup_element:INFO:	Eye window for uplink 3 : ______XXXXXX____________________________
Data delay found: 28
09:47:33:setup_element:INFO:	Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
09:47:33:setup_element:INFO:	Eye window for uplink 5 : XXXX___________________________________X
Data delay found: 21
09:47:33:setup_element:INFO:	Eye window for uplink 6 : XX___________________________________XXX
Data delay found: 19
09:47:33:setup_element:INFO:	Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
09:47:33:setup_element:INFO:	Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
09:47:33:setup_element:INFO:	Eye window for uplink 9 : ____________________________XXXX________
Data delay found: 9
09:47:33:setup_element:INFO:	Eye window for uplink 10: ________________________XXXXXX__________
Data delay found: 6
09:47:33:setup_element:INFO:	Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
09:47:33:setup_element:INFO:	Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
09:47:33:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXX_______
Data delay found: 10
09:47:33:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
09:47:33:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
09:47:33:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:47:33:setup_element:INFO:	Setting the data phase to 30 for uplink 1
09:47:33:setup_element:INFO:	Setting the data phase to 31 for uplink 2
09:47:33:setup_element:INFO:	Setting the data phase to 28 for uplink 3
09:47:33:setup_element:INFO:	Setting the data phase to 25 for uplink 4
09:47:33:setup_element:INFO:	Setting the data phase to 21 for uplink 5
09:47:33:setup_element:INFO:	Setting the data phase to 19 for uplink 6
09:47:33:setup_element:INFO:	Setting the data phase to 15 for uplink 7
09:47:33:setup_element:INFO:	Setting the data phase to 4 for uplink 8
09:47:33:setup_element:INFO:	Setting the data phase to 9 for uplink 9
09:47:33:setup_element:INFO:	Setting the data phase to 6 for uplink 10
09:47:33:setup_element:INFO:	Setting the data phase to 10 for uplink 11
09:47:33:setup_element:INFO:	Setting the data phase to 8 for uplink 12
09:47:33:setup_element:INFO:	Setting the data phase to 10 for uplink 13
09:47:33:setup_element:INFO:	Setting the data phase to 9 for uplink 14
09:47:33:setup_element:INFO:	Setting the data phase to 11 for uplink 15
09:47:33:setup_element:INFO:	Beginning SMX ASICs map scan
09:47:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:47:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:47:33:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:47:33:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:47:33:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:47:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:47:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:47:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:47:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:47:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:47:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:47:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:47:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:47:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:47:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:47:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:47:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:47:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:47:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:47:36:setup_element:INFO:	Performing Elink synchronization
09:47:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:36:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:47:36:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:47:36:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:47:36:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:47:36:ST3_emu_feb:DEBUG:	Chip address:  	0x0
09:47:36:ST3_emu_feb:DEBUG:	Chip address:  	0x1
09:47:36:ST3_emu_feb:DEBUG:	Chip address:  	0x2
09:47:37:ST3_emu_feb:DEBUG:	Chip address:  	0x3
09:47:37:ST3_emu_feb:DEBUG:	Chip address:  	0x4
09:47:37:ST3_emu_feb:DEBUG:	Chip address:  	0x5
09:47:37:ST3_emu_feb:DEBUG:	Chip address:  	0x6
09:47:37:ST3_emu_feb:DEBUG:	Chip address:  	0x7
09:47:37:febtest:INFO:	Init all SMX (CSA): 30
09:47:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:47:51:febtest:INFO:	01-00 | XA-000-08-002-002-006-169-06 |  47.3 | 1141.9
09:47:52:febtest:INFO:	08-01 | XA-000-08-002-002-008-187-08 |  47.3 | 1153.7
09:47:52:febtest:INFO:	03-02 | XA-000-08-002-002-008-162-15 |  44.1 | 1159.7
09:47:52:febtest:INFO:	10-03 | XA-000-08-002-002-006-118-14 |  44.1 | 1153.7
09:47:52:febtest:INFO:	05-04 | XA-000-08-002-002-006-130-08 |  44.1 | 1165.6
09:47:52:febtest:INFO:	12-05 | XA-000-08-002-002-006-124-14 |  44.1 | 1159.7
09:47:53:febtest:INFO:	07-06 | XA-000-08-002-002-008-177-08 |  40.9 | 1171.5
09:47:53:febtest:INFO:	14-07 | XA-000-08-002-002-008-184-08 |  56.8 | 1118.1
09:47:54:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:47:56:ST3_smx:INFO:	chip: 1-0 	 47.250730 C 	 1153.732915 mV
09:47:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:47:56:ST3_smx:INFO:		Electrons
09:47:56:ST3_smx:INFO:	# loops 0
09:47:57:ST3_smx:INFO:	# loops 1
09:47:59:ST3_smx:INFO:	# loops 2
09:48:01:ST3_smx:INFO:	# loops 3
09:48:02:ST3_smx:INFO:	# loops 4
09:48:04:ST3_smx:INFO:	Total # of broken channels: 1
09:48:04:ST3_smx:INFO:	List of broken channels: [91]
09:48:04:ST3_smx:INFO:	Total # of broken channels: 46
09:48:04:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 21, 22, 23, 24, 25, 27, 28, 29, 31, 32, 33, 35, 36, 39, 41, 48, 49, 52, 56, 65, 67, 69, 72, 85, 91, 101]
09:48:06:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1165.571835 mV
09:48:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:06:ST3_smx:INFO:		Electrons
09:48:06:ST3_smx:INFO:	# loops 0
09:48:07:ST3_smx:INFO:	# loops 1
09:48:09:ST3_smx:INFO:	# loops 2
09:48:10:ST3_smx:INFO:	# loops 3
09:48:12:ST3_smx:INFO:	# loops 4
09:48:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:14:ST3_smx:INFO:	Total # of broken channels: 268
09:48:14:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 63, 65, 69, 71, 75, 109, 111, 113, 115, 117, 119, 121]
09:48:14:ST3_smx:INFO:	Total # of broken channels: 256
09:48:14:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
09:48:15:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1171.483840 mV
09:48:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:15:ST3_smx:INFO:		Electrons
09:48:15:ST3_smx:INFO:	# loops 0
09:48:17:ST3_smx:INFO:	# loops 1
09:48:19:ST3_smx:INFO:	# loops 2
09:48:20:ST3_smx:INFO:	# loops 3
09:48:22:ST3_smx:INFO:	# loops 4
09:48:24:ST3_smx:INFO:	Total # of broken channels: 1
09:48:24:ST3_smx:INFO:	List of broken channels: [34]
09:48:24:ST3_smx:INFO:	Total # of broken channels: 61
09:48:24:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120]
09:48:25:ST3_smx:INFO:	chip: 10-3 	 47.250730 C 	 1171.483840 mV
09:48:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:25:ST3_smx:INFO:		Electrons
09:48:25:ST3_smx:INFO:	# loops 0
09:48:27:ST3_smx:INFO:	# loops 1
09:48:29:ST3_smx:INFO:	# loops 2
09:48:30:ST3_smx:INFO:	# loops 3
09:48:32:ST3_smx:INFO:	# loops 4
09:48:33:ST3_smx:INFO:	Total # of broken channels: 0
09:48:33:ST3_smx:INFO:	List of broken channels: []
09:48:33:ST3_smx:INFO:	Total # of broken channels: 50
09:48:33:ST3_smx:INFO:	List of broken channels: [18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116]
09:48:35:ST3_smx:INFO:	chip: 5-4 	 47.250730 C 	 1177.390875 mV
09:48:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:35:ST3_smx:INFO:		Electrons
09:48:35:ST3_smx:INFO:	# loops 0
09:48:37:ST3_smx:INFO:	# loops 1
09:48:38:ST3_smx:INFO:	# loops 2
09:48:40:ST3_smx:INFO:	# loops 3
09:48:42:ST3_smx:INFO:	# loops 4
09:48:43:ST3_smx:INFO:	Total # of broken channels: 0
09:48:43:ST3_smx:INFO:	List of broken channels: []
09:48:43:ST3_smx:INFO:	Total # of broken channels: 54
09:48:43:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106]
09:48:45:ST3_smx:INFO:	chip: 12-5 	 47.250730 C 	 1171.483840 mV
09:48:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:45:ST3_smx:INFO:		Electrons
09:48:45:ST3_smx:INFO:	# loops 0
09:48:47:ST3_smx:INFO:	# loops 1
09:48:48:ST3_smx:INFO:	# loops 2
09:48:50:ST3_smx:INFO:	# loops 3
09:48:51:ST3_smx:INFO:	# loops 4
09:48:53:ST3_smx:INFO:	Total # of broken channels: 0
09:48:53:ST3_smx:INFO:	List of broken channels: []
09:48:53:ST3_smx:INFO:	Total # of broken channels: 62
09:48:53:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122]
09:48:55:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1183.292940 mV
09:48:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:55:ST3_smx:INFO:		Electrons
09:48:55:ST3_smx:INFO:	# loops 0
09:48:56:ST3_smx:INFO:	# loops 1
09:48:58:ST3_smx:INFO:	# loops 2
09:49:00:ST3_smx:INFO:	# loops 3
09:49:01:ST3_smx:INFO:	# loops 4
09:49:03:ST3_smx:INFO:	Total # of broken channels: 44
09:49:03:ST3_smx:INFO:	List of broken channels: [23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 77, 79, 81, 83, 85, 93, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
09:49:03:ST3_smx:INFO:	Total # of broken channels: 50
09:49:03:ST3_smx:INFO:	List of broken channels: [8, 10, 12, 14, 16, 18, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 77, 79, 81, 83, 85, 93, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
09:49:05:ST3_smx:INFO:	chip: 14-7 	 59.984250 C 	 1129.995435 mV
09:49:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:05:ST3_smx:INFO:		Electrons
09:49:05:ST3_smx:INFO:	# loops 0
09:49:06:ST3_smx:INFO:	# loops 1
09:49:08:ST3_smx:INFO:	# loops 2
09:49:09:ST3_smx:INFO:	# loops 3
09:49:11:ST3_smx:INFO:	# loops 4
09:49:13:ST3_smx:INFO:	Total # of broken channels: 0
09:49:13:ST3_smx:INFO:	List of broken channels: []
09:49:13:ST3_smx:INFO:	Total # of broken channels: 57
09:49:13:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 118]
09:49:13:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:49:13:febtest:INFO:	01-00 | XA-000-08-002-002-006-169-06 |  53.6 | 1171.5
09:49:13:febtest:INFO:	08-01 | XA-000-08-002-002-008-187-08 |  50.4 | 1189.2
09:49:14:febtest:INFO:	03-02 | XA-000-08-002-002-008-162-15 |  47.3 | 1195.1
09:49:14:febtest:INFO:	10-03 | XA-000-08-002-002-006-118-14 |  47.3 | 1195.1
09:49:14:febtest:INFO:	05-04 | XA-000-08-002-002-006-130-08 |  50.4 | 1195.1
09:49:14:febtest:INFO:	12-05 | XA-000-08-002-002-006-124-14 |  47.3 | 1189.2
09:49:14:febtest:INFO:	07-06 | XA-000-08-002-002-008-177-08 |  47.3 | 1201.0
09:49:15:febtest:INFO:	14-07 | XA-000-08-002-002-008-184-08 |  63.2 | 1147.8
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_12-09_47_23
OPERATOR  : Kerstin S.; Olga B.; Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1169| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 10043 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M4DL0B1001611B2
LADDER_NAME: L4DL000161
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4900', '1.848', '2.3330', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0040', '1.850', '2.3010', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9910', '1.850', '0.5423', '0.000', '0.0000', '0.000', '0.0000']