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FEB_1175 28.05.24 13:07:01
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13:07:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:07:01:ST3_Shared:INFO: FEB-Microcable
13:07:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:07:01:febtest:INFO: Testing FEB with SN 1175
13:07:02:smx_tester:INFO: Scanning setup
13:07:02:elinks:INFO: Disabling clock on downlink 0
13:07:02:elinks:INFO: Disabling clock on downlink 1
13:07:02:elinks:INFO: Disabling clock on downlink 2
13:07:02:elinks:INFO: Disabling clock on downlink 3
13:07:02:elinks:INFO: Disabling clock on downlink 4
13:07:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:07:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:03:elinks:INFO: Disabling clock on downlink 0
13:07:03:elinks:INFO: Disabling clock on downlink 1
13:07:03:elinks:INFO: Disabling clock on downlink 2
13:07:03:elinks:INFO: Disabling clock on downlink 3
13:07:03:elinks:INFO: Disabling clock on downlink 4
13:07:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:07:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:07:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:03:elinks:INFO: Disabling clock on downlink 0
13:07:03:elinks:INFO: Disabling clock on downlink 1
13:07:03:elinks:INFO: Disabling clock on downlink 2
13:07:03:elinks:INFO: Disabling clock on downlink 3
13:07:03:elinks:INFO: Disabling clock on downlink 4
13:07:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:07:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:03:elinks:INFO: Disabling clock on downlink 0
13:07:03:elinks:INFO: Disabling clock on downlink 1
13:07:03:elinks:INFO: Disabling clock on downlink 2
13:07:03:elinks:INFO: Disabling clock on downlink 3
13:07:03:elinks:INFO: Disabling clock on downlink 4
13:07:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:07:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:03:elinks:INFO: Disabling clock on downlink 0
13:07:03:elinks:INFO: Disabling clock on downlink 1
13:07:03:elinks:INFO: Disabling clock on downlink 2
13:07:03:elinks:INFO: Disabling clock on downlink 3
13:07:03:elinks:INFO: Disabling clock on downlink 4
13:07:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:07:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:03:setup_element:INFO: Scanning clock phase
13:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:04:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:07:04:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:07:04:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:07:04:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:07:04:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:07:04:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:07:04:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:07:04:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:07:04:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:07:04:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:07:04:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:07:04:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:07:04:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:07:04:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:07:04:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:07:04:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
13:07:04:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
13:07:04:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
13:07:04:setup_element:INFO: Scanning data phases
13:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:10:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:07:10:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
13:07:10:setup_element:INFO: Eye window for uplink 1 : __________XXXX__________________________
Data delay found: 31
13:07:10:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
13:07:10:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
13:07:10:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
13:07:10:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
13:07:10:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
13:07:10:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX
Data delay found: 17
13:07:10:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
13:07:10:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXX_______
Data delay found: 10
13:07:10:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
13:07:10:setup_element:INFO: Eye window for uplink 11: ______________________________XXXX______
Data delay found: 11
13:07:10:setup_element:INFO: Eye window for uplink 12: _______________________________XXXX_____
Data delay found: 12
13:07:10:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__
Data delay found: 15
13:07:10:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
13:07:10:setup_element:INFO: Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
13:07:10:setup_element:INFO: Setting the data phase to 36 for uplink 0
13:07:10:setup_element:INFO: Setting the data phase to 31 for uplink 1
13:07:10:setup_element:INFO: Setting the data phase to 28 for uplink 2
13:07:10:setup_element:INFO: Setting the data phase to 26 for uplink 3
13:07:10:setup_element:INFO: Setting the data phase to 27 for uplink 4
13:07:10:setup_element:INFO: Setting the data phase to 23 for uplink 5
13:07:10:setup_element:INFO: Setting the data phase to 21 for uplink 6
13:07:10:setup_element:INFO: Setting the data phase to 17 for uplink 7
13:07:10:setup_element:INFO: Setting the data phase to 6 for uplink 8
13:07:10:setup_element:INFO: Setting the data phase to 10 for uplink 9
13:07:10:setup_element:INFO: Setting the data phase to 7 for uplink 10
13:07:10:setup_element:INFO: Setting the data phase to 11 for uplink 11
13:07:10:setup_element:INFO: Setting the data phase to 12 for uplink 12
13:07:10:setup_element:INFO: Setting the data phase to 15 for uplink 13
13:07:10:setup_element:INFO: Setting the data phase to 9 for uplink 14
13:07:10:setup_element:INFO: Setting the data phase to 11 for uplink 15
13:07:10:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ________________________________________________________________________________
Uplink 15: ________________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 12:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
]
13:07:10:setup_element:INFO: Beginning SMX ASICs map scan
13:07:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:07:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:07:10:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:07:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:07:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:07:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:07:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:07:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:07:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:07:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:07:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:07:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:07:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:07:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:07:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:07:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:07:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:07:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:07:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:07:12:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ________________________________________________________________________________
Uplink 15: ________________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 12:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
13:07:12:setup_element:INFO: Performing Elink synchronization
13:07:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:07:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:07:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:07:13:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:07:13:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
13:07:13:febtest:INFO: Init all SMX (CSA): 30
13:07:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:07:27:febtest:INFO: 01-00 | XA-000-08-002-001-006-020-04 | 40.9 | 1135.9
13:07:27:febtest:INFO: 08-01 | XA-000-08-002-000-007-188-05 | 34.6 | 1147.8
13:07:27:febtest:INFO: 03-02 | XA-000-08-002-000-007-214-14 | 37.7 | 1147.8
13:07:28:febtest:INFO: 10-03 | XA-000-08-002-000-007-173-02 | 34.6 | 1159.7
13:07:28:febtest:INFO: 05-04 | XA-000-08-002-000-007-211-14 | 47.3 | 1130.0
13:07:28:febtest:INFO: 12-05 | XA-000-08-002-001-006-009-03 | 44.1 | 1135.9
13:07:28:febtest:INFO: 07-06 | XA-000-08-002-000-007-195-09 | 47.3 | 1130.0
13:07:29:febtest:INFO: 14-07 | XA-000-08-002-000-007-203-09 | 37.7 | 1159.7
13:07:30:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:07:32:ST3_smx:INFO: chip: 1-0 40.898880 C 1147.806000 mV
13:07:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:32:ST3_smx:INFO: Electrons
13:07:32:ST3_smx:INFO: # loops 0
13:07:33:ST3_smx:INFO: # loops 1
13:07:35:ST3_smx:INFO: # loops 2
13:07:37:ST3_smx:INFO: Total # of broken channels: 0
13:07:37:ST3_smx:INFO: List of broken channels: []
13:07:37:ST3_smx:INFO: Total # of broken channels: 0
13:07:37:ST3_smx:INFO: List of broken channels: []
13:07:38:ST3_smx:INFO: chip: 8-1 34.556970 C 1159.654860 mV
13:07:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:38:ST3_smx:INFO: Electrons
13:07:38:ST3_smx:INFO: # loops 0
13:07:40:ST3_smx:INFO: # loops 1
13:07:42:ST3_smx:INFO: # loops 2
13:07:43:ST3_smx:INFO: Total # of broken channels: 0
13:07:43:ST3_smx:INFO: List of broken channels: []
13:07:43:ST3_smx:INFO: Total # of broken channels: 0
13:07:43:ST3_smx:INFO: List of broken channels: []
13:07:45:ST3_smx:INFO: chip: 3-2 37.726682 C 1159.654860 mV
13:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:45:ST3_smx:INFO: Electrons
13:07:45:ST3_smx:INFO: # loops 0
13:07:47:ST3_smx:INFO: # loops 1
13:07:48:ST3_smx:INFO: # loops 2
13:07:50:ST3_smx:INFO: Total # of broken channels: 0
13:07:50:ST3_smx:INFO: List of broken channels: []
13:07:50:ST3_smx:INFO: Total # of broken channels: 0
13:07:50:ST3_smx:INFO: List of broken channels: []
13:07:51:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
13:07:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:51:ST3_smx:INFO: Electrons
13:07:51:ST3_smx:INFO: # loops 0
13:07:53:ST3_smx:INFO: # loops 1
13:07:55:ST3_smx:INFO: # loops 2
13:07:56:ST3_smx:INFO: Total # of broken channels: 0
13:07:56:ST3_smx:INFO: List of broken channels: []
13:07:56:ST3_smx:INFO: Total # of broken channels: 0
13:07:56:ST3_smx:INFO: List of broken channels: []
13:07:58:ST3_smx:INFO: chip: 5-4 47.250730 C 1141.874115 mV
13:07:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:58:ST3_smx:INFO: Electrons
13:07:58:ST3_smx:INFO: # loops 0
13:08:00:ST3_smx:INFO: # loops 1
13:08:01:ST3_smx:INFO: # loops 2
13:08:02:ST3_smx:INFO: Total # of broken channels: 0
13:08:02:ST3_smx:INFO: List of broken channels: []
13:08:02:ST3_smx:INFO: Total # of broken channels: 0
13:08:02:ST3_smx:INFO: List of broken channels: []
13:08:04:ST3_smx:INFO: chip: 12-5 44.073563 C 1147.806000 mV
13:08:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:04:ST3_smx:INFO: Electrons
13:08:04:ST3_smx:INFO: # loops 0
13:08:06:ST3_smx:INFO: # loops 1
13:08:08:ST3_smx:INFO: # loops 2
13:08:09:ST3_smx:INFO: Total # of broken channels: 0
13:08:09:ST3_smx:INFO: List of broken channels: []
13:08:09:ST3_smx:INFO: Total # of broken channels: 0
13:08:09:ST3_smx:INFO: List of broken channels: []
13:08:11:ST3_smx:INFO: chip: 7-6 50.430383 C 1135.937260 mV
13:08:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:11:ST3_smx:INFO: Electrons
13:08:11:ST3_smx:INFO: # loops 0
13:08:13:ST3_smx:INFO: # loops 1
13:08:14:ST3_smx:INFO: # loops 2
13:08:16:ST3_smx:INFO: Total # of broken channels: 0
13:08:16:ST3_smx:INFO: List of broken channels: []
13:08:16:ST3_smx:INFO: Total # of broken channels: 0
13:08:16:ST3_smx:INFO: List of broken channels: []
13:08:17:ST3_smx:INFO: chip: 14-7 40.898880 C 1171.483840 mV
13:08:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:17:ST3_smx:INFO: Electrons
13:08:17:ST3_smx:INFO: # loops 0
13:08:19:ST3_smx:INFO: # loops 1
13:08:20:ST3_smx:INFO: # loops 2
13:08:22:ST3_smx:INFO: Total # of broken channels: 0
13:08:22:ST3_smx:INFO: List of broken channels: []
13:08:22:ST3_smx:INFO: Total # of broken channels: 0
13:08:22:ST3_smx:INFO: List of broken channels: []
13:08:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:08:22:febtest:INFO: 01-00 | XA-000-08-002-001-006-020-04 | 40.9 | 1165.6
13:08:23:febtest:INFO: 08-01 | XA-000-08-002-000-007-188-05 | 37.7 | 1183.3
13:08:23:febtest:INFO: 03-02 | XA-000-08-002-000-007-214-14 | 40.9 | 1183.3
13:08:23:febtest:INFO: 10-03 | XA-000-08-002-000-007-173-02 | 34.6 | 1195.1
13:08:23:febtest:INFO: 05-04 | XA-000-08-002-000-007-211-14 | 50.4 | 1159.7
13:08:24:febtest:INFO: 12-05 | XA-000-08-002-001-006-009-03 | 47.3 | 1165.6
13:08:24:febtest:INFO: 07-06 | XA-000-08-002-000-007-195-09 | 50.4 | 1159.7
13:08:24:febtest:INFO: 14-07 | XA-000-08-002-000-007-203-09 | 44.1 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_28-13_07_01
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1175| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6200', '1.849', '2.2820', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0000', '1.850', '2.5030', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9800', '1.850', '0.5310', '0.000', '0.0000', '0.000', '0.0000']