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FEB_1178 07.06.24 13:27:32
Info
13:27:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:27:32:ST3_Shared:INFO: FEB-Microcable
13:27:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:27:32:febtest:INFO: Testing FEB with SN 1178
13:27:34:smx_tester:INFO: Scanning setup
13:27:34:elinks:INFO: Disabling clock on downlink 0
13:27:34:elinks:INFO: Disabling clock on downlink 1
13:27:34:elinks:INFO: Disabling clock on downlink 2
13:27:34:elinks:INFO: Disabling clock on downlink 3
13:27:34:elinks:INFO: Disabling clock on downlink 4
13:27:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:27:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:34:elinks:INFO: Disabling clock on downlink 0
13:27:34:elinks:INFO: Disabling clock on downlink 1
13:27:34:elinks:INFO: Disabling clock on downlink 2
13:27:34:elinks:INFO: Disabling clock on downlink 3
13:27:34:elinks:INFO: Disabling clock on downlink 4
13:27:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:27:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:27:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:34:elinks:INFO: Disabling clock on downlink 0
13:27:34:elinks:INFO: Disabling clock on downlink 1
13:27:34:elinks:INFO: Disabling clock on downlink 2
13:27:34:elinks:INFO: Disabling clock on downlink 3
13:27:34:elinks:INFO: Disabling clock on downlink 4
13:27:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:27:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:35:elinks:INFO: Disabling clock on downlink 0
13:27:35:elinks:INFO: Disabling clock on downlink 1
13:27:35:elinks:INFO: Disabling clock on downlink 2
13:27:35:elinks:INFO: Disabling clock on downlink 3
13:27:35:elinks:INFO: Disabling clock on downlink 4
13:27:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:27:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:35:elinks:INFO: Disabling clock on downlink 0
13:27:35:elinks:INFO: Disabling clock on downlink 1
13:27:35:elinks:INFO: Disabling clock on downlink 2
13:27:35:elinks:INFO: Disabling clock on downlink 3
13:27:35:elinks:INFO: Disabling clock on downlink 4
13:27:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:27:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:27:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:27:35:setup_element:INFO: Scanning clock phase
13:27:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:27:35:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:27:35:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:27:35:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:27:35:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:27:35:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:27:35:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:27:35:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:27:35:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:27:35:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:27:35:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
13:27:35:setup_element:INFO: Scanning data phases
13:27:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:41:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:27:41:setup_element:INFO: Eye window for uplink 0 : ______________XXXX______________________
Data delay found: 35
13:27:41:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
13:27:41:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
13:27:41:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________
Data delay found: 29
13:27:41:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
13:27:41:setup_element:INFO: Eye window for uplink 5 : ___XXXX_________________________________
Data delay found: 24
13:27:41:setup_element:INFO: Eye window for uplink 6 : __XXXX__________________________________
Data delay found: 23
13:27:41:setup_element:INFO: Eye window for uplink 7 : XXX__________________________________XXX
Data delay found: 19
13:27:41:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
13:27:41:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
13:27:41:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
13:27:41:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
13:27:41:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
13:27:41:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXX_____
Data delay found: 11
13:27:41:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
13:27:41:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
13:27:41:setup_element:INFO: Setting the data phase to 35 for uplink 0
13:27:41:setup_element:INFO: Setting the data phase to 31 for uplink 1
13:27:41:setup_element:INFO: Setting the data phase to 32 for uplink 2
13:27:41:setup_element:INFO: Setting the data phase to 29 for uplink 3
13:27:41:setup_element:INFO: Setting the data phase to 28 for uplink 4
13:27:41:setup_element:INFO: Setting the data phase to 24 for uplink 5
13:27:41:setup_element:INFO: Setting the data phase to 23 for uplink 6
13:27:41:setup_element:INFO: Setting the data phase to 19 for uplink 7
13:27:41:setup_element:INFO: Setting the data phase to 8 for uplink 8
13:27:41:setup_element:INFO: Setting the data phase to 13 for uplink 9
13:27:41:setup_element:INFO: Setting the data phase to 9 for uplink 10
13:27:41:setup_element:INFO: Setting the data phase to 13 for uplink 11
13:27:41:setup_element:INFO: Setting the data phase to 9 for uplink 12
13:27:41:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:27:41:setup_element:INFO: Setting the data phase to 11 for uplink 14
13:27:41:setup_element:INFO: Setting the data phase to 13 for uplink 15
13:27:41:setup_element:INFO: Beginning SMX ASICs map scan
13:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:27:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:27:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:27:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:27:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:27:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:27:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:27:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:27:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:27:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:27:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:27:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:27:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:27:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:27:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:27:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:27:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:27:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:27:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:27:43:setup_element:INFO: Performing Elink synchronization
13:27:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:27:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:27:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:27:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:27:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:27:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:27:44:febtest:INFO: Init all SMX (CSA): 30
13:27:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:27:59:febtest:INFO: 01-00 | XA-000-08-002-000-008-171-06 | 40.9 | 1141.9
13:27:59:febtest:INFO: 08-01 | XA-000-08-002-000-008-114-14 | 40.9 | 1135.9
13:27:59:febtest:INFO: 03-02 | XA-000-08-002-000-008-152-15 | 40.9 | 1141.9
13:28:00:febtest:INFO: 10-03 | XA-000-08-002-000-008-072-07 | 28.2 | 1183.3
13:28:00:febtest:INFO: 05-04 | XA-000-08-002-000-008-107-09 | 40.9 | 1153.7
13:28:00:febtest:INFO: 12-05 | XA-000-08-002-000-007-219-14 | 50.4 | 1118.1
13:28:00:febtest:INFO: 07-06 | XA-000-08-002-000-008-116-14 | 44.1 | 1141.9
13:28:00:febtest:INFO: 14-07 | XA-000-08-002-002-008-088-09 | 31.4 | 1171.5
13:28:01:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:28:03:ST3_smx:INFO: chip: 1-0 40.898880 C 1159.654860 mV
13:28:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:03:ST3_smx:INFO: Electrons
13:28:03:ST3_smx:INFO: # loops 0
13:28:05:ST3_smx:INFO: # loops 1
13:28:07:ST3_smx:INFO: # loops 2
13:28:08:ST3_smx:INFO: Total # of broken channels: 0
13:28:08:ST3_smx:INFO: List of broken channels: []
13:28:08:ST3_smx:INFO: Total # of broken channels: 0
13:28:08:ST3_smx:INFO: List of broken channels: []
13:28:10:ST3_smx:INFO: chip: 8-1 40.898880 C 1153.732915 mV
13:28:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:10:ST3_smx:INFO: Electrons
13:28:10:ST3_smx:INFO: # loops 0
13:28:12:ST3_smx:INFO: # loops 1
13:28:13:ST3_smx:INFO: # loops 2
13:28:15:ST3_smx:INFO: Total # of broken channels: 0
13:28:15:ST3_smx:INFO: List of broken channels: []
13:28:15:ST3_smx:INFO: Total # of broken channels: 0
13:28:15:ST3_smx:INFO: List of broken channels: []
13:28:17:ST3_smx:INFO: chip: 3-2 44.073563 C 1159.654860 mV
13:28:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:17:ST3_smx:INFO: Electrons
13:28:17:ST3_smx:INFO: # loops 0
13:28:18:ST3_smx:INFO: # loops 1
13:28:20:ST3_smx:INFO: # loops 2
13:28:22:ST3_smx:INFO: Total # of broken channels: 0
13:28:22:ST3_smx:INFO: List of broken channels: []
13:28:22:ST3_smx:INFO: Total # of broken channels: 0
13:28:22:ST3_smx:INFO: List of broken channels: []
13:28:24:ST3_smx:INFO: chip: 10-3 28.225000 C 1195.082160 mV
13:28:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:24:ST3_smx:INFO: Electrons
13:28:24:ST3_smx:INFO: # loops 0
13:28:25:ST3_smx:INFO: # loops 1
13:28:27:ST3_smx:INFO: # loops 2
13:28:29:ST3_smx:INFO: Total # of broken channels: 0
13:28:29:ST3_smx:INFO: List of broken channels: []
13:28:29:ST3_smx:INFO: Total # of broken channels: 0
13:28:29:ST3_smx:INFO: List of broken channels: []
13:28:30:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
13:28:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:30:ST3_smx:INFO: Electrons
13:28:30:ST3_smx:INFO: # loops 0
13:28:32:ST3_smx:INFO: # loops 1
13:28:34:ST3_smx:INFO: # loops 2
13:28:35:ST3_smx:INFO: Total # of broken channels: 0
13:28:35:ST3_smx:INFO: List of broken channels: []
13:28:35:ST3_smx:INFO: Total # of broken channels: 0
13:28:35:ST3_smx:INFO: List of broken channels: []
13:28:37:ST3_smx:INFO: chip: 12-5 50.430383 C 1129.995435 mV
13:28:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:37:ST3_smx:INFO: Electrons
13:28:37:ST3_smx:INFO: # loops 0
13:28:39:ST3_smx:INFO: # loops 1
13:28:40:ST3_smx:INFO: # loops 2
13:28:42:ST3_smx:INFO: Total # of broken channels: 0
13:28:42:ST3_smx:INFO: List of broken channels: []
13:28:42:ST3_smx:INFO: Total # of broken channels: 0
13:28:42:ST3_smx:INFO: List of broken channels: []
13:28:44:ST3_smx:INFO: chip: 7-6 44.073563 C 1153.732915 mV
13:28:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:44:ST3_smx:INFO: Electrons
13:28:44:ST3_smx:INFO: # loops 0
13:28:45:ST3_smx:INFO: # loops 1
13:28:47:ST3_smx:INFO: # loops 2
13:28:49:ST3_smx:INFO: Total # of broken channels: 0
13:28:49:ST3_smx:INFO: List of broken channels: []
13:28:49:ST3_smx:INFO: Total # of broken channels: 0
13:28:49:ST3_smx:INFO: List of broken channels: []
13:28:50:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
13:28:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:28:50:ST3_smx:INFO: Electrons
13:28:50:ST3_smx:INFO: # loops 0
13:28:52:ST3_smx:INFO: # loops 1
13:28:54:ST3_smx:INFO: # loops 2
13:28:55:ST3_smx:INFO: Total # of broken channels: 0
13:28:55:ST3_smx:INFO: List of broken channels: []
13:28:55:ST3_smx:INFO: Total # of broken channels: 0
13:28:55:ST3_smx:INFO: List of broken channels: []
13:28:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:28:56:febtest:INFO: 01-00 | XA-000-08-002-000-008-171-06 | 40.9 | 1177.4
13:28:56:febtest:INFO: 08-01 | XA-000-08-002-000-008-114-14 | 40.9 | 1171.5
13:28:56:febtest:INFO: 03-02 | XA-000-08-002-000-008-152-15 | 44.1 | 1177.4
13:28:56:febtest:INFO: 10-03 | XA-000-08-002-000-008-072-07 | 28.2 | 1218.6
13:28:57:febtest:INFO: 05-04 | XA-000-08-002-000-008-107-09 | 40.9 | 1189.2
13:28:57:febtest:INFO: 12-05 | XA-000-08-002-000-007-219-14 | 50.4 | 1147.8
13:28:57:febtest:INFO: 07-06 | XA-000-08-002-000-008-116-14 | 44.1 | 1177.4
13:28:57:febtest:INFO: 14-07 | XA-000-08-002-002-008-088-09 | 31.4 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_07-13_27_32
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1178| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9290', '1.850', '2.4350', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0160', '1.850', '2.3780', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9980', '1.850', '0.5232', '0.000', '0.0000', '0.000', '0.0000']