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FEB_1179 04.06.24 14:10:35
Info
14:10:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:10:35:ST3_Shared:INFO: FEB-Microcable
14:10:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:10:35:febtest:INFO: Testing FEB with SN 1179
14:10:37:smx_tester:INFO: Scanning setup
14:10:37:elinks:INFO: Disabling clock on downlink 0
14:10:37:elinks:INFO: Disabling clock on downlink 1
14:10:37:elinks:INFO: Disabling clock on downlink 2
14:10:37:elinks:INFO: Disabling clock on downlink 3
14:10:37:elinks:INFO: Disabling clock on downlink 4
14:10:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:10:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:37:elinks:INFO: Disabling clock on downlink 0
14:10:37:elinks:INFO: Disabling clock on downlink 1
14:10:37:elinks:INFO: Disabling clock on downlink 2
14:10:37:elinks:INFO: Disabling clock on downlink 3
14:10:37:elinks:INFO: Disabling clock on downlink 4
14:10:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:10:37:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:10:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:37:elinks:INFO: Disabling clock on downlink 0
14:10:37:elinks:INFO: Disabling clock on downlink 1
14:10:37:elinks:INFO: Disabling clock on downlink 2
14:10:37:elinks:INFO: Disabling clock on downlink 3
14:10:37:elinks:INFO: Disabling clock on downlink 4
14:10:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:10:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:37:elinks:INFO: Disabling clock on downlink 0
14:10:37:elinks:INFO: Disabling clock on downlink 1
14:10:37:elinks:INFO: Disabling clock on downlink 2
14:10:37:elinks:INFO: Disabling clock on downlink 3
14:10:37:elinks:INFO: Disabling clock on downlink 4
14:10:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:10:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:37:elinks:INFO: Disabling clock on downlink 0
14:10:37:elinks:INFO: Disabling clock on downlink 1
14:10:37:elinks:INFO: Disabling clock on downlink 2
14:10:37:elinks:INFO: Disabling clock on downlink 3
14:10:37:elinks:INFO: Disabling clock on downlink 4
14:10:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:10:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:38:setup_element:INFO: Scanning clock phase
14:10:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:10:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:10:38:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:10:38:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________________XXXX
Clock Delay: 37
14:10:38:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________________XXXX
Clock Delay: 37
14:10:38:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:10:38:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:10:38:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:10:38:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:10:38:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:10:38:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:10:38:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
14:10:38:setup_element:INFO: Scanning data phases
14:10:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:10:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:10:43:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:10:43:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
14:10:43:setup_element:INFO: Eye window for uplink 9 : X_________________________________XXXXXX
Data delay found: 17
14:10:43:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXX____
Data delay found: 13
14:10:43:setup_element:INFO: Eye window for uplink 11: ___________________________________XXXX_
Data delay found: 16
14:10:43:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
14:10:43:setup_element:INFO: Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
14:10:43:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
14:10:43:setup_element:INFO: Eye window for uplink 15: X________________________________XXXXX__
Data delay found: 16
14:10:43:setup_element:INFO: Setting the data phase to 12 for uplink 8
14:10:43:setup_element:INFO: Setting the data phase to 17 for uplink 9
14:10:43:setup_element:INFO: Setting the data phase to 13 for uplink 10
14:10:43:setup_element:INFO: Setting the data phase to 16 for uplink 11
14:10:43:setup_element:INFO: Setting the data phase to 15 for uplink 12
14:10:43:setup_element:INFO: Setting the data phase to 18 for uplink 13
14:10:43:setup_element:INFO: Setting the data phase to 13 for uplink 14
14:10:43:setup_element:INFO: Setting the data phase to 16 for uplink 15
14:10:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 8: ____________________________________________________________________________XXXX
Uplink 9: ____________________________________________________________________________XXXX
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 8:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 9:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 10:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 11:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 12:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 13:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 14:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 15:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXX__
]
14:10:43:setup_element:INFO: Beginning SMX ASICs map scan
14:10:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:10:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:10:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:10:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:10:43:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
14:10:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:10:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:10:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:10:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:10:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:10:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:10:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:10:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:10:46:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 8: ____________________________________________________________________________XXXX
Uplink 9: ____________________________________________________________________________XXXX
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 8:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 9:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 10:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 11:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 12:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 13:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 14:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 15:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXX__
14:10:46:setup_element:INFO: Performing Elink synchronization
14:10:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:10:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:10:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:10:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:10:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:10:46:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
14:10:46:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
14:10:46:febtest:INFO: Init all SMX (CSA): 30
14:10:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:10:54:febtest:INFO: 08-01 | XA-000-08-002-000-008-195-13 | 34.6 | 1159.7
14:10:54:febtest:INFO: 10-03 | XA-000-08-002-000-008-142-08 | 34.6 | 1159.7
14:10:55:febtest:INFO: 12-05 | XA-000-08-002-000-008-207-13 | 40.9 | 1135.9
14:10:55:febtest:INFO: 14-07 | XA-000-08-002-000-008-209-10 | 37.7 | 1153.7
14:10:56:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:10:58:ST3_smx:INFO: chip: 8-1 34.556970 C 1165.571835 mV
14:10:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:10:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:10:58:ST3_smx:INFO: Electrons
14:10:58:ST3_smx:INFO: # loops 0
14:10:59:ST3_smx:INFO: # loops 1
14:11:01:ST3_smx:INFO: # loops 2
14:11:03:ST3_smx:INFO: Total # of broken channels: 0
14:11:03:ST3_smx:INFO: List of broken channels: []
14:11:03:ST3_smx:INFO: Total # of broken channels: 0
14:11:03:ST3_smx:INFO: List of broken channels: []
14:11:04:ST3_smx:INFO: chip: 10-3 34.556970 C 1165.571835 mV
14:11:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:04:ST3_smx:INFO: Electrons
14:11:04:ST3_smx:INFO: # loops 0
14:11:06:ST3_smx:INFO: # loops 1
14:11:08:ST3_smx:INFO: # loops 2
14:11:09:ST3_smx:INFO: Total # of broken channels: 0
14:11:09:ST3_smx:INFO: List of broken channels: []
14:11:09:ST3_smx:INFO: Total # of broken channels: 0
14:11:09:ST3_smx:INFO: List of broken channels: []
14:11:11:ST3_smx:INFO: chip: 12-5 40.898880 C 1147.806000 mV
14:11:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:11:ST3_smx:INFO: Electrons
14:11:11:ST3_smx:INFO: # loops 0
14:11:13:ST3_smx:INFO: # loops 1
14:11:14:ST3_smx:INFO: # loops 2
14:11:16:ST3_smx:INFO: Total # of broken channels: 0
14:11:16:ST3_smx:INFO: List of broken channels: []
14:11:16:ST3_smx:INFO: Total # of broken channels: 0
14:11:16:ST3_smx:INFO: List of broken channels: []
14:11:18:ST3_smx:INFO: chip: 14-7 37.726682 C 1165.571835 mV
14:11:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:11:18:ST3_smx:INFO: Electrons
14:11:18:ST3_smx:INFO: # loops 0
14:11:19:ST3_smx:INFO: # loops 1
14:11:21:ST3_smx:INFO: # loops 2
14:11:23:ST3_smx:INFO: Total # of broken channels: 0
14:11:23:ST3_smx:INFO: List of broken channels: []
14:11:23:ST3_smx:INFO: Total # of broken channels: 0
14:11:23:ST3_smx:INFO: List of broken channels: []
14:11:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:11:23:febtest:INFO: 08-01 | XA-000-08-002-000-008-195-13 | 34.6 | 1189.2
14:11:23:febtest:INFO: 10-03 | XA-000-08-002-000-008-142-08 | 34.6 | 1189.2
14:11:24:febtest:INFO: 12-05 | XA-000-08-002-000-008-207-13 | 40.9 | 1165.6
14:11:24:febtest:INFO: 14-07 | XA-000-08-002-000-008-209-10 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_04-14_10_35
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1179| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7872', '1.850', '1.3700', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0370', '1.850', '1.0480', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.0110', '1.850', '0.2685', '0.000', '0.0000', '0.000', '0.0000']