FEB_1182 12.06.24 10:39:15
Info
10:39:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:15:ST3_Shared:INFO: FEB-ASIC
10:39:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:15:febtest:INFO: Testing FEB with SN 1182
10:39:17:smx_tester:INFO: Scanning setup
10:39:17:elinks:INFO: Disabling clock on downlink 0
10:39:17:elinks:INFO: Disabling clock on downlink 1
10:39:17:elinks:INFO: Disabling clock on downlink 2
10:39:17:elinks:INFO: Disabling clock on downlink 3
10:39:17:elinks:INFO: Disabling clock on downlink 4
10:39:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:39:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:17:elinks:INFO: Disabling clock on downlink 0
10:39:17:elinks:INFO: Disabling clock on downlink 1
10:39:17:elinks:INFO: Disabling clock on downlink 2
10:39:17:elinks:INFO: Disabling clock on downlink 3
10:39:17:elinks:INFO: Disabling clock on downlink 4
10:39:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:39:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:39:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:17:elinks:INFO: Disabling clock on downlink 0
10:39:17:elinks:INFO: Disabling clock on downlink 1
10:39:17:elinks:INFO: Disabling clock on downlink 2
10:39:17:elinks:INFO: Disabling clock on downlink 3
10:39:17:elinks:INFO: Disabling clock on downlink 4
10:39:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:39:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:17:elinks:INFO: Disabling clock on downlink 0
10:39:17:elinks:INFO: Disabling clock on downlink 1
10:39:17:elinks:INFO: Disabling clock on downlink 2
10:39:17:elinks:INFO: Disabling clock on downlink 3
10:39:17:elinks:INFO: Disabling clock on downlink 4
10:39:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:39:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:17:elinks:INFO: Disabling clock on downlink 0
10:39:17:elinks:INFO: Disabling clock on downlink 1
10:39:17:elinks:INFO: Disabling clock on downlink 2
10:39:17:elinks:INFO: Disabling clock on downlink 3
10:39:17:elinks:INFO: Disabling clock on downlink 4
10:39:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:39:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:39:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:39:18:setup_element:INFO: Scanning clock phase
10:39:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:39:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:39:18:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:39:18:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:39:18:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:18:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:18:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:18:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:39:18:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:39:18:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:39:18:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:39:18:setup_element:INFO: Scanning data phases
10:39:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:39:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:24:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:39:24:setup_element:INFO: Eye window for uplink 0 : ___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_______
Data delay found: 37
10:39:24:setup_element:INFO: Eye window for uplink 1 : ___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_______
Data delay found: 37
10:39:24:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
10:39:24:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
10:39:24:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
10:39:24:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX
Data delay found: 17
10:39:24:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
10:39:24:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:39:24:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
10:39:24:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
10:39:24:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
10:39:24:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
10:39:24:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
10:39:24:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
10:39:24:setup_element:INFO: Setting the data phase to 37 for uplink 0
10:39:24:setup_element:INFO: Setting the data phase to 37 for uplink 1
10:39:24:setup_element:INFO: Setting the data phase to 29 for uplink 2
10:39:24:setup_element:INFO: Setting the data phase to 26 for uplink 3
10:39:24:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:39:24:setup_element:INFO: Setting the data phase to 17 for uplink 7
10:39:24:setup_element:INFO: Setting the data phase to 5 for uplink 8
10:39:24:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:39:24:setup_element:INFO: Setting the data phase to 8 for uplink 10
10:39:24:setup_element:INFO: Setting the data phase to 12 for uplink 11
10:39:24:setup_element:INFO: Setting the data phase to 9 for uplink 12
10:39:24:setup_element:INFO: Setting the data phase to 12 for uplink 13
10:39:24:setup_element:INFO: Setting the data phase to 10 for uplink 14
10:39:24:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:39:24:setup_element:INFO: Beginning SMX ASICs map scan
10:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:39:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:39:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:39:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:39:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:39:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:39:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:39:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:39:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:39:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:39:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:39:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:39:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:39:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:39:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:39:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:39:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:39:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:39:27:setup_element:INFO: Performing Elink synchronization
10:39:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:39:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:39:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:39:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:39:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:39:27:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:39:27:febtest:INFO: Init all SMX (CSA): 30
10:39:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:39:40:febtest:INFO: 01-00 | XA-000-08-002-000-007-218-14 | 47.3 | 1118.1
10:39:40:febtest:INFO: 08-01 | XA-000-08-002-002-008-030-12 | 50.4 | 1112.1
10:39:40:febtest:INFO: 03-02 | XA-000-08-002-000-007-220-14 | 47.3 | 1130.0
10:39:40:febtest:INFO: 10-03 | XA-000-08-002-000-008-010-02 | 44.1 | 1130.0
10:39:41:febtest:INFO: 12-05 | XA-000-08-002-000-008-011-02 | 53.6 | 1100.2
10:39:41:febtest:INFO: 07-06 | XA-000-08-002-000-008-000-02 | 40.9 | 1153.7
10:39:41:febtest:INFO: 14-07 | XA-000-08-002-000-008-013-02 | 50.4 | 1100.2
10:39:42:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:39:43:febtest:ERROR: HW addres 5 != 4
10:39:52:ST3_smx:INFO: chip: 1-0 47.250730 C 1129.995435 mV
10:39:52:ST3_smx:INFO: Electrons
10:39:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:39:55:ST3_smx:INFO: ----> Checking Analog response
10:39:55:ST3_smx:INFO: ----> Checking broken channels
10:39:55:ST3_smx:INFO: Total # broken ch: 1
10:39:55:ST3_smx:INFO: List FAST: [81]
10:39:55:ST3_smx:INFO: List SLOW: []
10:39:55:ST3_smx:INFO: Holes
10:39:55:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:39:57:ST3_smx:INFO: ----> Checking Analog response
10:39:57:ST3_smx:INFO: ----> Checking broken channels
10:39:58:ST3_smx:INFO: Total # broken ch: 1
10:39:58:ST3_smx:INFO: List FAST: [81]
10:39:58:ST3_smx:INFO: List SLOW: []
10:39:59:ST3_smx:INFO: chip: 8-1 47.250730 C 1118.096875 mV
10:39:59:ST3_smx:INFO: Electrons
10:39:59:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:01:ST3_smx:INFO: ----> Checking Analog response
10:40:01:ST3_smx:INFO: ----> Checking broken channels
10:40:02:ST3_smx:INFO: Total # broken ch: 4
10:40:02:ST3_smx:INFO: List FAST: [17, 18, 25, 26]
10:40:02:ST3_smx:INFO: List SLOW: []
10:40:02:ST3_smx:INFO: Holes
10:40:02:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:04:ST3_smx:INFO: ----> Checking Analog response
10:40:04:ST3_smx:INFO: ----> Checking broken channels
10:40:04:ST3_smx:INFO: Total # broken ch: 4
10:40:04:ST3_smx:INFO: List FAST: [17, 18, 25, 26]
10:40:04:ST3_smx:INFO: List SLOW: []
10:40:05:ST3_smx:INFO: chip: 3-2 47.250730 C 1135.937260 mV
10:40:05:ST3_smx:INFO: Electrons
10:40:05:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:08:ST3_smx:INFO: ----> Checking Analog response
10:40:08:ST3_smx:INFO: ----> Checking broken channels
10:40:08:ST3_smx:INFO: Total # broken ch: 2
10:40:08:ST3_smx:INFO: List FAST: [4, 74]
10:40:08:ST3_smx:INFO: List SLOW: []
10:40:08:ST3_smx:INFO: Holes
10:40:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:10:ST3_smx:INFO: ----> Checking Analog response
10:40:10:ST3_smx:INFO: ----> Checking broken channels
10:40:10:ST3_smx:INFO: Total # broken ch: 2
10:40:10:ST3_smx:INFO: List FAST: [4, 74]
10:40:10:ST3_smx:INFO: List SLOW: []
10:40:12:ST3_smx:INFO: chip: 10-3 44.073563 C 1141.874115 mV
10:40:12:ST3_smx:INFO: Electrons
10:40:12:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:14:ST3_smx:INFO: ----> Checking Analog response
10:40:14:ST3_smx:INFO: ----> Checking broken channels
10:40:14:ST3_smx:INFO: Total # broken ch: 4
10:40:14:ST3_smx:INFO: List FAST: [28, 39, 44, 46]
10:40:14:ST3_smx:INFO: List SLOW: []
10:40:14:ST3_smx:INFO: Holes
10:40:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:16:ST3_smx:INFO: ----> Checking Analog response
10:40:16:ST3_smx:INFO: ----> Checking broken channels
10:40:17:ST3_smx:INFO: Total # broken ch: 4
10:40:17:ST3_smx:INFO: List FAST: [28, 39, 44, 46]
10:40:17:ST3_smx:INFO: List SLOW: []
10:40:18:ST3_smx:INFO: chip: 12-5 53.612520 C 1112.140140 mV
10:40:18:ST3_smx:INFO: Electrons
10:40:18:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:20:ST3_smx:INFO: ----> Checking Analog response
10:40:20:ST3_smx:INFO: ----> Checking broken channels
10:40:21:ST3_smx:INFO: Total # broken ch: 4
10:40:21:ST3_smx:INFO: List FAST: [35, 72, 73, 99]
10:40:21:ST3_smx:INFO: List SLOW: []
10:40:21:ST3_smx:INFO: Holes
10:40:21:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:23:ST3_smx:INFO: ----> Checking Analog response
10:40:23:ST3_smx:INFO: ----> Checking broken channels
10:40:23:ST3_smx:INFO: Total # broken ch: 4
10:40:23:ST3_smx:INFO: List FAST: [35, 72, 73, 99]
10:40:23:ST3_smx:INFO: List SLOW: []
10:40:25:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
10:40:25:ST3_smx:INFO: Electrons
10:40:25:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:27:ST3_smx:INFO: ----> Checking Analog response
10:40:27:ST3_smx:INFO: ----> Checking broken channels
10:40:27:ST3_smx:INFO: Total # broken ch: 2
10:40:27:ST3_smx:INFO: List FAST: [56, 86]
10:40:27:ST3_smx:INFO: List SLOW: []
10:40:27:ST3_smx:INFO: Holes
10:40:27:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:29:ST3_smx:INFO: ----> Checking Analog response
10:40:29:ST3_smx:INFO: ----> Checking broken channels
10:40:30:ST3_smx:INFO: Total # broken ch: 2
10:40:30:ST3_smx:INFO: List FAST: [56, 86]
10:40:30:ST3_smx:INFO: List SLOW: []
10:40:31:ST3_smx:INFO: chip: 14-7 50.430383 C 1112.140140 mV
10:40:31:ST3_smx:INFO: Electrons
10:40:31:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:33:ST3_smx:INFO: ----> Checking Analog response
10:40:33:ST3_smx:INFO: ----> Checking broken channels
10:40:34:ST3_smx:INFO: Total # broken ch: 6
10:40:34:ST3_smx:INFO: List FAST: [17, 28, 55, 58, 74, 122]
10:40:34:ST3_smx:INFO: List SLOW: []
10:40:34:ST3_smx:INFO: Holes
10:40:34:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:40:36:ST3_smx:INFO: ----> Checking Analog response
10:40:36:ST3_smx:INFO: ----> Checking broken channels
10:40:36:ST3_smx:INFO: Total # broken ch: 6
10:40:36:ST3_smx:INFO: List FAST: [17, 28, 55, 58, 74, 122]
10:40:36:ST3_smx:INFO: List SLOW: []
10:40:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:40:36:febtest:INFO: 01-00 | XA-000-08-002-000-007-218-14 | 50.4 | 1141.9
10:40:37:febtest:INFO: 08-01 | XA-000-08-002-002-008-030-12 | 50.4 | 1141.9
10:40:37:febtest:INFO: 03-02 | XA-000-08-002-000-007-220-14 | 47.3 | 1153.7
10:40:37:febtest:INFO: 10-03 | XA-000-08-002-000-008-010-02 | 47.3 | 1159.7
10:40:37:febtest:INFO: 12-05 | XA-000-08-002-000-008-011-02 | 56.8 | 1130.0
10:40:38:febtest:INFO: 07-06 | XA-000-08-002-000-008-000-02 | 44.1 | 1177.4
10:40:38:febtest:INFO: 14-07 | XA-000-08-002-000-008-013-02 | 53.6 | 1130.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_06_12-10_39_15
OPERATOR : Oleksandr S.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1182| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5070', '1.850', '2.2550', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9700', '1.850', '2.4090', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9630', '1.850', '0.8485', '0.000', '0.0000', '0.000', '0.0000']