FEB_1183 05.06.24 14:33:37
Info
14:33:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:33:37:ST3_Shared:INFO: FEB-Microcable
14:33:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:33:37:febtest:INFO: Testing FEB with SN 1183
14:33:38:smx_tester:INFO: Scanning setup
14:33:38:elinks:INFO: Disabling clock on downlink 0
14:33:38:elinks:INFO: Disabling clock on downlink 1
14:33:38:elinks:INFO: Disabling clock on downlink 2
14:33:38:elinks:INFO: Disabling clock on downlink 3
14:33:38:elinks:INFO: Disabling clock on downlink 4
14:33:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:33:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:38:elinks:INFO: Disabling clock on downlink 0
14:33:38:elinks:INFO: Disabling clock on downlink 1
14:33:38:elinks:INFO: Disabling clock on downlink 2
14:33:38:elinks:INFO: Disabling clock on downlink 3
14:33:38:elinks:INFO: Disabling clock on downlink 4
14:33:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:33:39:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:33:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:39:elinks:INFO: Disabling clock on downlink 0
14:33:39:elinks:INFO: Disabling clock on downlink 1
14:33:39:elinks:INFO: Disabling clock on downlink 2
14:33:39:elinks:INFO: Disabling clock on downlink 3
14:33:39:elinks:INFO: Disabling clock on downlink 4
14:33:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:33:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:39:elinks:INFO: Disabling clock on downlink 0
14:33:39:elinks:INFO: Disabling clock on downlink 1
14:33:39:elinks:INFO: Disabling clock on downlink 2
14:33:39:elinks:INFO: Disabling clock on downlink 3
14:33:39:elinks:INFO: Disabling clock on downlink 4
14:33:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:33:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:39:elinks:INFO: Disabling clock on downlink 0
14:33:39:elinks:INFO: Disabling clock on downlink 1
14:33:39:elinks:INFO: Disabling clock on downlink 2
14:33:39:elinks:INFO: Disabling clock on downlink 3
14:33:39:elinks:INFO: Disabling clock on downlink 4
14:33:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:33:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:39:setup_element:INFO: Scanning clock phase
14:33:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:39:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:33:39:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:33:39:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:33:39:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:33:39:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:33:39:setup_element:INFO: Eye window for uplink 6 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
14:33:39:setup_element:INFO: Eye window for uplink 7 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
14:33:39:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:33:39:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:33:40:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:33:40:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:33:40:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
14:33:40:setup_element:INFO: Scanning data phases
14:33:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:45:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:33:45:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
14:33:45:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
14:33:45:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
14:33:45:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
14:33:45:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
14:33:45:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
14:33:45:setup_element:INFO: Eye window for uplink 6 : XXXXX__________________________________X
Data delay found: 21
14:33:45:setup_element:INFO: Eye window for uplink 7 : XXX________________________________XXXXX
Data delay found: 18
14:33:45:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
14:33:45:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
14:33:45:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
14:33:45:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
14:33:45:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
14:33:45:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXX____
Data delay found: 12
14:33:45:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________
Data delay found: 8
14:33:45:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______
Data delay found: 10
14:33:45:setup_element:INFO: Setting the data phase to 32 for uplink 0
14:33:45:setup_element:INFO: Setting the data phase to 28 for uplink 1
14:33:45:setup_element:INFO: Setting the data phase to 30 for uplink 2
14:33:45:setup_element:INFO: Setting the data phase to 28 for uplink 3
14:33:45:setup_element:INFO: Setting the data phase to 28 for uplink 4
14:33:45:setup_element:INFO: Setting the data phase to 24 for uplink 5
14:33:45:setup_element:INFO: Setting the data phase to 21 for uplink 6
14:33:45:setup_element:INFO: Setting the data phase to 18 for uplink 7
14:33:45:setup_element:INFO: Setting the data phase to 6 for uplink 8
14:33:45:setup_element:INFO: Setting the data phase to 11 for uplink 9
14:33:45:setup_element:INFO: Setting the data phase to 9 for uplink 10
14:33:45:setup_element:INFO: Setting the data phase to 13 for uplink 11
14:33:45:setup_element:INFO: Setting the data phase to 10 for uplink 12
14:33:45:setup_element:INFO: Setting the data phase to 12 for uplink 13
14:33:45:setup_element:INFO: Setting the data phase to 8 for uplink 14
14:33:45:setup_element:INFO: Setting the data phase to 10 for uplink 15
14:33:45:setup_element:INFO: Beginning SMX ASICs map scan
14:33:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:33:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:33:45:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:33:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:33:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:33:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:33:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:33:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:33:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:33:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:33:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:33:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:33:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:33:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:33:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:33:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:33:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:33:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:33:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:33:48:setup_element:INFO: Performing Elink synchronization
14:33:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:33:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:33:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:33:48:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:33:49:febtest:INFO: Init all SMX (CSA): 30
14:34:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:34:04:febtest:INFO: 01-00 | XA-000-08-002-000-008-070-07 | 40.9 | 1141.9
14:34:04:febtest:INFO: 08-01 | XA-000-08-002-000-008-141-08 | 40.9 | 1135.9
14:34:04:febtest:INFO: 03-02 | XA-000-08-002-000-008-191-01 | 37.7 | 1159.7
14:34:04:febtest:INFO: 10-03 | XA-000-08-002-000-008-172-06 | 47.3 | 1112.1
14:34:05:febtest:INFO: 05-04 | XA-000-08-002-000-008-177-01 | 37.7 | 1153.7
14:34:05:febtest:INFO: 12-05 | XA-000-08-002-000-008-079-07 | 44.1 | 1130.0
14:34:05:febtest:INFO: 07-06 | XA-000-08-002-000-008-189-01 | 47.3 | 1130.0
14:34:05:febtest:INFO: 14-07 | XA-000-08-002-000-008-045-12 | 31.4 | 1171.5
14:34:06:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:34:08:ST3_smx:INFO: chip: 1-0 40.898880 C 1153.732915 mV
14:34:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:08:ST3_smx:INFO: Electrons
14:34:08:ST3_smx:INFO: # loops 0
14:34:10:ST3_smx:INFO: # loops 1
14:34:12:ST3_smx:INFO: # loops 2
14:34:13:ST3_smx:INFO: Total # of broken channels: 0
14:34:13:ST3_smx:INFO: List of broken channels: []
14:34:13:ST3_smx:INFO: Total # of broken channels: 0
14:34:13:ST3_smx:INFO: List of broken channels: []
14:34:15:ST3_smx:INFO: chip: 8-1 40.898880 C 1147.806000 mV
14:34:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:15:ST3_smx:INFO: Electrons
14:34:15:ST3_smx:INFO: # loops 0
14:34:17:ST3_smx:INFO: # loops 1
14:34:18:ST3_smx:INFO: # loops 2
14:34:20:ST3_smx:INFO: Total # of broken channels: 0
14:34:20:ST3_smx:INFO: List of broken channels: []
14:34:20:ST3_smx:INFO: Total # of broken channels: 0
14:34:20:ST3_smx:INFO: List of broken channels: []
14:34:22:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV
14:34:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:22:ST3_smx:INFO: Electrons
14:34:22:ST3_smx:INFO: # loops 0
14:34:23:ST3_smx:INFO: # loops 1
14:34:25:ST3_smx:INFO: # loops 2
14:34:26:ST3_smx:INFO: Total # of broken channels: 0
14:34:27:ST3_smx:INFO: List of broken channels: []
14:34:27:ST3_smx:INFO: Total # of broken channels: 0
14:34:27:ST3_smx:INFO: List of broken channels: []
14:34:28:ST3_smx:INFO: chip: 10-3 47.250730 C 1124.048640 mV
14:34:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:28:ST3_smx:INFO: Electrons
14:34:28:ST3_smx:INFO: # loops 0
14:34:30:ST3_smx:INFO: # loops 1
14:34:31:ST3_smx:INFO: # loops 2
14:34:33:ST3_smx:INFO: Total # of broken channels: 0
14:34:33:ST3_smx:INFO: List of broken channels: []
14:34:33:ST3_smx:INFO: Total # of broken channels: 0
14:34:33:ST3_smx:INFO: List of broken channels: []
14:34:35:ST3_smx:INFO: chip: 5-4 37.726682 C 1165.571835 mV
14:34:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:35:ST3_smx:INFO: Electrons
14:34:35:ST3_smx:INFO: # loops 0
14:34:36:ST3_smx:INFO: # loops 1
14:34:38:ST3_smx:INFO: # loops 2
14:34:39:ST3_smx:INFO: Total # of broken channels: 0
14:34:39:ST3_smx:INFO: List of broken channels: []
14:34:39:ST3_smx:INFO: Total # of broken channels: 0
14:34:39:ST3_smx:INFO: List of broken channels: []
14:34:41:ST3_smx:INFO: chip: 12-5 44.073563 C 1141.874115 mV
14:34:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:41:ST3_smx:INFO: Electrons
14:34:41:ST3_smx:INFO: # loops 0
14:34:43:ST3_smx:INFO: # loops 1
14:34:44:ST3_smx:INFO: # loops 2
14:34:46:ST3_smx:INFO: Total # of broken channels: 0
14:34:46:ST3_smx:INFO: List of broken channels: []
14:34:46:ST3_smx:INFO: Total # of broken channels: 0
14:34:46:ST3_smx:INFO: List of broken channels: []
14:34:48:ST3_smx:INFO: chip: 7-6 47.250730 C 1141.874115 mV
14:34:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:48:ST3_smx:INFO: Electrons
14:34:48:ST3_smx:INFO: # loops 0
14:34:50:ST3_smx:INFO: # loops 1
14:34:51:ST3_smx:INFO: # loops 2
14:34:53:ST3_smx:INFO: Total # of broken channels: 0
14:34:53:ST3_smx:INFO: List of broken channels: []
14:34:53:ST3_smx:INFO: Total # of broken channels: 0
14:34:53:ST3_smx:INFO: List of broken channels: []
14:34:54:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
14:34:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:54:ST3_smx:INFO: Electrons
14:34:54:ST3_smx:INFO: # loops 0
14:34:56:ST3_smx:INFO: # loops 1
14:34:58:ST3_smx:INFO: # loops 2
14:34:59:ST3_smx:INFO: Total # of broken channels: 0
14:34:59:ST3_smx:INFO: List of broken channels: []
14:34:59:ST3_smx:INFO: Total # of broken channels: 0
14:34:59:ST3_smx:INFO: List of broken channels: []
14:34:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:35:00:febtest:INFO: 01-00 | XA-000-08-002-000-008-070-07 | 40.9 | 1177.4
14:35:00:febtest:INFO: 08-01 | XA-000-08-002-000-008-141-08 | 44.1 | 1165.6
14:35:00:febtest:INFO: 03-02 | XA-000-08-002-000-008-191-01 | 37.7 | 1195.1
14:35:00:febtest:INFO: 10-03 | XA-000-08-002-000-008-172-06 | 47.3 | 1147.8
14:35:01:febtest:INFO: 05-04 | XA-000-08-002-000-008-177-01 | 37.7 | 1183.3
14:35:01:febtest:INFO: 12-05 | XA-000-08-002-000-008-079-07 | 44.1 | 1159.7
14:35:01:febtest:INFO: 07-06 | XA-000-08-002-000-008-189-01 | 47.3 | 1165.6
14:35:01:febtest:INFO: 14-07 | XA-000-08-002-000-008-045-12 | 31.4 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_05-14_33_37
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1183| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4630', '1.849', '2.5690', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9820', '1.850', '2.3830', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9890', '1.850', '0.5266', '0.000', '0.0000', '0.000', '0.0000']