FEB_1186    29.05.24 10:12:02

TextEdit.txt
            10:12:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:02:ST3_Shared:INFO:	                       FEB-Microcable                       
10:12:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:02:febtest:INFO:	Testing FEB with SN 1186
10:12:03:smx_tester:INFO:	Scanning setup
10:12:03:elinks:INFO:	Disabling clock on downlink 0
10:12:03:elinks:INFO:	Disabling clock on downlink 1
10:12:03:elinks:INFO:	Disabling clock on downlink 2
10:12:03:elinks:INFO:	Disabling clock on downlink 3
10:12:03:elinks:INFO:	Disabling clock on downlink 4
10:12:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:12:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:12:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:12:03:elinks:INFO:	Disabling clock on downlink 0
10:12:03:elinks:INFO:	Disabling clock on downlink 1
10:12:03:elinks:INFO:	Disabling clock on downlink 2
10:12:03:elinks:INFO:	Disabling clock on downlink 3
10:12:03:elinks:INFO:	Disabling clock on downlink 4
10:12:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:12:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:12:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:12:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:12:04:elinks:INFO:	Disabling clock on downlink 0
10:12:04:elinks:INFO:	Disabling clock on downlink 1
10:12:04:elinks:INFO:	Disabling clock on downlink 2
10:12:04:elinks:INFO:	Disabling clock on downlink 3
10:12:04:elinks:INFO:	Disabling clock on downlink 4
10:12:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:12:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:12:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:12:04:elinks:INFO:	Disabling clock on downlink 0
10:12:04:elinks:INFO:	Disabling clock on downlink 1
10:12:04:elinks:INFO:	Disabling clock on downlink 2
10:12:04:elinks:INFO:	Disabling clock on downlink 3
10:12:04:elinks:INFO:	Disabling clock on downlink 4
10:12:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:12:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:12:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:12:04:elinks:INFO:	Disabling clock on downlink 0
10:12:04:elinks:INFO:	Disabling clock on downlink 1
10:12:04:elinks:INFO:	Disabling clock on downlink 2
10:12:04:elinks:INFO:	Disabling clock on downlink 3
10:12:04:elinks:INFO:	Disabling clock on downlink 4
10:12:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:12:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:12:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:12:04:setup_element:INFO:	Scanning clock phase
10:12:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:12:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:05:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:12:05:setup_element:INFO:	Eye window for uplink 0 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:12:05:setup_element:INFO:	Eye window for uplink 1 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:12:05:setup_element:INFO:	Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:12:05:setup_element:INFO:	Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:12:05:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:12:05:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:12:05:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:12:05:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:12:05:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:12:05:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:12:05:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:05:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:05:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:05:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:05:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:12:05:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:12:05:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
10:12:05:setup_element:INFO:	Scanning data phases
10:12:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:12:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:10:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:12:10:setup_element:INFO:	Eye window for uplink 0 : ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
10:12:10:setup_element:INFO:	Eye window for uplink 1 : ___________XXXXX__XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
10:12:10:setup_element:INFO:	Eye window for uplink 2 : ___________XXXXXX_______________________
Data delay found: 33
10:12:10:setup_element:INFO:	Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
10:12:10:setup_element:INFO:	Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
10:12:10:setup_element:INFO:	Eye window for uplink 5 : __XXXX__________________________________
Data delay found: 23
10:12:10:setup_element:INFO:	Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
10:12:10:setup_element:INFO:	Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
10:12:10:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
10:12:10:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
10:12:10:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
10:12:10:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
10:12:10:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXXX_______
Data delay found: 9
10:12:10:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
10:12:10:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
10:12:10:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
10:12:10:setup_element:INFO:	Setting the data phase to 7 for uplink 0
10:12:10:setup_element:INFO:	Setting the data phase to 5 for uplink 1
10:12:10:setup_element:INFO:	Setting the data phase to 33 for uplink 2
10:12:10:setup_element:INFO:	Setting the data phase to 30 for uplink 3
10:12:10:setup_element:INFO:	Setting the data phase to 27 for uplink 4
10:12:10:setup_element:INFO:	Setting the data phase to 23 for uplink 5
10:12:10:setup_element:INFO:	Setting the data phase to 22 for uplink 6
10:12:10:setup_element:INFO:	Setting the data phase to 18 for uplink 7
10:12:10:setup_element:INFO:	Setting the data phase to 8 for uplink 8
10:12:10:setup_element:INFO:	Setting the data phase to 13 for uplink 9
10:12:10:setup_element:INFO:	Setting the data phase to 8 for uplink 10
10:12:10:setup_element:INFO:	Setting the data phase to 12 for uplink 11
10:12:10:setup_element:INFO:	Setting the data phase to 9 for uplink 12
10:12:10:setup_element:INFO:	Setting the data phase to 12 for uplink 13
10:12:10:setup_element:INFO:	Setting the data phase to 9 for uplink 14
10:12:10:setup_element:INFO:	Setting the data phase to 11 for uplink 15
10:12:10:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: X________________________________________________________________________XXXXXXX
      Uplink  1: X________________________________________________________________________XXXXXXX
      Uplink  2: _________________________________________________________________________XXXXXXX
      Uplink  3: _________________________________________________________________________XXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXXX_
      Uplink  7: ________________________________________________________________________XXXXXXX_
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 7
      Window Length: 16
      Eye Window: ________________XXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 1:
      Optimal Phase: 5
      Window Length: 11
      Eye Window: ___________XXXXX__XXXXXXXXXXXXXXXXXXXXXX
    Uplink 2:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 3:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 8:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 9:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 13:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 14:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
]
10:12:10:setup_element:INFO:	Beginning SMX ASICs map scan
10:12:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:12:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:11:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:12:11:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:12:11:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:12:11:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:12:11:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:12:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:12:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:12:11:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:12:11:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:12:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:12:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:12:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:12:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:12:12:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:12:12:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:12:12:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:12:12:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:12:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:12:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:12:13:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: X________________________________________________________________________XXXXXXX
      Uplink  1: X________________________________________________________________________XXXXXXX
      Uplink  2: _________________________________________________________________________XXXXXXX
      Uplink  3: _________________________________________________________________________XXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXXX_
      Uplink  7: ________________________________________________________________________XXXXXXX_
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 7
      Window Length: 16
      Eye Window: ________________XXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 1:
      Optimal Phase: 5
      Window Length: 11
      Eye Window: ___________XXXXX__XXXXXXXXXXXXXXXXXXXXXX
    Uplink 2:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 3:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 8:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 9:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 13:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 14:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______

10:12:13:setup_element:INFO:	Performing Elink synchronization
10:12:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:12:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:12:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:12:13:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:12:13:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:12:14:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
10:12:14:febtest:INFO:	Init all SMX (CSA): 30
10:12:28:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:12:28:febtest:INFO:	01-00 | XA-000-08-002-001-006-044-13 |  37.7 | 1135.9
10:12:28:febtest:INFO:	08-01 | XA-000-08-002-002-006-080-00 |  28.2 | 1153.7
10:12:28:febtest:INFO:	03-02 | XA-000-08-002-002-006-094-00 |  37.7 | 1147.8
10:12:29:febtest:INFO:	10-03 | XA-000-08-002-002-006-113-14 |  31.4 | 1153.7
10:12:29:febtest:INFO:	05-04 | XA-000-08-002-001-006-040-13 |  28.2 | 1177.4
10:12:29:febtest:INFO:	12-05 | XA-000-08-002-002-006-110-09 |  18.7 | 1195.1
10:12:29:febtest:INFO:	07-06 | XA-000-08-002-002-006-083-00 |  18.7 | 1218.6
10:12:30:febtest:INFO:	14-07 | XA-000-08-002-002-006-106-09 |  25.1 | 1171.5
10:12:31:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:12:33:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1141.874115 mV
10:12:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:33:ST3_smx:INFO:		Electrons
10:12:33:ST3_smx:INFO:	# loops 0
10:12:34:ST3_smx:INFO:	# loops 1
10:12:36:ST3_smx:INFO:	# loops 2
10:12:37:ST3_smx:INFO:	Total # of broken channels: 0
10:12:37:ST3_smx:INFO:	List of broken channels: []
10:12:37:ST3_smx:INFO:	Total # of broken channels: 0
10:12:37:ST3_smx:INFO:	List of broken channels: []
10:12:39:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1171.483840 mV
10:12:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:39:ST3_smx:INFO:		Electrons
10:12:39:ST3_smx:INFO:	# loops 0
10:12:41:ST3_smx:INFO:	# loops 1
10:12:42:ST3_smx:INFO:	# loops 2
10:12:44:ST3_smx:INFO:	Total # of broken channels: 0
10:12:44:ST3_smx:INFO:	List of broken channels: []
10:12:44:ST3_smx:INFO:	Total # of broken channels: 0
10:12:44:ST3_smx:INFO:	List of broken channels: []
10:12:46:ST3_smx:INFO:	chip: 3-2 	 37.726682 C 	 1153.732915 mV
10:12:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:46:ST3_smx:INFO:		Electrons
10:12:46:ST3_smx:INFO:	# loops 0
10:12:47:ST3_smx:INFO:	# loops 1
10:12:49:ST3_smx:INFO:	# loops 2
10:12:50:ST3_smx:INFO:	Total # of broken channels: 0
10:12:50:ST3_smx:INFO:	List of broken channels: []
10:12:50:ST3_smx:INFO:	Total # of broken channels: 0
10:12:50:ST3_smx:INFO:	List of broken channels: []
10:12:52:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1165.571835 mV
10:12:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:52:ST3_smx:INFO:		Electrons
10:12:52:ST3_smx:INFO:	# loops 0
10:12:53:ST3_smx:INFO:	# loops 1
10:12:55:ST3_smx:INFO:	# loops 2
10:12:57:ST3_smx:INFO:	Total # of broken channels: 0
10:12:57:ST3_smx:INFO:	List of broken channels: []
10:12:57:ST3_smx:INFO:	Total # of broken channels: 0
10:12:57:ST3_smx:INFO:	List of broken channels: []
10:12:58:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1189.190035 mV
10:12:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:12:58:ST3_smx:INFO:		Electrons
10:12:58:ST3_smx:INFO:	# loops 0
10:13:00:ST3_smx:INFO:	# loops 1
10:13:01:ST3_smx:INFO:	# loops 2
10:13:03:ST3_smx:INFO:	Total # of broken channels: 0
10:13:03:ST3_smx:INFO:	List of broken channels: []
10:13:03:ST3_smx:INFO:	Total # of broken channels: 0
10:13:03:ST3_smx:INFO:	List of broken channels: []
10:13:05:ST3_smx:INFO:	chip: 12-5 	 21.902970 C 	 1212.728715 mV
10:13:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:13:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:13:05:ST3_smx:INFO:		Electrons
10:13:05:ST3_smx:INFO:	# loops 0
10:13:06:ST3_smx:INFO:	# loops 1
10:13:08:ST3_smx:INFO:	# loops 2
10:13:09:ST3_smx:INFO:	Total # of broken channels: 0
10:13:09:ST3_smx:INFO:	List of broken channels: []
10:13:09:ST3_smx:INFO:	Total # of broken channels: 0
10:13:09:ST3_smx:INFO:	List of broken channels: []
10:13:11:ST3_smx:INFO:	chip: 7-6 	 18.745682 C 	 1230.330540 mV
10:13:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:13:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:13:11:ST3_smx:INFO:		Electrons
10:13:11:ST3_smx:INFO:	# loops 0
10:13:13:ST3_smx:INFO:	# loops 1
10:13:14:ST3_smx:INFO:	# loops 2
10:13:16:ST3_smx:INFO:	Total # of broken channels: 0
10:13:16:ST3_smx:INFO:	List of broken channels: []
10:13:16:ST3_smx:INFO:	Total # of broken channels: 0
10:13:16:ST3_smx:INFO:	List of broken channels: []
10:13:18:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1183.292940 mV
10:13:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:13:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:13:18:ST3_smx:INFO:		Electrons
10:13:18:ST3_smx:INFO:	# loops 0
10:13:19:ST3_smx:INFO:	# loops 1
10:13:21:ST3_smx:INFO:	# loops 2
10:13:22:ST3_smx:INFO:	Total # of broken channels: 0
10:13:22:ST3_smx:INFO:	List of broken channels: []
10:13:22:ST3_smx:INFO:	Total # of broken channels: 0
10:13:22:ST3_smx:INFO:	List of broken channels: []
10:13:22:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:13:23:febtest:INFO:	01-00 | XA-000-08-002-001-006-044-13 |  40.9 | 1165.6
10:13:23:febtest:INFO:	08-01 | XA-000-08-002-002-006-080-00 |  28.2 | 1189.2
10:13:23:febtest:INFO:	03-02 | XA-000-08-002-002-006-094-00 |  37.7 | 1177.4
10:13:23:febtest:INFO:	10-03 | XA-000-08-002-002-006-113-14 |  34.6 | 1189.2
10:13:24:febtest:INFO:	05-04 | XA-000-08-002-001-006-040-13 |  28.2 | 1206.9
10:13:24:febtest:INFO:	12-05 | XA-000-08-002-002-006-110-09 |  21.9 | 1230.3
10:13:24:febtest:INFO:	07-06 | XA-000-08-002-002-006-083-00 |  18.7 | 1247.9
10:13:24:febtest:INFO:	14-07 | XA-000-08-002-002-006-106-09 |  28.2 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_29-10_12_02
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1186| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '1.9250', '1.849', '2.2150', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9860', '1.850', '2.3380', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9800', '1.850', '0.5233', '0.000', '0.0000', '0.000', '0.0000']