
FEB_1195 18.07.24 10:31:23
TextEdit.txt
10:31:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:31:23:ST3_Shared:INFO: FEB-Sensor 10:31:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:32:07:ST3_ModuleSelector:INFO: L7DL500123 M7DL5B0001230B2 42 B 10:32:07:ST3_ModuleSelector:INFO: 07332 10:32:07:febtest:INFO: Testing FEB with SN 1195 10:32:09:smx_tester:INFO: Scanning setup 10:32:09:elinks:INFO: Disabling clock on downlink 0 10:32:09:elinks:INFO: Disabling clock on downlink 1 10:32:09:elinks:INFO: Disabling clock on downlink 2 10:32:09:elinks:INFO: Disabling clock on downlink 3 10:32:09:elinks:INFO: Disabling clock on downlink 4 10:32:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:32:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:32:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:32:09:elinks:INFO: Disabling clock on downlink 0 10:32:09:elinks:INFO: Disabling clock on downlink 1 10:32:09:elinks:INFO: Disabling clock on downlink 2 10:32:09:elinks:INFO: Disabling clock on downlink 3 10:32:09:elinks:INFO: Disabling clock on downlink 4 10:32:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:32:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 10:32:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 10:32:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:32:09:elinks:INFO: Disabling clock on downlink 0 10:32:09:elinks:INFO: Disabling clock on downlink 1 10:32:09:elinks:INFO: Disabling clock on downlink 2 10:32:09:elinks:INFO: Disabling clock on downlink 3 10:32:09:elinks:INFO: Disabling clock on downlink 4 10:32:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:32:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:32:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:32:09:elinks:INFO: Disabling clock on downlink 0 10:32:09:elinks:INFO: Disabling clock on downlink 1 10:32:09:elinks:INFO: Disabling clock on downlink 2 10:32:09:elinks:INFO: Disabling clock on downlink 3 10:32:09:elinks:INFO: Disabling clock on downlink 4 10:32:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:32:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:32:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:32:09:elinks:INFO: Disabling clock on downlink 0 10:32:09:elinks:INFO: Disabling clock on downlink 1 10:32:10:elinks:INFO: Disabling clock on downlink 2 10:32:10:elinks:INFO: Disabling clock on downlink 3 10:32:10:elinks:INFO: Disabling clock on downlink 4 10:32:10:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:32:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:32:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:32:10:setup_element:INFO: Scanning clock phase 10:32:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:32:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:32:10:setup_element:INFO: Clock phase scan results for group 0, downlink 1 10:32:10:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:32:10:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:32:10:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:32:10:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:32:10:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:32:10:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:32:10:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:32:10:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:32:10:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 10:32:10:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 10:32:10:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:32:10:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:32:10:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 10:32:10:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 10:32:10:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:32:10:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:32:10:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 10:32:10:setup_element:INFO: Scanning data phases 10:32:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:32:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:32:16:setup_element:INFO: Data phase scan results for group 0, downlink 1 10:32:16:setup_element:INFO: Eye window for uplink 0 : _________XXXXX__________________________ Data delay found: 31 10:32:16:setup_element:INFO: Eye window for uplink 1 : _____XXXXX______________________________ Data delay found: 27 10:32:16:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________ Data delay found: 29 10:32:16:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________ Data delay found: 26 10:32:16:setup_element:INFO: Eye window for uplink 4 : _XXXXX__________________________________ Data delay found: 23 10:32:16:setup_element:INFO: Eye window for uplink 5 : XXX__________________________________XXX Data delay found: 19 10:32:16:setup_element:INFO: Eye window for uplink 6 : XXX__________________________________XXX Data delay found: 19 10:32:16:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_ Data delay found: 16 10:32:16:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXX_____________ Data delay found: 3 10:32:16:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXX_________ Data delay found: 8 10:32:16:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXX__________ Data delay found: 6 10:32:16:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______ Data delay found: 10 10:32:16:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________ Data delay found: 8 10:32:16:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXX_____ Data delay found: 11 10:32:16:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXX________ Data delay found: 9 10:32:16:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXX______ Data delay found: 11 10:32:16:setup_element:INFO: Setting the data phase to 31 for uplink 0 10:32:16:setup_element:INFO: Setting the data phase to 27 for uplink 1 10:32:16:setup_element:INFO: Setting the data phase to 29 for uplink 2 10:32:16:setup_element:INFO: Setting the data phase to 26 for uplink 3 10:32:16:setup_element:INFO: Setting the data phase to 23 for uplink 4 10:32:16:setup_element:INFO: Setting the data phase to 19 for uplink 5 10:32:16:setup_element:INFO: Setting the data phase to 19 for uplink 6 10:32:16:setup_element:INFO: Setting the data phase to 16 for uplink 7 10:32:16:setup_element:INFO: Setting the data phase to 3 for uplink 8 10:32:16:setup_element:INFO: Setting the data phase to 8 for uplink 9 10:32:16:setup_element:INFO: Setting the data phase to 6 for uplink 10 10:32:16:setup_element:INFO: Setting the data phase to 10 for uplink 11 10:32:16:setup_element:INFO: Setting the data phase to 8 for uplink 12 10:32:16:setup_element:INFO: Setting the data phase to 11 for uplink 13 10:32:16:setup_element:INFO: Setting the data phase to 9 for uplink 14 10:32:16:setup_element:INFO: Setting the data phase to 11 for uplink 15 10:32:16:setup_element:INFO: Beginning SMX ASICs map scan 10:32:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:32:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:32:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:32:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:32:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 10:32:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 10:32:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 10:32:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 10:32:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 10:32:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 10:32:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 10:32:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 10:32:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 10:32:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 10:32:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 10:32:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 10:32:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 10:32:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 10:32:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 10:32:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 10:32:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 10:32:18:setup_element:INFO: Performing Elink synchronization 10:32:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:32:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:32:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:32:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:32:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 10:32:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 10:32:19:febtest:INFO: Init all SMX (CSA): 30 10:32:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:32:34:febtest:INFO: 01-00 | XA-000-08-002-003-006-143-00 | 34.6 | 1147.8 10:32:34:febtest:INFO: 08-01 | XA-000-08-002-003-006-139-00 | 18.7 | 1201.0 10:32:34:febtest:INFO: 03-02 | XA-000-08-002-003-006-142-00 | 34.6 | 1153.7 10:32:34:febtest:INFO: 10-03 | XA-000-08-002-003-006-054-03 | 28.2 | 1177.4 10:32:35:febtest:INFO: 05-04 | XA-000-08-002-003-006-141-00 | 40.9 | 1141.9 10:32:35:febtest:INFO: 12-05 | XA-000-08-002-003-006-053-03 | 47.3 | 1118.1 10:32:35:febtest:INFO: 07-06 | XA-000-08-002-003-006-140-00 | 37.7 | 1147.8 10:32:35:febtest:INFO: 14-07 | XA-000-08-002-003-006-052-03 | 34.6 | 1159.7 10:32:36:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 10:32:38:ST3_smx:INFO: chip: 1-0 34.556970 C 1165.571835 mV 10:32:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:32:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:32:38:ST3_smx:INFO: Electrons 10:32:38:ST3_smx:INFO: # loops 0 10:32:40:ST3_smx:INFO: # loops 1 10:32:42:ST3_smx:INFO: # loops 2 10:32:43:ST3_smx:INFO: # loops 3 10:32:45:ST3_smx:INFO: # loops 4 10:32:46:ST3_smx:INFO: Total # of broken channels: 0 10:32:46:ST3_smx:INFO: List of broken channels: [] 10:32:46:ST3_smx:INFO: Total # of broken channels: 0 10:32:46:ST3_smx:INFO: List of broken channels: [] 10:32:48:ST3_smx:INFO: chip: 8-1 18.745682 C 1218.600960 mV 10:32:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:32:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:32:48:ST3_smx:INFO: Electrons 10:32:48:ST3_smx:INFO: # loops 0 10:32:50:ST3_smx:INFO: # loops 1 10:32:51:ST3_smx:INFO: # loops 2 10:32:53:ST3_smx:INFO: # loops 3 10:32:55:ST3_smx:INFO: # loops 4 10:32:56:ST3_smx:INFO: Total # of broken channels: 0 10:32:56:ST3_smx:INFO: List of broken channels: [] 10:32:56:ST3_smx:INFO: Total # of broken channels: 0 10:32:56:ST3_smx:INFO: List of broken channels: [] 10:32:58:ST3_smx:INFO: chip: 3-2 34.556970 C 1165.571835 mV 10:32:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:32:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:32:58:ST3_smx:INFO: Electrons 10:32:58:ST3_smx:INFO: # loops 0 10:33:00:ST3_smx:INFO: # loops 1 10:33:01:ST3_smx:INFO: # loops 2 10:33:03:ST3_smx:INFO: # loops 3 10:33:05:ST3_smx:INFO: # loops 4 10:33:06:ST3_smx:INFO: Total # of broken channels: 1 10:33:06:ST3_smx:INFO: List of broken channels: [0] 10:33:06:ST3_smx:INFO: Total # of broken channels: 4 10:33:06:ST3_smx:INFO: List of broken channels: [0, 2, 4, 10] 10:33:08:ST3_smx:INFO: chip: 10-3 28.225000 C 1189.190035 mV 10:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:08:ST3_smx:INFO: Electrons 10:33:08:ST3_smx:INFO: # loops 0 10:33:10:ST3_smx:INFO: # loops 1 10:33:11:ST3_smx:INFO: # loops 2 10:33:13:ST3_smx:INFO: # loops 3 10:33:14:ST3_smx:INFO: # loops 4 10:33:16:ST3_smx:INFO: Total # of broken channels: 0 10:33:16:ST3_smx:INFO: List of broken channels: [] 10:33:16:ST3_smx:INFO: Total # of broken channels: 0 10:33:16:ST3_smx:INFO: List of broken channels: [] 10:33:18:ST3_smx:INFO: chip: 5-4 40.898880 C 1153.732915 mV 10:33:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:18:ST3_smx:INFO: Electrons 10:33:18:ST3_smx:INFO: # loops 0 10:33:19:ST3_smx:INFO: # loops 1 10:33:21:ST3_smx:INFO: # loops 2 10:33:23:ST3_smx:INFO: # loops 3 10:33:24:ST3_smx:INFO: # loops 4 10:33:26:ST3_smx:INFO: Total # of broken channels: 0 10:33:26:ST3_smx:INFO: List of broken channels: [] 10:33:26:ST3_smx:INFO: Total # of broken channels: 0 10:33:26:ST3_smx:INFO: List of broken channels: [] 10:33:28:ST3_smx:INFO: chip: 12-5 47.250730 C 1129.995435 mV 10:33:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:28:ST3_smx:INFO: Electrons 10:33:28:ST3_smx:INFO: # loops 0 10:33:29:ST3_smx:INFO: # loops 1 10:33:31:ST3_smx:INFO: # loops 2 10:33:32:ST3_smx:INFO: # loops 3 10:33:34:ST3_smx:INFO: # loops 4 10:33:36:ST3_smx:INFO: Total # of broken channels: 0 10:33:36:ST3_smx:INFO: List of broken channels: [] 10:33:36:ST3_smx:INFO: Total # of broken channels: 0 10:33:36:ST3_smx:INFO: List of broken channels: [] 10:33:37:ST3_smx:INFO: chip: 7-6 37.726682 C 1159.654860 mV 10:33:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:37:ST3_smx:INFO: Electrons 10:33:38:ST3_smx:INFO: # loops 0 10:33:39:ST3_smx:INFO: # loops 1 10:33:41:ST3_smx:INFO: # loops 2 10:33:42:ST3_smx:INFO: # loops 3 10:33:44:ST3_smx:INFO: # loops 4 10:33:46:ST3_smx:INFO: Total # of broken channels: 0 10:33:46:ST3_smx:INFO: List of broken channels: [] 10:33:46:ST3_smx:INFO: Total # of broken channels: 0 10:33:46:ST3_smx:INFO: List of broken channels: [] 10:33:47:ST3_smx:INFO: chip: 14-7 37.726682 C 1171.483840 mV 10:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:33:47:ST3_smx:INFO: Electrons 10:33:47:ST3_smx:INFO: # loops 0 10:33:49:ST3_smx:INFO: # loops 1 10:33:51:ST3_smx:INFO: # loops 2 10:33:52:ST3_smx:INFO: # loops 3 10:33:54:ST3_smx:INFO: # loops 4 10:33:55:ST3_smx:INFO: Total # of broken channels: 0 10:33:55:ST3_smx:INFO: List of broken channels: [] 10:33:55:ST3_smx:INFO: Total # of broken channels: 0 10:33:55:ST3_smx:INFO: List of broken channels: [] 10:33:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:33:56:febtest:INFO: 01-00 | XA-000-08-002-003-006-143-00 | 37.7 | 1183.3 10:33:56:febtest:INFO: 08-01 | XA-000-08-002-003-006-139-00 | 21.9 | 1242.0 10:33:56:febtest:INFO: 03-02 | XA-000-08-002-003-006-142-00 | 37.7 | 1183.3 10:33:57:febtest:INFO: 10-03 | XA-000-08-002-003-006-054-03 | 31.4 | 1212.7 10:33:57:febtest:INFO: 05-04 | XA-000-08-002-003-006-141-00 | 44.1 | 1171.5 10:33:57:febtest:INFO: 12-05 | XA-000-08-002-003-006-053-03 | 47.3 | 1153.7 10:33:57:febtest:INFO: 07-06 | XA-000-08-002-003-006-140-00 | 37.7 | 1183.3 10:33:58:febtest:INFO: 14-07 | XA-000-08-002-003-006-052-03 | 37.7 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_07_18-10_31_23 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1195| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ SENSOR_ID: 07332 MODULE_NAME: L7DL500123 M7DL5B0001230B2 42 B MODULE_TYPE: MODULE_LADDER: L7DL500123 MODULE_MODULE: M7DL5B0001230B2 MODULE_SIZE: 42 MODULE_GRADE: B ------------------------------------------------------------ VI_before_Init : ['2.451', '1.5270', '1.849', '2.5440', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0510', '1.850', '2.4260', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '2.0030', '1.850', '0.5330', '0.000', '0.0000', '0.000', '0.0000']