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FEB_1195 05.07.24 14:14:23
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14:14:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:14:23:ST3_Shared:INFO: FEB-Microcable
14:14:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:14:23:febtest:INFO: Testing FEB with SN 1195
14:14:24:smx_tester:INFO: Scanning setup
14:14:24:elinks:INFO: Disabling clock on downlink 0
14:14:24:elinks:INFO: Disabling clock on downlink 1
14:14:24:elinks:INFO: Disabling clock on downlink 2
14:14:24:elinks:INFO: Disabling clock on downlink 3
14:14:24:elinks:INFO: Disabling clock on downlink 4
14:14:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:14:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:24:elinks:INFO: Disabling clock on downlink 0
14:14:24:elinks:INFO: Disabling clock on downlink 1
14:14:24:elinks:INFO: Disabling clock on downlink 2
14:14:24:elinks:INFO: Disabling clock on downlink 3
14:14:24:elinks:INFO: Disabling clock on downlink 4
14:14:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:14:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:14:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:25:elinks:INFO: Disabling clock on downlink 0
14:14:25:elinks:INFO: Disabling clock on downlink 1
14:14:25:elinks:INFO: Disabling clock on downlink 2
14:14:25:elinks:INFO: Disabling clock on downlink 3
14:14:25:elinks:INFO: Disabling clock on downlink 4
14:14:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:14:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:25:elinks:INFO: Disabling clock on downlink 0
14:14:25:elinks:INFO: Disabling clock on downlink 1
14:14:25:elinks:INFO: Disabling clock on downlink 2
14:14:25:elinks:INFO: Disabling clock on downlink 3
14:14:25:elinks:INFO: Disabling clock on downlink 4
14:14:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:14:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:25:elinks:INFO: Disabling clock on downlink 0
14:14:25:elinks:INFO: Disabling clock on downlink 1
14:14:25:elinks:INFO: Disabling clock on downlink 2
14:14:25:elinks:INFO: Disabling clock on downlink 3
14:14:25:elinks:INFO: Disabling clock on downlink 4
14:14:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:14:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:25:setup_element:INFO: Scanning clock phase
14:14:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:25:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:14:25:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:14:25:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:14:25:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:14:25:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:14:25:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:14:25:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:14:25:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:14:25:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:14:25:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:14:25:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:14:25:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:14:25:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:14:25:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:14:25:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:14:25:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:14:25:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:14:25:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
14:14:25:setup_element:INFO: Scanning data phases
14:14:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:31:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:14:31:setup_element:INFO: Eye window for uplink 0 : _________XXXXX__________________________
Data delay found: 31
14:14:31:setup_element:INFO: Eye window for uplink 1 : _____XXXXX______________________________
Data delay found: 27
14:14:31:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
14:14:31:setup_element:INFO: Eye window for uplink 3 : ____XXXXXX______________________________
Data delay found: 26
14:14:31:setup_element:INFO: Eye window for uplink 4 : __XXXXX_________________________________
Data delay found: 24
14:14:31:setup_element:INFO: Eye window for uplink 5 : XXX__________________________________XXX
Data delay found: 19
14:14:31:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
14:14:31:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
14:14:31:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
14:14:31:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
14:14:31:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
14:14:31:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
14:14:31:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
14:14:31:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
14:14:31:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXX________
Data delay found: 9
14:14:31:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
14:14:31:setup_element:INFO: Setting the data phase to 31 for uplink 0
14:14:31:setup_element:INFO: Setting the data phase to 27 for uplink 1
14:14:31:setup_element:INFO: Setting the data phase to 29 for uplink 2
14:14:31:setup_element:INFO: Setting the data phase to 26 for uplink 3
14:14:31:setup_element:INFO: Setting the data phase to 24 for uplink 4
14:14:31:setup_element:INFO: Setting the data phase to 19 for uplink 5
14:14:31:setup_element:INFO: Setting the data phase to 20 for uplink 6
14:14:31:setup_element:INFO: Setting the data phase to 16 for uplink 7
14:14:31:setup_element:INFO: Setting the data phase to 4 for uplink 8
14:14:31:setup_element:INFO: Setting the data phase to 10 for uplink 9
14:14:31:setup_element:INFO: Setting the data phase to 7 for uplink 10
14:14:31:setup_element:INFO: Setting the data phase to 10 for uplink 11
14:14:31:setup_element:INFO: Setting the data phase to 9 for uplink 12
14:14:31:setup_element:INFO: Setting the data phase to 12 for uplink 13
14:14:31:setup_element:INFO: Setting the data phase to 9 for uplink 14
14:14:31:setup_element:INFO: Setting the data phase to 11 for uplink 15
14:14:31:setup_element:INFO: Beginning SMX ASICs map scan
14:14:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:14:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:14:31:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:14:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:14:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:14:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:14:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:14:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:14:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:14:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:14:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:14:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:14:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:14:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:14:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:14:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:14:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:14:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:14:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:14:34:setup_element:INFO: Performing Elink synchronization
14:14:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:14:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:14:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:14:34:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:14:34:febtest:INFO: Init all SMX (CSA): 30
14:14:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:14:49:febtest:INFO: 01-00 | XA-000-08-002-003-006-143-00 | 37.7 | 1147.8
14:14:49:febtest:INFO: 08-01 | XA-000-08-002-003-006-139-00 | 25.1 | 1201.0
14:14:49:febtest:INFO: 03-02 | XA-000-08-002-003-006-142-00 | 40.9 | 1147.8
14:14:50:febtest:INFO: 10-03 | XA-000-08-002-003-006-054-03 | 31.4 | 1171.5
14:14:50:febtest:INFO: 05-04 | XA-000-08-002-003-006-141-00 | 44.1 | 1141.9
14:14:50:febtest:INFO: 12-05 | XA-000-08-002-003-006-053-03 | 50.4 | 1118.1
14:14:50:febtest:INFO: 07-06 | XA-000-08-002-003-006-140-00 | 40.9 | 1147.8
14:14:50:febtest:INFO: 14-07 | XA-000-08-002-003-006-052-03 | 40.9 | 1153.7
14:14:51:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:14:54:ST3_smx:INFO: chip: 1-0 40.898880 C 1165.571835 mV
14:14:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:14:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:14:54:ST3_smx:INFO: Electrons
14:14:54:ST3_smx:INFO: # loops 0
14:14:55:ST3_smx:INFO: # loops 1
14:14:57:ST3_smx:INFO: # loops 2
14:14:58:ST3_smx:INFO: Total # of broken channels: 0
14:14:58:ST3_smx:INFO: List of broken channels: []
14:14:58:ST3_smx:INFO: Total # of broken channels: 0
14:14:58:ST3_smx:INFO: List of broken channels: []
14:15:00:ST3_smx:INFO: chip: 8-1 25.062742 C 1218.600960 mV
14:15:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:00:ST3_smx:INFO: Electrons
14:15:00:ST3_smx:INFO: # loops 0
14:15:02:ST3_smx:INFO: # loops 1
14:15:03:ST3_smx:INFO: # loops 2
14:15:05:ST3_smx:INFO: Total # of broken channels: 0
14:15:05:ST3_smx:INFO: List of broken channels: []
14:15:05:ST3_smx:INFO: Total # of broken channels: 0
14:15:05:ST3_smx:INFO: List of broken channels: []
14:15:07:ST3_smx:INFO: chip: 3-2 37.726682 C 1159.654860 mV
14:15:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:07:ST3_smx:INFO: Electrons
14:15:07:ST3_smx:INFO: # loops 0
14:15:09:ST3_smx:INFO: # loops 1
14:15:10:ST3_smx:INFO: # loops 2
14:15:12:ST3_smx:INFO: Total # of broken channels: 0
14:15:12:ST3_smx:INFO: List of broken channels: []
14:15:12:ST3_smx:INFO: Total # of broken channels: 1
14:15:12:ST3_smx:INFO: List of broken channels: [0]
14:15:14:ST3_smx:INFO: chip: 10-3 31.389742 C 1183.292940 mV
14:15:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:14:ST3_smx:INFO: Electrons
14:15:14:ST3_smx:INFO: # loops 0
14:15:15:ST3_smx:INFO: # loops 1
14:15:17:ST3_smx:INFO: # loops 2
14:15:18:ST3_smx:INFO: Total # of broken channels: 0
14:15:18:ST3_smx:INFO: List of broken channels: []
14:15:18:ST3_smx:INFO: Total # of broken channels: 0
14:15:18:ST3_smx:INFO: List of broken channels: []
14:15:20:ST3_smx:INFO: chip: 5-4 44.073563 C 1153.732915 mV
14:15:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:20:ST3_smx:INFO: Electrons
14:15:20:ST3_smx:INFO: # loops 0
14:15:22:ST3_smx:INFO: # loops 1
14:15:23:ST3_smx:INFO: # loops 2
14:15:25:ST3_smx:INFO: Total # of broken channels: 0
14:15:25:ST3_smx:INFO: List of broken channels: []
14:15:25:ST3_smx:INFO: Total # of broken channels: 0
14:15:25:ST3_smx:INFO: List of broken channels: []
14:15:27:ST3_smx:INFO: chip: 12-5 50.430383 C 1129.995435 mV
14:15:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:27:ST3_smx:INFO: Electrons
14:15:27:ST3_smx:INFO: # loops 0
14:15:28:ST3_smx:INFO: # loops 1
14:15:30:ST3_smx:INFO: # loops 2
14:15:32:ST3_smx:INFO: Total # of broken channels: 0
14:15:32:ST3_smx:INFO: List of broken channels: []
14:15:32:ST3_smx:INFO: Total # of broken channels: 0
14:15:32:ST3_smx:INFO: List of broken channels: []
14:15:33:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
14:15:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:33:ST3_smx:INFO: Electrons
14:15:33:ST3_smx:INFO: # loops 0
14:15:35:ST3_smx:INFO: # loops 1
14:15:36:ST3_smx:INFO: # loops 2
14:15:38:ST3_smx:INFO: Total # of broken channels: 0
14:15:38:ST3_smx:INFO: List of broken channels: []
14:15:38:ST3_smx:INFO: Total # of broken channels: 0
14:15:38:ST3_smx:INFO: List of broken channels: []
14:15:40:ST3_smx:INFO: chip: 14-7 40.898880 C 1171.483840 mV
14:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:40:ST3_smx:INFO: Electrons
14:15:40:ST3_smx:INFO: # loops 0
14:15:41:ST3_smx:INFO: # loops 1
14:15:43:ST3_smx:INFO: # loops 2
14:15:45:ST3_smx:INFO: Total # of broken channels: 0
14:15:45:ST3_smx:INFO: List of broken channels: []
14:15:45:ST3_smx:INFO: Total # of broken channels: 0
14:15:45:ST3_smx:INFO: List of broken channels: []
14:15:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:15:45:febtest:INFO: 01-00 | XA-000-08-002-003-006-143-00 | 37.7 | 1183.3
14:15:45:febtest:INFO: 08-01 | XA-000-08-002-003-006-139-00 | 25.1 | 1242.0
14:15:46:febtest:INFO: 03-02 | XA-000-08-002-003-006-142-00 | 40.9 | 1183.3
14:15:46:febtest:INFO: 10-03 | XA-000-08-002-003-006-054-03 | 34.6 | 1206.9
14:15:46:febtest:INFO: 05-04 | XA-000-08-002-003-006-141-00 | 44.1 | 1177.4
14:15:46:febtest:INFO: 12-05 | XA-000-08-002-003-006-053-03 | 50.4 | 1153.7
14:15:46:febtest:INFO: 07-06 | XA-000-08-002-003-006-140-00 | 44.1 | 1177.4
14:15:47:febtest:INFO: 14-07 | XA-000-08-002-003-006-052-03 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_05-14_14_23
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1195| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4940', '1.849', '2.4470', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0330', '1.850', '2.3720', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0020', '1.850', '0.5327', '0.000', '0.0000', '0.000', '0.0000']