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FEB_1199 28.06.24 09:21:55
Info
09:21:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:21:55:ST3_Shared:INFO: FEB-Microcable
09:21:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:21:55:febtest:INFO: Testing FEB with SN 1199
09:21:56:smx_tester:INFO: Scanning setup
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:21:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:21:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:21:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:57:elinks:INFO: Disabling clock on downlink 0
09:21:57:elinks:INFO: Disabling clock on downlink 1
09:21:57:elinks:INFO: Disabling clock on downlink 2
09:21:57:elinks:INFO: Disabling clock on downlink 3
09:21:57:elinks:INFO: Disabling clock on downlink 4
09:21:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:21:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:57:elinks:INFO: Disabling clock on downlink 0
09:21:57:elinks:INFO: Disabling clock on downlink 1
09:21:57:elinks:INFO: Disabling clock on downlink 2
09:21:57:elinks:INFO: Disabling clock on downlink 3
09:21:57:elinks:INFO: Disabling clock on downlink 4
09:21:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:21:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:57:elinks:INFO: Disabling clock on downlink 0
09:21:57:elinks:INFO: Disabling clock on downlink 1
09:21:57:elinks:INFO: Disabling clock on downlink 2
09:21:57:elinks:INFO: Disabling clock on downlink 3
09:21:57:elinks:INFO: Disabling clock on downlink 4
09:21:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:21:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:57:setup_element:INFO: Scanning clock phase
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:21:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:21:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:21:57:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
09:21:57:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
09:21:57:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:21:57:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:21:57:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
09:21:57:setup_element:INFO: Scanning data phases
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:21:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:22:03:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:22:03:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXX_______________________
Data delay found: 33
09:22:03:setup_element:INFO: Eye window for uplink 1 : _______XXXX_____________________________
Data delay found: 28
09:22:03:setup_element:INFO: Eye window for uplink 2 : ______XXXXX___________XXXXXXXXXXXXXXXXXX
Data delay found: 16
09:22:03:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_____________XXXXXXXXXXXXXXXXXX
Data delay found: 15
09:22:03:setup_element:INFO: Eye window for uplink 4 : XXXXX___________________________________
Data delay found: 22
09:22:03:setup_element:INFO: Eye window for uplink 5 : X__________________________________XXXXX
Data delay found: 17
09:22:03:setup_element:INFO: Eye window for uplink 6 : X___________________________________XXXX
Data delay found: 18
09:22:03:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXXX___
Data delay found: 14
09:22:03:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
09:22:03:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXX________
Data delay found: 9
09:22:03:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
09:22:03:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______
Data delay found: 10
09:22:03:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXXX_____
Data delay found: 11
09:22:03:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
09:22:03:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
09:22:03:setup_element:INFO: Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
09:22:03:setup_element:INFO: Setting the data phase to 33 for uplink 0
09:22:03:setup_element:INFO: Setting the data phase to 28 for uplink 1
09:22:03:setup_element:INFO: Setting the data phase to 16 for uplink 2
09:22:03:setup_element:INFO: Setting the data phase to 15 for uplink 3
09:22:03:setup_element:INFO: Setting the data phase to 22 for uplink 4
09:22:03:setup_element:INFO: Setting the data phase to 17 for uplink 5
09:22:03:setup_element:INFO: Setting the data phase to 18 for uplink 6
09:22:03:setup_element:INFO: Setting the data phase to 14 for uplink 7
09:22:03:setup_element:INFO: Setting the data phase to 4 for uplink 8
09:22:03:setup_element:INFO: Setting the data phase to 9 for uplink 9
09:22:03:setup_element:INFO: Setting the data phase to 6 for uplink 10
09:22:03:setup_element:INFO: Setting the data phase to 10 for uplink 11
09:22:03:setup_element:INFO: Setting the data phase to 11 for uplink 12
09:22:03:setup_element:INFO: Setting the data phase to 14 for uplink 13
09:22:03:setup_element:INFO: Setting the data phase to 10 for uplink 14
09:22:03:setup_element:INFO: Setting the data phase to 11 for uplink 15
09:22:03:setup_element:INFO: Beginning SMX ASICs map scan
09:22:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:22:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:22:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:22:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:22:03:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:22:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:22:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:22:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:22:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:22:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:22:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:22:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:22:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:22:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:22:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:22:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:22:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:22:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:22:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:22:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:22:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:22:06:setup_element:INFO: Performing Elink synchronization
09:22:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:22:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:22:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:22:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:22:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:22:06:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:22:06:febtest:INFO: Init all SMX (CSA): 30
09:22:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:22:21:febtest:INFO: 01-00 | XA-000-08-002-002-007-213-07 | 25.1 | 1183.3
09:22:21:febtest:INFO: 08-01 | XA-000-08-002-000-006-178-08 | 40.9 | 1135.9
09:22:21:febtest:INFO: 03-02 | XA-000-08-002-003-006-026-13 | 37.7 | 1165.6
09:22:22:febtest:INFO: 10-03 | XA-000-08-002-000-006-172-15 | 37.7 | 1130.0
09:22:22:febtest:INFO: 05-04 | XA-000-08-002-003-006-022-13 | 40.9 | 1153.7
09:22:22:febtest:INFO: 12-05 | XA-000-08-002-000-006-163-15 | 37.7 | 1141.9
09:22:22:febtest:INFO: 07-06 | XA-000-08-002-003-006-024-13 | 47.3 | 1135.9
09:22:23:febtest:INFO: 14-07 | XA-000-08-002-000-006-169-15 | 28.2 | 1183.3
09:22:24:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:22:25:ST3_smx:INFO: chip: 1-0 25.062742 C 1195.082160 mV
09:22:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:26:ST3_smx:INFO: Electrons
09:22:26:ST3_smx:INFO: # loops 0
09:22:27:ST3_smx:INFO: # loops 1
09:22:29:ST3_smx:INFO: # loops 2
09:22:31:ST3_smx:INFO: Total # of broken channels: 0
09:22:31:ST3_smx:INFO: List of broken channels: []
09:22:31:ST3_smx:INFO: Total # of broken channels: 0
09:22:31:ST3_smx:INFO: List of broken channels: []
09:22:32:ST3_smx:INFO: chip: 8-1 40.898880 C 1147.806000 mV
09:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:32:ST3_smx:INFO: Electrons
09:22:32:ST3_smx:INFO: # loops 0
09:22:34:ST3_smx:INFO: # loops 1
09:22:36:ST3_smx:INFO: # loops 2
09:22:37:ST3_smx:INFO: Total # of broken channels: 0
09:22:37:ST3_smx:INFO: List of broken channels: []
09:22:37:ST3_smx:INFO: Total # of broken channels: 0
09:22:37:ST3_smx:INFO: List of broken channels: []
09:22:39:ST3_smx:INFO: chip: 3-2 37.726682 C 1177.390875 mV
09:22:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:39:ST3_smx:INFO: Electrons
09:22:39:ST3_smx:INFO: # loops 0
09:22:41:ST3_smx:INFO: # loops 1
09:22:42:ST3_smx:INFO: # loops 2
09:22:44:ST3_smx:INFO: Total # of broken channels: 0
09:22:44:ST3_smx:INFO: List of broken channels: []
09:22:44:ST3_smx:INFO: Total # of broken channels: 0
09:22:44:ST3_smx:INFO: List of broken channels: []
09:22:45:ST3_smx:INFO: chip: 10-3 37.726682 C 1141.874115 mV
09:22:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:45:ST3_smx:INFO: Electrons
09:22:45:ST3_smx:INFO: # loops 0
09:22:47:ST3_smx:INFO: # loops 1
09:22:49:ST3_smx:INFO: # loops 2
09:22:50:ST3_smx:INFO: Total # of broken channels: 0
09:22:50:ST3_smx:INFO: List of broken channels: []
09:22:50:ST3_smx:INFO: Total # of broken channels: 0
09:22:50:ST3_smx:INFO: List of broken channels: []
09:22:52:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
09:22:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:52:ST3_smx:INFO: Electrons
09:22:52:ST3_smx:INFO: # loops 0
09:22:54:ST3_smx:INFO: # loops 1
09:22:56:ST3_smx:INFO: # loops 2
09:22:57:ST3_smx:INFO: Total # of broken channels: 0
09:22:57:ST3_smx:INFO: List of broken channels: []
09:22:57:ST3_smx:INFO: Total # of broken channels: 0
09:22:57:ST3_smx:INFO: List of broken channels: []
09:22:59:ST3_smx:INFO: chip: 12-5 37.726682 C 1153.732915 mV
09:22:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:59:ST3_smx:INFO: Electrons
09:22:59:ST3_smx:INFO: # loops 0
09:23:01:ST3_smx:INFO: # loops 1
09:23:02:ST3_smx:INFO: # loops 2
09:23:04:ST3_smx:INFO: Total # of broken channels: 0
09:23:04:ST3_smx:INFO: List of broken channels: []
09:23:04:ST3_smx:INFO: Total # of broken channels: 0
09:23:04:ST3_smx:INFO: List of broken channels: []
09:23:06:ST3_smx:INFO: chip: 7-6 47.250730 C 1147.806000 mV
09:23:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:23:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:23:06:ST3_smx:INFO: Electrons
09:23:06:ST3_smx:INFO: # loops 0
09:23:07:ST3_smx:INFO: # loops 1
09:23:09:ST3_smx:INFO: # loops 2
09:23:11:ST3_smx:INFO: Total # of broken channels: 0
09:23:11:ST3_smx:INFO: List of broken channels: []
09:23:11:ST3_smx:INFO: Total # of broken channels: 0
09:23:11:ST3_smx:INFO: List of broken channels: []
09:23:12:ST3_smx:INFO: chip: 14-7 31.389742 C 1195.082160 mV
09:23:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:23:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:23:12:ST3_smx:INFO: Electrons
09:23:12:ST3_smx:INFO: # loops 0
09:23:14:ST3_smx:INFO: # loops 1
09:23:16:ST3_smx:INFO: # loops 2
09:23:17:ST3_smx:INFO: Total # of broken channels: 0
09:23:17:ST3_smx:INFO: List of broken channels: []
09:23:17:ST3_smx:INFO: Total # of broken channels: 0
09:23:17:ST3_smx:INFO: List of broken channels: []
09:23:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:23:18:febtest:INFO: 01-00 | XA-000-08-002-002-007-213-07 | 25.1 | 1218.6
09:23:18:febtest:INFO: 08-01 | XA-000-08-002-000-006-178-08 | 40.9 | 1171.5
09:23:18:febtest:INFO: 03-02 | XA-000-08-002-003-006-026-13 | 34.6 | 1195.1
09:23:18:febtest:INFO: 10-03 | XA-000-08-002-000-006-172-15 | 40.9 | 1165.6
09:23:18:febtest:INFO: 05-04 | XA-000-08-002-003-006-022-13 | 40.9 | 1183.3
09:23:19:febtest:INFO: 12-05 | XA-000-08-002-000-006-163-15 | 40.9 | 1171.5
09:23:19:febtest:INFO: 07-06 | XA-000-08-002-003-006-024-13 | 50.4 | 1165.6
09:23:19:febtest:INFO: 14-07 | XA-000-08-002-000-006-169-15 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_28-09_21_55
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
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| FEB_SN : 1199| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5200', '1.850', '1.8450', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9740', '1.850', '2.3390', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9930', '1.850', '0.5287', '0.000', '0.0000', '0.000', '0.0000']