13:17:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:17:02:ST3_Shared:INFO:	                         FEB-Sensor                         
13:17:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:17:12:ST3_ModuleSelector:INFO:	M4DL4T2001172A2
13:17:12:ST3_ModuleSelector:INFO:	20264
13:17:12:febtest:INFO:	Testing FEB with SN 1210
13:17:13:smx_tester:INFO:	Scanning setup
13:17:13:elinks:INFO:	Disabling clock on downlink 0
13:17:13:elinks:INFO:	Disabling clock on downlink 1
13:17:13:elinks:INFO:	Disabling clock on downlink 2
13:17:13:elinks:INFO:	Disabling clock on downlink 3
13:17:13:elinks:INFO:	Disabling clock on downlink 4
13:17:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:17:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:17:14:elinks:INFO:	Disabling clock on downlink 0
13:17:14:elinks:INFO:	Disabling clock on downlink 1
13:17:14:elinks:INFO:	Disabling clock on downlink 2
13:17:14:elinks:INFO:	Disabling clock on downlink 3
13:17:14:elinks:INFO:	Disabling clock on downlink 4
13:17:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:17:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:17:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:17:14:elinks:INFO:	Disabling clock on downlink 0
13:17:14:elinks:INFO:	Disabling clock on downlink 1
13:17:14:elinks:INFO:	Disabling clock on downlink 2
13:17:14:elinks:INFO:	Disabling clock on downlink 3
13:17:14:elinks:INFO:	Disabling clock on downlink 4
13:17:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:17:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:17:14:elinks:INFO:	Disabling clock on downlink 0
13:17:14:elinks:INFO:	Disabling clock on downlink 1
13:17:14:elinks:INFO:	Disabling clock on downlink 2
13:17:14:elinks:INFO:	Disabling clock on downlink 3
13:17:14:elinks:INFO:	Disabling clock on downlink 4
13:17:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:17:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:17:14:elinks:INFO:	Disabling clock on downlink 0
13:17:14:elinks:INFO:	Disabling clock on downlink 1
13:17:14:elinks:INFO:	Disabling clock on downlink 2
13:17:14:elinks:INFO:	Disabling clock on downlink 3
13:17:14:elinks:INFO:	Disabling clock on downlink 4
13:17:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:17:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:17:14:setup_element:INFO:	Scanning clock phase
13:17:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:17:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:17:15:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:17:15:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:17:15:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:17:15:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:17:15:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:17:15:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 12: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 13: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:17:15:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
13:17:15:setup_element:INFO:	Scanning data phases
13:17:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:17:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:17:20:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:17:20:setup_element:INFO:	Eye window for uplink 0 : _________XXXXXXX________________________
Data delay found: 32
13:17:20:setup_element:INFO:	Eye window for uplink 1 : _____XXXXXX_____________________________
Data delay found: 27
13:17:20:setup_element:INFO:	Eye window for uplink 2 : _______XXXXXXXX_________________________
Data delay found: 30
13:17:20:setup_element:INFO:	Eye window for uplink 3 : ___XXXXXXXXX____________________________
Data delay found: 27
13:17:20:setup_element:INFO:	Eye window for uplink 4 : _XXXXXXXX_______________________________
Data delay found: 24
13:17:20:setup_element:INFO:	Eye window for uplink 5 : XXXXX_______________________________XXXX
Data delay found: 20
13:17:20:setup_element:INFO:	Eye window for uplink 6 : XXX________________________________XXXXX
Data delay found: 18
13:17:20:setup_element:INFO:	Eye window for uplink 7 : _______________________________XXXXXXX__
Data delay found: 14
13:17:20:setup_element:INFO:	Eye window for uplink 8 : _______________________XXXXXX___________
Data delay found: 5
13:17:20:setup_element:INFO:	Eye window for uplink 9 : ___________________________XXXXXXX______
Data delay found: 10
13:17:20:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXXXXX_______
Data delay found: 8
13:17:20:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXXXX___
Data delay found: 12
13:17:20:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXXX_____XX
Data delay found: 13
13:17:20:setup_element:INFO:	Eye window for uplink 13: _____________________________XXXXXXXX_XX
Data delay found: 14
13:17:20:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXXX_______
Data delay found: 9
13:17:20:setup_element:INFO:	Eye window for uplink 15: ___________________________XXXXXXXX_____
Data delay found: 10
13:17:20:setup_element:INFO:	Setting the data phase to 32 for uplink 0
13:17:20:setup_element:INFO:	Setting the data phase to 27 for uplink 1
13:17:20:setup_element:INFO:	Setting the data phase to 30 for uplink 2
13:17:20:setup_element:INFO:	Setting the data phase to 27 for uplink 3
13:17:20:setup_element:INFO:	Setting the data phase to 24 for uplink 4
13:17:20:setup_element:INFO:	Setting the data phase to 20 for uplink 5
13:17:20:setup_element:INFO:	Setting the data phase to 18 for uplink 6
13:17:20:setup_element:INFO:	Setting the data phase to 14 for uplink 7
13:17:20:setup_element:INFO:	Setting the data phase to 5 for uplink 8
13:17:20:setup_element:INFO:	Setting the data phase to 10 for uplink 9
13:17:20:setup_element:INFO:	Setting the data phase to 8 for uplink 10
13:17:20:setup_element:INFO:	Setting the data phase to 12 for uplink 11
13:17:20:setup_element:INFO:	Setting the data phase to 13 for uplink 12
13:17:20:setup_element:INFO:	Setting the data phase to 14 for uplink 13
13:17:20:setup_element:INFO:	Setting the data phase to 9 for uplink 14
13:17:20:setup_element:INFO:	Setting the data phase to 10 for uplink 15
13:17:20:setup_element:INFO:	Beginning SMX ASICs map scan
13:17:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:17:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:17:20:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:17:20:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:17:20:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:17:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:17:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:17:21:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:17:21:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:17:21:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:17:21:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:17:21:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:17:21:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:17:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:17:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:17:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:17:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:17:22:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:17:22:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:17:22:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:17:22:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:17:23:setup_element:INFO:	Performing Elink synchronization
13:17:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:17:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:17:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:17:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:17:23:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:17:23:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x0
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:17:24:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:17:24:febtest:INFO:	Init all SMX (CSA): 30
13:17:38:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:17:38:febtest:INFO:	01-00 | XA-000-08-002-003-006-006-10 |  31.4 | 1159.7
13:17:38:febtest:INFO:	08-01 | XA-000-08-002-003-006-007-10 |  31.4 | 1171.5
13:17:38:febtest:INFO:	03-02 | XA-000-08-002-003-006-016-13 |  34.6 | 1165.6
13:17:39:febtest:INFO:	10-03 | XA-000-08-002-002-008-251-13 |  28.2 | 1177.4
13:17:39:febtest:INFO:	05-04 | XA-000-08-002-002-008-250-13 |  56.8 | 1094.2
13:17:39:febtest:INFO:	12-05 | XA-000-08-002-002-008-231-10 |  28.2 | 1183.3
13:17:39:febtest:INFO:	07-06 | XA-000-08-002-003-006-011-10 |  44.1 | 1130.0
13:17:40:febtest:INFO:	14-07 | XA-000-08-002-003-006-014-10 |  56.8 | 1082.3
13:17:41:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:17:43:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1171.483840 mV
13:17:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:43:ST3_smx:INFO:		Electrons
13:17:43:ST3_smx:INFO:	# loops 0
13:17:44:ST3_smx:INFO:	# loops 1
13:17:46:ST3_smx:INFO:	# loops 2
13:17:48:ST3_smx:INFO:	# loops 3
13:17:49:ST3_smx:INFO:	# loops 4
13:17:51:ST3_smx:INFO:	Total # of broken channels: 0
13:17:51:ST3_smx:INFO:	List of broken channels: []
13:17:51:ST3_smx:INFO:	Total # of broken channels: 0
13:17:51:ST3_smx:INFO:	List of broken channels: []
13:17:53:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1183.292940 mV
13:17:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:17:53:ST3_smx:INFO:		Electrons
13:17:53:ST3_smx:INFO:	# loops 0
13:17:55:ST3_smx:INFO:	# loops 1
13:17:56:ST3_smx:INFO:	# loops 2
13:17:58:ST3_smx:INFO:	# loops 3
13:17:59:ST3_smx:INFO:	# loops 4
13:18:01:ST3_smx:INFO:	Total # of broken channels: 0
13:18:01:ST3_smx:INFO:	List of broken channels: []
13:18:01:ST3_smx:INFO:	Total # of broken channels: 0
13:18:01:ST3_smx:INFO:	List of broken channels: []
13:18:03:ST3_smx:INFO:	chip: 3-2 	 37.726682 C 	 1171.483840 mV
13:18:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:03:ST3_smx:INFO:		Electrons
13:18:03:ST3_smx:INFO:	# loops 0
13:18:04:ST3_smx:INFO:	# loops 1
13:18:06:ST3_smx:INFO:	# loops 2
13:18:07:ST3_smx:INFO:	# loops 3
13:18:09:ST3_smx:INFO:	# loops 4
13:18:11:ST3_smx:INFO:	Total # of broken channels: 0
13:18:11:ST3_smx:INFO:	List of broken channels: []
13:18:11:ST3_smx:INFO:	Total # of broken channels: 0
13:18:11:ST3_smx:INFO:	List of broken channels: []
13:18:12:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1189.190035 mV
13:18:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:12:ST3_smx:INFO:		Electrons
13:18:12:ST3_smx:INFO:	# loops 0
13:18:14:ST3_smx:INFO:	# loops 1
13:18:16:ST3_smx:INFO:	# loops 2
13:18:17:ST3_smx:INFO:	# loops 3
13:18:19:ST3_smx:INFO:	# loops 4
13:18:20:ST3_smx:INFO:	Total # of broken channels: 0
13:18:20:ST3_smx:INFO:	List of broken channels: []
13:18:20:ST3_smx:INFO:	Total # of broken channels: 1
13:18:20:ST3_smx:INFO:	List of broken channels: [127]
13:18:22:ST3_smx:INFO:	chip: 5-4 	 63.173842 C 	 1100.211760 mV
13:18:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:22:ST3_smx:INFO:		Electrons
13:18:22:ST3_smx:INFO:	# loops 0
13:18:24:ST3_smx:INFO:	# loops 1
13:18:25:ST3_smx:INFO:	# loops 2
13:18:27:ST3_smx:INFO:	# loops 3
13:18:28:ST3_smx:INFO:	# loops 4
13:18:30:ST3_smx:INFO:	Total # of broken channels: 0
13:18:30:ST3_smx:INFO:	List of broken channels: []
13:18:30:ST3_smx:INFO:	Total # of broken channels: 0
13:18:30:ST3_smx:INFO:	List of broken channels: []
13:18:32:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1195.082160 mV
13:18:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:32:ST3_smx:INFO:		Electrons
13:18:32:ST3_smx:INFO:	# loops 0
13:18:33:ST3_smx:INFO:	# loops 1
13:18:35:ST3_smx:INFO:	# loops 2
13:18:37:ST3_smx:INFO:	# loops 3
13:18:38:ST3_smx:INFO:	# loops 4
13:18:40:ST3_smx:INFO:	Total # of broken channels: 0
13:18:40:ST3_smx:INFO:	List of broken channels: []
13:18:40:ST3_smx:INFO:	Total # of broken channels: 0
13:18:40:ST3_smx:INFO:	List of broken channels: []
13:18:41:ST3_smx:INFO:	chip: 7-6 	 53.612520 C 	 1135.937260 mV
13:18:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:41:ST3_smx:INFO:		Electrons
13:18:41:ST3_smx:INFO:	# loops 0
13:18:43:ST3_smx:INFO:	# loops 1
13:18:45:ST3_smx:INFO:	# loops 2
13:18:46:ST3_smx:INFO:	# loops 3
13:18:48:ST3_smx:INFO:	# loops 4
13:18:49:ST3_smx:INFO:	Total # of broken channels: 0
13:18:49:ST3_smx:INFO:	List of broken channels: []
13:18:49:ST3_smx:INFO:	Total # of broken channels: 1
13:18:49:ST3_smx:INFO:	List of broken channels: [66]
13:18:51:ST3_smx:INFO:	chip: 14-7 	 63.173842 C 	 1094.240115 mV
13:18:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:51:ST3_smx:INFO:		Electrons
13:18:51:ST3_smx:INFO:	# loops 0
13:18:53:ST3_smx:INFO:	# loops 1
13:18:54:ST3_smx:INFO:	# loops 2
13:18:56:ST3_smx:INFO:	# loops 3
13:18:57:ST3_smx:INFO:	# loops 4
13:18:59:ST3_smx:INFO:	Total # of broken channels: 0
13:18:59:ST3_smx:INFO:	List of broken channels: []
13:18:59:ST3_smx:INFO:	Total # of broken channels: 2
13:18:59:ST3_smx:INFO:	List of broken channels: [120, 126]
13:18:59:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:19:00:febtest:INFO:	01-00 | XA-000-08-002-003-006-006-10 |  40.9 | 1189.2
13:19:00:febtest:INFO:	08-01 | XA-000-08-002-003-006-007-10 |  37.7 | 1206.9
13:19:00:febtest:INFO:	03-02 | XA-000-08-002-003-006-016-13 |  44.1 | 1189.2
13:19:00:febtest:INFO:	10-03 | XA-000-08-002-002-008-251-13 |  37.7 | 1206.9
13:19:01:febtest:INFO:	05-04 | XA-000-08-002-002-008-250-13 |  66.4 | 1118.1
13:19:01:febtest:INFO:	12-05 | XA-000-08-002-002-008-231-10 |  34.6 | 1218.6
13:19:01:febtest:INFO:	07-06 | XA-000-08-002-003-006-011-10 |  56.8 | 1153.7
13:19:01:febtest:INFO:	14-07 | XA-000-08-002-003-006-014-10 |  66.4 | 1112.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_19-13_17_02
OPERATOR  : Oleksandr S.; Ralf K.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1210| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 20264 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DL4T2001172A2
LADDER_NAME: L4DL400117
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9320', '1.849', '2.0560', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0830', '1.850', '2.4110', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0090', '1.850', '0.5300', '0.000', '0.0000', '0.000', '0.0000']