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FEB_1216 07.08.24 08:07:46
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08:07:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:07:46:ST3_Shared:INFO: FEB-Sensor
08:07:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:08:03:ST3_ModuleSelector:INFO: M7DL5B4001234B2
08:08:03:ST3_ModuleSelector:INFO: 18094
08:08:03:febtest:INFO: Testing FEB with SN 1216
08:08:04:smx_tester:INFO: Scanning setup
08:08:04:elinks:INFO: Disabling clock on downlink 0
08:08:04:elinks:INFO: Disabling clock on downlink 1
08:08:04:elinks:INFO: Disabling clock on downlink 2
08:08:04:elinks:INFO: Disabling clock on downlink 3
08:08:04:elinks:INFO: Disabling clock on downlink 4
08:08:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:08:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:04:elinks:INFO: Disabling clock on downlink 0
08:08:04:elinks:INFO: Disabling clock on downlink 1
08:08:04:elinks:INFO: Disabling clock on downlink 2
08:08:04:elinks:INFO: Disabling clock on downlink 3
08:08:04:elinks:INFO: Disabling clock on downlink 4
08:08:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:08:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:08:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:05:elinks:INFO: Disabling clock on downlink 0
08:08:05:elinks:INFO: Disabling clock on downlink 1
08:08:05:elinks:INFO: Disabling clock on downlink 2
08:08:05:elinks:INFO: Disabling clock on downlink 3
08:08:05:elinks:INFO: Disabling clock on downlink 4
08:08:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:05:elinks:INFO: Disabling clock on downlink 0
08:08:05:elinks:INFO: Disabling clock on downlink 1
08:08:05:elinks:INFO: Disabling clock on downlink 2
08:08:05:elinks:INFO: Disabling clock on downlink 3
08:08:05:elinks:INFO: Disabling clock on downlink 4
08:08:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:08:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:05:elinks:INFO: Disabling clock on downlink 0
08:08:05:elinks:INFO: Disabling clock on downlink 1
08:08:05:elinks:INFO: Disabling clock on downlink 2
08:08:05:elinks:INFO: Disabling clock on downlink 3
08:08:05:elinks:INFO: Disabling clock on downlink 4
08:08:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:08:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:05:setup_element:INFO: Scanning clock phase
08:08:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:06:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:08:06:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:08:06:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:08:06:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:08:06:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:08:06:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:08:06:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:08:06:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:08:06:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:08:06:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:08:06:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:08:06:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:08:06:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:08:06:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:08:06:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:08:06:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:08:06:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:08:06:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
08:08:06:setup_element:INFO: Scanning data phases
08:08:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:11:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:08:11:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
08:08:11:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
08:08:11:setup_element:INFO: Eye window for uplink 2 : _____XXXXXX_____________________________
Data delay found: 27
08:08:11:setup_element:INFO: Eye window for uplink 3 : __XXXXXX________________________________
Data delay found: 24
08:08:11:setup_element:INFO: Eye window for uplink 4 : __XXXXXX________________________________
Data delay found: 24
08:08:11:setup_element:INFO: Eye window for uplink 5 : XXX___________________________________XX
Data delay found: 20
08:08:11:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
08:08:11:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
08:08:11:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
08:08:11:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
08:08:11:setup_element:INFO: Eye window for uplink 10: __________________________XXXX__________
Data delay found: 7
08:08:11:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
08:08:11:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
08:08:11:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
08:08:11:setup_element:INFO: Eye window for uplink 14: _________________________________XXX____
Data delay found: 14
08:08:11:setup_element:INFO: Eye window for uplink 15: __________________________________XXXX__
Data delay found: 15
08:08:11:setup_element:INFO: Setting the data phase to 33 for uplink 0
08:08:11:setup_element:INFO: Setting the data phase to 28 for uplink 1
08:08:11:setup_element:INFO: Setting the data phase to 27 for uplink 2
08:08:11:setup_element:INFO: Setting the data phase to 24 for uplink 3
08:08:11:setup_element:INFO: Setting the data phase to 24 for uplink 4
08:08:11:setup_element:INFO: Setting the data phase to 20 for uplink 5
08:08:11:setup_element:INFO: Setting the data phase to 21 for uplink 6
08:08:11:setup_element:INFO: Setting the data phase to 17 for uplink 7
08:08:11:setup_element:INFO: Setting the data phase to 6 for uplink 8
08:08:11:setup_element:INFO: Setting the data phase to 11 for uplink 9
08:08:11:setup_element:INFO: Setting the data phase to 7 for uplink 10
08:08:11:setup_element:INFO: Setting the data phase to 11 for uplink 11
08:08:11:setup_element:INFO: Setting the data phase to 9 for uplink 12
08:08:11:setup_element:INFO: Setting the data phase to 12 for uplink 13
08:08:11:setup_element:INFO: Setting the data phase to 14 for uplink 14
08:08:11:setup_element:INFO: Setting the data phase to 15 for uplink 15
08:08:11:setup_element:INFO: Beginning SMX ASICs map scan
08:08:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:08:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:08:11:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:08:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:08:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:08:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:08:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:08:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:08:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:08:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:08:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:08:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:08:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:08:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:08:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:08:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:08:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:08:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:08:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:08:14:setup_element:INFO: Performing Elink synchronization
08:08:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:08:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:08:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:08:14:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x0
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x1
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x2
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x3
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x4
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x5
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x6
08:08:15:ST3_emu_feb:DEBUG: Chip address: 0x7
08:08:15:febtest:INFO: Init all SMX (CSA): 30
08:08:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:08:29:febtest:INFO: 01-00 | XA-000-08-002-003-006-115-06 | 34.6 | 1135.9
08:08:29:febtest:INFO: 08-01 | XA-000-08-002-003-006-117-06 | 25.1 | 1165.6
08:08:29:febtest:INFO: 03-02 | XA-000-08-002-003-006-114-06 | 34.6 | 1135.9
08:08:29:febtest:INFO: 10-03 | XA-000-08-002-003-006-118-06 | 21.9 | 1183.3
08:08:30:febtest:INFO: 05-04 | XA-000-08-002-003-006-113-06 | 37.7 | 1135.9
08:08:30:febtest:INFO: 12-05 | XA-000-08-002-003-006-119-06 | 25.1 | 1165.6
08:08:30:febtest:INFO: 07-06 | XA-000-08-002-003-006-112-06 | 18.7 | 1195.1
08:08:30:febtest:INFO: 14-07 | XA-000-08-002-003-006-125-06 | 40.9 | 1124.0
08:08:31:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:08:34:ST3_smx:INFO: chip: 1-0 34.556970 C 1147.806000 mV
08:08:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:34:ST3_smx:INFO: Electrons
08:08:34:ST3_smx:INFO: # loops 0
08:08:35:ST3_smx:INFO: # loops 1
08:08:37:ST3_smx:INFO: # loops 2
08:08:38:ST3_smx:INFO: # loops 3
08:08:40:ST3_smx:INFO: # loops 4
08:08:41:ST3_smx:INFO: Total # of broken channels: 0
08:08:41:ST3_smx:INFO: List of broken channels: []
08:08:41:ST3_smx:INFO: Total # of broken channels: 0
08:08:41:ST3_smx:INFO: List of broken channels: []
08:08:43:ST3_smx:INFO: chip: 8-1 25.062742 C 1177.390875 mV
08:08:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:43:ST3_smx:INFO: Electrons
08:08:43:ST3_smx:INFO: # loops 0
08:08:45:ST3_smx:INFO: # loops 1
08:08:46:ST3_smx:INFO: # loops 2
08:08:48:ST3_smx:INFO: # loops 3
08:08:49:ST3_smx:INFO: # loops 4
08:08:51:ST3_smx:INFO: Total # of broken channels: 0
08:08:51:ST3_smx:INFO: List of broken channels: []
08:08:51:ST3_smx:INFO: Total # of broken channels: 0
08:08:51:ST3_smx:INFO: List of broken channels: []
08:08:52:ST3_smx:INFO: chip: 3-2 34.556970 C 1147.806000 mV
08:08:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:52:ST3_smx:INFO: Electrons
08:08:52:ST3_smx:INFO: # loops 0
08:08:54:ST3_smx:INFO: # loops 1
08:08:55:ST3_smx:INFO: # loops 2
08:08:57:ST3_smx:INFO: # loops 3
08:08:58:ST3_smx:INFO: # loops 4
08:09:00:ST3_smx:INFO: Total # of broken channels: 0
08:09:00:ST3_smx:INFO: List of broken channels: []
08:09:00:ST3_smx:INFO: Total # of broken channels: 2
08:09:00:ST3_smx:INFO: List of broken channels: [58, 76]
08:09:02:ST3_smx:INFO: chip: 10-3 21.902970 C 1195.082160 mV
08:09:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:02:ST3_smx:INFO: Electrons
08:09:02:ST3_smx:INFO: # loops 0
08:09:04:ST3_smx:INFO: # loops 1
08:09:05:ST3_smx:INFO: # loops 2
08:09:07:ST3_smx:INFO: # loops 3
08:09:08:ST3_smx:INFO: # loops 4
08:09:10:ST3_smx:INFO: Total # of broken channels: 0
08:09:10:ST3_smx:INFO: List of broken channels: []
08:09:10:ST3_smx:INFO: Total # of broken channels: 0
08:09:10:ST3_smx:INFO: List of broken channels: []
08:09:11:ST3_smx:INFO: chip: 5-4 37.726682 C 1147.806000 mV
08:09:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:11:ST3_smx:INFO: Electrons
08:09:11:ST3_smx:INFO: # loops 0
08:09:13:ST3_smx:INFO: # loops 1
08:09:14:ST3_smx:INFO: # loops 2
08:09:16:ST3_smx:INFO: # loops 3
08:09:17:ST3_smx:INFO: # loops 4
08:09:19:ST3_smx:INFO: Total # of broken channels: 0
08:09:19:ST3_smx:INFO: List of broken channels: []
08:09:19:ST3_smx:INFO: Total # of broken channels: 0
08:09:19:ST3_smx:INFO: List of broken channels: []
08:09:21:ST3_smx:INFO: chip: 12-5 28.225000 C 1177.390875 mV
08:09:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:21:ST3_smx:INFO: Electrons
08:09:21:ST3_smx:INFO: # loops 0
08:09:22:ST3_smx:INFO: # loops 1
08:09:24:ST3_smx:INFO: # loops 2
08:09:25:ST3_smx:INFO: # loops 3
08:09:27:ST3_smx:INFO: # loops 4
08:09:28:ST3_smx:INFO: Total # of broken channels: 0
08:09:28:ST3_smx:INFO: List of broken channels: []
08:09:28:ST3_smx:INFO: Total # of broken channels: 0
08:09:28:ST3_smx:INFO: List of broken channels: []
08:09:30:ST3_smx:INFO: chip: 7-6 18.745682 C 1206.851500 mV
08:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:30:ST3_smx:INFO: Electrons
08:09:30:ST3_smx:INFO: # loops 0
08:09:32:ST3_smx:INFO: # loops 1
08:09:33:ST3_smx:INFO: # loops 2
08:09:35:ST3_smx:INFO: # loops 3
08:09:36:ST3_smx:INFO: # loops 4
08:09:38:ST3_smx:INFO: Total # of broken channels: 0
08:09:38:ST3_smx:INFO: List of broken channels: []
08:09:38:ST3_smx:INFO: Total # of broken channels: 0
08:09:38:ST3_smx:INFO: List of broken channels: []
08:09:40:ST3_smx:INFO: chip: 14-7 40.898880 C 1129.995435 mV
08:09:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:40:ST3_smx:INFO: Electrons
08:09:40:ST3_smx:INFO: # loops 0
08:09:41:ST3_smx:INFO: # loops 1
08:09:43:ST3_smx:INFO: # loops 2
08:09:44:ST3_smx:INFO: # loops 3
08:09:46:ST3_smx:INFO: # loops 4
08:09:47:ST3_smx:INFO: Total # of broken channels: 0
08:09:47:ST3_smx:INFO: List of broken channels: []
08:09:47:ST3_smx:INFO: Total # of broken channels: 2
08:09:47:ST3_smx:INFO: List of broken channels: [0, 123]
08:09:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:09:48:febtest:INFO: 01-00 | XA-000-08-002-003-006-115-06 | 34.6 | 1171.5
08:09:48:febtest:INFO: 08-01 | XA-000-08-002-003-006-117-06 | 28.2 | 1201.0
08:09:48:febtest:INFO: 03-02 | XA-000-08-002-003-006-114-06 | 37.7 | 1165.6
08:09:48:febtest:INFO: 10-03 | XA-000-08-002-003-006-118-06 | 21.9 | 1212.7
08:09:49:febtest:INFO: 05-04 | XA-000-08-002-003-006-113-06 | 40.9 | 1171.5
08:09:49:febtest:INFO: 12-05 | XA-000-08-002-003-006-119-06 | 28.2 | 1195.1
08:09:49:febtest:INFO: 07-06 | XA-000-08-002-003-006-112-06 | 21.9 | 1224.5
08:09:49:febtest:INFO: 14-07 | XA-000-08-002-003-006-125-06 | 40.9 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_07-08_07_46
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1216| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 18094 | SIZE: 62x124 | GRADE: D
MODULE_NAME: M7DL5B4001234B2
LADDER_NAME: L7DL500123
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5610', '1.849', '2.3390', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0880', '1.850', '2.4880', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0010', '1.850', '0.5237', '0.000', '0.0000', '0.000', '0.0000']