FEB_1222    21.08.24 14:56:32

TextEdit.txt
            14:56:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:56:32:ST3_Shared:INFO:	                       FEB-Microcable                       
14:56:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:56:32:febtest:INFO:	Testing FEB with SN 1222
14:56:34:smx_tester:INFO:	Scanning setup
14:56:34:elinks:INFO:	Disabling clock on downlink 0
14:56:34:elinks:INFO:	Disabling clock on downlink 1
14:56:34:elinks:INFO:	Disabling clock on downlink 2
14:56:34:elinks:INFO:	Disabling clock on downlink 3
14:56:34:elinks:INFO:	Disabling clock on downlink 4
14:56:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:56:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:56:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:56:34:elinks:INFO:	Disabling clock on downlink 0
14:56:34:elinks:INFO:	Disabling clock on downlink 1
14:56:34:elinks:INFO:	Disabling clock on downlink 2
14:56:34:elinks:INFO:	Disabling clock on downlink 3
14:56:34:elinks:INFO:	Disabling clock on downlink 4
14:56:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:56:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:56:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:56:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:56:34:elinks:INFO:	Disabling clock on downlink 0
14:56:34:elinks:INFO:	Disabling clock on downlink 1
14:56:34:elinks:INFO:	Disabling clock on downlink 2
14:56:34:elinks:INFO:	Disabling clock on downlink 3
14:56:34:elinks:INFO:	Disabling clock on downlink 4
14:56:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:56:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:56:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:56:34:elinks:INFO:	Disabling clock on downlink 0
14:56:34:elinks:INFO:	Disabling clock on downlink 1
14:56:34:elinks:INFO:	Disabling clock on downlink 2
14:56:34:elinks:INFO:	Disabling clock on downlink 3
14:56:34:elinks:INFO:	Disabling clock on downlink 4
14:56:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:56:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:56:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:56:35:elinks:INFO:	Disabling clock on downlink 0
14:56:35:elinks:INFO:	Disabling clock on downlink 1
14:56:35:elinks:INFO:	Disabling clock on downlink 2
14:56:35:elinks:INFO:	Disabling clock on downlink 3
14:56:35:elinks:INFO:	Disabling clock on downlink 4
14:56:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:56:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:56:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:56:35:setup_element:INFO:	Scanning clock phase
14:56:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:56:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:35:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:56:35:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:56:35:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:56:35:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:35:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:35:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:35:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:35:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:56:35:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:56:35:setup_element:INFO:	Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:35:setup_element:INFO:	Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:35:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
14:56:35:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
14:56:35:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:56:35:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:56:35:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:56:35:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:56:35:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
14:56:35:setup_element:INFO:	Scanning data phases
14:56:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:56:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:40:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:56:40:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
14:56:40:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
14:56:40:setup_element:INFO:	Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
14:56:40:setup_element:INFO:	Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
14:56:40:setup_element:INFO:	Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
14:56:41:setup_element:INFO:	Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
14:56:41:setup_element:INFO:	Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
14:56:41:setup_element:INFO:	Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
14:56:41:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
14:56:41:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
14:56:41:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXXXX______
Data delay found: 10
14:56:41:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXXXX__
Data delay found: 14
14:56:41:setup_element:INFO:	Eye window for uplink 12: _____________________________XXXX_______
Data delay found: 10
14:56:41:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
14:56:41:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
14:56:41:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
14:56:41:setup_element:INFO:	Setting the data phase to 34 for uplink 0
14:56:41:setup_element:INFO:	Setting the data phase to 30 for uplink 1
14:56:41:setup_element:INFO:	Setting the data phase to 30 for uplink 2
14:56:41:setup_element:INFO:	Setting the data phase to 27 for uplink 3
14:56:41:setup_element:INFO:	Setting the data phase to 28 for uplink 4
14:56:41:setup_element:INFO:	Setting the data phase to 24 for uplink 5
14:56:41:setup_element:INFO:	Setting the data phase to 22 for uplink 6
14:56:41:setup_element:INFO:	Setting the data phase to 18 for uplink 7
14:56:41:setup_element:INFO:	Setting the data phase to 7 for uplink 8
14:56:41:setup_element:INFO:	Setting the data phase to 12 for uplink 9
14:56:41:setup_element:INFO:	Setting the data phase to 10 for uplink 10
14:56:41:setup_element:INFO:	Setting the data phase to 14 for uplink 11
14:56:41:setup_element:INFO:	Setting the data phase to 10 for uplink 12
14:56:41:setup_element:INFO:	Setting the data phase to 13 for uplink 13
14:56:41:setup_element:INFO:	Setting the data phase to 9 for uplink 14
14:56:41:setup_element:INFO:	Setting the data phase to 12 for uplink 15
14:56:41:setup_element:INFO:	Beginning SMX ASICs map scan
14:56:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:56:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:56:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:56:41:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:56:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:56:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:56:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:56:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:56:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:56:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:56:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:56:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:56:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:56:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:56:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:56:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:56:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:56:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:56:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:56:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:56:43:setup_element:INFO:	Performing Elink synchronization
14:56:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:56:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:56:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:56:43:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:56:43:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x0
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x1
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x2
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x3
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x4
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x5
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x6
14:56:44:ST3_emu_feb:DEBUG:	Chip address:  	0x7
14:56:44:febtest:INFO:	Init all SMX (CSA): 30
14:56:58:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:56:58:febtest:INFO:	01-00 | XA-000-08-002-000-008-069-07 |  28.2 | 1195.1
14:56:58:febtest:INFO:	08-01 | XA-000-08-002-000-008-094-00 |  34.6 | 1159.7
14:56:58:febtest:INFO:	03-02 | XA-000-08-002-000-008-228-03 |  40.9 | 1147.8
14:56:59:febtest:INFO:	10-03 | XA-000-08-002-000-008-091-00 |  28.2 | 1195.1
14:56:59:febtest:INFO:	05-04 | XA-000-08-002-000-008-075-07 |  31.4 | 1183.3
14:56:59:febtest:INFO:	12-05 | XA-000-08-002-000-008-074-07 |  31.4 | 1171.5
14:56:59:febtest:INFO:	07-06 | XA-000-08-002-000-008-033-12 |  25.1 | 1212.7
14:57:00:febtest:INFO:	14-07 | XA-000-08-002-000-008-188-01 |  40.9 | 1147.8
14:57:01:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:57:03:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1212.728715 mV
14:57:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:03:ST3_smx:INFO:		Electrons
14:57:03:ST3_smx:INFO:	# loops 0
14:57:04:ST3_smx:INFO:	# loops 1
14:57:06:ST3_smx:INFO:	# loops 2
14:57:07:ST3_smx:INFO:	Total # of broken channels: 1
14:57:07:ST3_smx:INFO:	List of broken channels: [30]
14:57:07:ST3_smx:INFO:	Total # of broken channels: 0
14:57:07:ST3_smx:INFO:	List of broken channels: []
14:57:09:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1171.483840 mV
14:57:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:09:ST3_smx:INFO:		Electrons
14:57:09:ST3_smx:INFO:	# loops 0
14:57:11:ST3_smx:INFO:	# loops 1
14:57:12:ST3_smx:INFO:	# loops 2
14:57:14:ST3_smx:INFO:	Total # of broken channels: 1
14:57:14:ST3_smx:INFO:	List of broken channels: [12]
14:57:14:ST3_smx:INFO:	Total # of broken channels: 1
14:57:14:ST3_smx:INFO:	List of broken channels: [12]
14:57:16:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1165.571835 mV
14:57:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:16:ST3_smx:INFO:		Electrons
14:57:16:ST3_smx:INFO:	# loops 0
14:57:17:ST3_smx:INFO:	# loops 1
14:57:19:ST3_smx:INFO:	# loops 2
14:57:20:ST3_smx:INFO:	Total # of broken channels: 0
14:57:20:ST3_smx:INFO:	List of broken channels: []
14:57:20:ST3_smx:INFO:	Total # of broken channels: 1
14:57:20:ST3_smx:INFO:	List of broken channels: [122]
14:57:22:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1206.851500 mV
14:57:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:22:ST3_smx:INFO:		Electrons
14:57:22:ST3_smx:INFO:	# loops 0
14:57:23:ST3_smx:INFO:	# loops 1
14:57:25:ST3_smx:INFO:	# loops 2
14:57:27:ST3_smx:INFO:	Total # of broken channels: 0
14:57:27:ST3_smx:INFO:	List of broken channels: []
14:57:27:ST3_smx:INFO:	Total # of broken channels: 0
14:57:27:ST3_smx:INFO:	List of broken channels: []
14:57:28:ST3_smx:INFO:	chip: 5-4 	 31.389742 C 	 1195.082160 mV
14:57:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:28:ST3_smx:INFO:		Electrons
14:57:28:ST3_smx:INFO:	# loops 0
14:57:30:ST3_smx:INFO:	# loops 1
14:57:31:ST3_smx:INFO:	# loops 2
14:57:33:ST3_smx:INFO:	Total # of broken channels: 0
14:57:33:ST3_smx:INFO:	List of broken channels: []
14:57:33:ST3_smx:INFO:	Total # of broken channels: 2
14:57:33:ST3_smx:INFO:	List of broken channels: [107, 126]
14:57:35:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1189.190035 mV
14:57:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:35:ST3_smx:INFO:		Electrons
14:57:35:ST3_smx:INFO:	# loops 0
14:57:36:ST3_smx:INFO:	# loops 1
14:57:38:ST3_smx:INFO:	# loops 2
14:57:39:ST3_smx:INFO:	Total # of broken channels: 0
14:57:39:ST3_smx:INFO:	List of broken channels: []
14:57:39:ST3_smx:INFO:	Total # of broken channels: 59
14:57:39:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
14:57:41:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1224.468235 mV
14:57:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:41:ST3_smx:INFO:		Electrons
14:57:41:ST3_smx:INFO:	# loops 0
14:57:43:ST3_smx:INFO:	# loops 1
14:57:44:ST3_smx:INFO:	# loops 2
14:57:46:ST3_smx:INFO:	Total # of broken channels: 1
14:57:46:ST3_smx:INFO:	List of broken channels: [108]
14:57:46:ST3_smx:INFO:	Total # of broken channels: 47
14:57:46:ST3_smx:INFO:	List of broken channels: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 102, 104, 106, 108]
14:57:48:ST3_smx:INFO:	chip: 14-7 	 40.898880 C 	 1159.654860 mV
14:57:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:57:48:ST3_smx:INFO:		Electrons
14:57:48:ST3_smx:INFO:	# loops 0
14:57:49:ST3_smx:INFO:	# loops 1
14:57:51:ST3_smx:INFO:	# loops 2
14:57:52:ST3_smx:INFO:	Total # of broken channels: 0
14:57:52:ST3_smx:INFO:	List of broken channels: []
14:57:52:ST3_smx:INFO:	Total # of broken channels: 0
14:57:52:ST3_smx:INFO:	List of broken channels: []
14:57:53:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:57:53:febtest:INFO:	01-00 | XA-000-08-002-000-008-069-07 |  28.2 | 1236.2
14:57:53:febtest:INFO:	08-01 | XA-000-08-002-000-008-094-00 |  34.6 | 1195.1
14:57:53:febtest:INFO:	03-02 | XA-000-08-002-000-008-228-03 |  40.9 | 1189.2
14:57:54:febtest:INFO:	10-03 | XA-000-08-002-000-008-091-00 |  31.4 | 1230.3
14:57:54:febtest:INFO:	05-04 | XA-000-08-002-000-008-075-07 |  31.4 | 1218.6
14:57:54:febtest:INFO:	12-05 | XA-000-08-002-000-008-074-07 |  31.4 | 1224.5
14:57:54:febtest:INFO:	07-06 | XA-000-08-002-000-008-033-12 |  25.1 | 1247.9
14:57:54:febtest:INFO:	14-07 | XA-000-08-002-000-008-188-01 |  40.9 | 1183.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_21-14_56_32
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1222| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4790', '1.848', '2.2990', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0010', '1.850', '2.3530', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9660', '1.850', '0.5209', '0.000', '0.0000', '0.000', '0.0000']