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FEB_1225 27.08.24 09:08:05
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09:08:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:08:05:ST3_Shared:INFO: FEB-Sensor
09:08:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:08:27:ST3_ModuleSelector:INFO: M8UL2B3010223A2
09:08:27:ST3_ModuleSelector:INFO: 30254
09:08:27:febtest:INFO: Testing FEB with SN 1225
09:08:29:smx_tester:INFO: Scanning setup
09:08:29:elinks:INFO: Disabling clock on downlink 0
09:08:29:elinks:INFO: Disabling clock on downlink 1
09:08:29:elinks:INFO: Disabling clock on downlink 2
09:08:29:elinks:INFO: Disabling clock on downlink 3
09:08:29:elinks:INFO: Disabling clock on downlink 4
09:08:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:08:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:29:elinks:INFO: Disabling clock on downlink 0
09:08:29:elinks:INFO: Disabling clock on downlink 1
09:08:29:elinks:INFO: Disabling clock on downlink 2
09:08:29:elinks:INFO: Disabling clock on downlink 3
09:08:29:elinks:INFO: Disabling clock on downlink 4
09:08:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:08:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:08:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:29:elinks:INFO: Disabling clock on downlink 0
09:08:29:elinks:INFO: Disabling clock on downlink 1
09:08:29:elinks:INFO: Disabling clock on downlink 2
09:08:29:elinks:INFO: Disabling clock on downlink 3
09:08:29:elinks:INFO: Disabling clock on downlink 4
09:08:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:08:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:29:elinks:INFO: Disabling clock on downlink 0
09:08:29:elinks:INFO: Disabling clock on downlink 1
09:08:29:elinks:INFO: Disabling clock on downlink 2
09:08:29:elinks:INFO: Disabling clock on downlink 3
09:08:29:elinks:INFO: Disabling clock on downlink 4
09:08:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:08:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:30:elinks:INFO: Disabling clock on downlink 0
09:08:30:elinks:INFO: Disabling clock on downlink 1
09:08:30:elinks:INFO: Disabling clock on downlink 2
09:08:30:elinks:INFO: Disabling clock on downlink 3
09:08:30:elinks:INFO: Disabling clock on downlink 4
09:08:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:08:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:08:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:08:30:setup_element:INFO: Scanning clock phase
09:08:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:08:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:08:30:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:08:30:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:08:30:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:08:30:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:08:30:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:08:30:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:08:30:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:08:30:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:08:30:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:08:30:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:08:30:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:08:30:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:08:30:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:08:30:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:08:30:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:08:30:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:08:30:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:08:30:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
09:08:30:setup_element:INFO: Scanning data phases
09:08:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:08:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:08:36:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:08:36:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:08:36:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:08:36:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
09:08:36:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
09:08:36:setup_element:INFO: Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
09:08:36:setup_element:INFO: Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
09:08:36:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
09:08:36:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
09:08:36:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
09:08:36:setup_element:INFO: Eye window for uplink 9 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
09:08:36:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
09:08:36:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
09:08:36:setup_element:INFO: Eye window for uplink 12: _____________________________XXX________
Data delay found: 10
09:08:36:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
09:08:36:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
09:08:36:setup_element:INFO: Eye window for uplink 15: ________________________________XXXX____
Data delay found: 13
09:08:36:setup_element:INFO: Setting the data phase to 34 for uplink 0
09:08:36:setup_element:INFO: Setting the data phase to 29 for uplink 1
09:08:36:setup_element:INFO: Setting the data phase to 29 for uplink 2
09:08:36:setup_element:INFO: Setting the data phase to 26 for uplink 3
09:08:36:setup_element:INFO: Setting the data phase to 26 for uplink 4
09:08:36:setup_element:INFO: Setting the data phase to 21 for uplink 5
09:08:36:setup_element:INFO: Setting the data phase to 21 for uplink 6
09:08:36:setup_element:INFO: Setting the data phase to 17 for uplink 7
09:08:36:setup_element:INFO: Setting the data phase to 6 for uplink 8
09:08:36:setup_element:INFO: Setting the data phase to 6 for uplink 9
09:08:36:setup_element:INFO: Setting the data phase to 8 for uplink 10
09:08:36:setup_element:INFO: Setting the data phase to 12 for uplink 11
09:08:36:setup_element:INFO: Setting the data phase to 10 for uplink 12
09:08:36:setup_element:INFO: Setting the data phase to 13 for uplink 13
09:08:36:setup_element:INFO: Setting the data phase to 10 for uplink 14
09:08:36:setup_element:INFO: Setting the data phase to 13 for uplink 15
09:08:36:setup_element:INFO: Beginning SMX ASICs map scan
09:08:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:08:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:08:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:08:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:08:36:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:08:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:08:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:08:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:08:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:08:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:08:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:08:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:08:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:08:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:08:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:08:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:08:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:08:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:08:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:08:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:08:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:08:39:setup_element:INFO: Performing Elink synchronization
09:08:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:08:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:08:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:08:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:08:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:08:39:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:08:39:ST3_emu_feb:DEBUG: Chip address: 0x0
09:08:39:ST3_emu_feb:DEBUG: Chip address: 0x1
09:08:39:ST3_emu_feb:DEBUG: Chip address: 0x2
09:08:39:ST3_emu_feb:DEBUG: Chip address: 0x3
09:08:40:ST3_emu_feb:DEBUG: Chip address: 0x4
09:08:40:ST3_emu_feb:DEBUG: Chip address: 0x5
09:08:40:ST3_emu_feb:DEBUG: Chip address: 0x6
09:08:40:ST3_emu_feb:DEBUG: Chip address: 0x7
09:08:40:febtest:INFO: Init all SMX (CSA): 30
09:08:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:08:54:febtest:INFO: 01-00 | XA-000-08-002-001-007-165-10 | 37.7 | 1147.8
09:08:54:febtest:INFO: 08-01 | XA-000-08-002-001-007-199-01 | 25.1 | 1177.4
09:08:54:febtest:INFO: 03-02 | XA-000-08-002-001-007-193-01 | 34.6 | 1153.7
09:08:54:febtest:INFO: 10-03 | XA-000-08-002-001-007-167-10 | 25.1 | 1189.2
09:08:55:febtest:INFO: 05-04 | XA-000-08-002-001-007-207-01 | 15.6 | 1224.5
09:08:55:febtest:INFO: 12-05 | XA-000-08-002-001-007-171-10 | 44.1 | 1141.9
09:08:55:febtest:INFO: 07-06 | XA-000-08-002-001-007-244-08 | 44.1 | 1141.9
09:08:55:febtest:INFO: 14-07 | XA-000-08-002-001-008-001-10 | 40.9 | 1153.7
09:08:56:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:08:58:ST3_smx:INFO: chip: 1-0 37.726682 C 1159.654860 mV
09:08:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:58:ST3_smx:INFO: Electrons
09:08:58:ST3_smx:INFO: # loops 0
09:09:00:ST3_smx:INFO: # loops 1
09:09:02:ST3_smx:INFO: # loops 2
09:09:03:ST3_smx:INFO: # loops 3
09:09:05:ST3_smx:INFO: # loops 4
09:09:06:ST3_smx:INFO: Total # of broken channels: 0
09:09:06:ST3_smx:INFO: List of broken channels: []
09:09:06:ST3_smx:INFO: Total # of broken channels: 1
09:09:06:ST3_smx:INFO: List of broken channels: [99]
09:09:08:ST3_smx:INFO: chip: 8-1 25.062742 C 1195.082160 mV
09:09:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:08:ST3_smx:INFO: Electrons
09:09:08:ST3_smx:INFO: # loops 0
09:09:10:ST3_smx:INFO: # loops 1
09:09:11:ST3_smx:INFO: # loops 2
09:09:13:ST3_smx:INFO: # loops 3
09:09:14:ST3_smx:INFO: # loops 4
09:09:16:ST3_smx:INFO: Total # of broken channels: 0
09:09:16:ST3_smx:INFO: List of broken channels: []
09:09:16:ST3_smx:INFO: Total # of broken channels: 0
09:09:16:ST3_smx:INFO: List of broken channels: []
09:09:18:ST3_smx:INFO: chip: 3-2 34.556970 C 1165.571835 mV
09:09:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:18:ST3_smx:INFO: Electrons
09:09:18:ST3_smx:INFO: # loops 0
09:09:19:ST3_smx:INFO: # loops 1
09:09:21:ST3_smx:INFO: # loops 2
09:09:22:ST3_smx:INFO: # loops 3
09:09:24:ST3_smx:INFO: # loops 4
09:09:25:ST3_smx:INFO: Total # of broken channels: 0
09:09:25:ST3_smx:INFO: List of broken channels: []
09:09:25:ST3_smx:INFO: Total # of broken channels: 0
09:09:25:ST3_smx:INFO: List of broken channels: []
09:09:27:ST3_smx:INFO: chip: 10-3 25.062742 C 1206.851500 mV
09:09:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:27:ST3_smx:INFO: Electrons
09:09:27:ST3_smx:INFO: # loops 0
09:09:29:ST3_smx:INFO: # loops 1
09:09:30:ST3_smx:INFO: # loops 2
09:09:32:ST3_smx:INFO: # loops 3
09:09:33:ST3_smx:INFO: # loops 4
09:09:35:ST3_smx:INFO: Total # of broken channels: 0
09:09:35:ST3_smx:INFO: List of broken channels: []
09:09:35:ST3_smx:INFO: Total # of broken channels: 3
09:09:35:ST3_smx:INFO: List of broken channels: [122, 124, 126]
09:09:36:ST3_smx:INFO: chip: 5-4 18.745682 C 1236.187875 mV
09:09:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:36:ST3_smx:INFO: Electrons
09:09:36:ST3_smx:INFO: # loops 0
09:09:38:ST3_smx:INFO: # loops 1
09:09:40:ST3_smx:INFO: # loops 2
09:09:41:ST3_smx:INFO: # loops 3
09:09:43:ST3_smx:INFO: # loops 4
09:09:44:ST3_smx:INFO: Total # of broken channels: 0
09:09:44:ST3_smx:INFO: List of broken channels: []
09:09:44:ST3_smx:INFO: Total # of broken channels: 0
09:09:44:ST3_smx:INFO: List of broken channels: []
09:09:46:ST3_smx:INFO: chip: 12-5 44.073563 C 1147.806000 mV
09:09:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:46:ST3_smx:INFO: Electrons
09:09:46:ST3_smx:INFO: # loops 0
09:09:48:ST3_smx:INFO: # loops 1
09:09:49:ST3_smx:INFO: # loops 2
09:09:51:ST3_smx:INFO: # loops 3
09:09:52:ST3_smx:INFO: # loops 4
09:09:54:ST3_smx:INFO: Total # of broken channels: 0
09:09:54:ST3_smx:INFO: List of broken channels: []
09:09:54:ST3_smx:INFO: Total # of broken channels: 1
09:09:54:ST3_smx:INFO: List of broken channels: [1]
09:09:56:ST3_smx:INFO: chip: 7-6 47.250730 C 1153.732915 mV
09:09:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:09:56:ST3_smx:INFO: Electrons
09:09:56:ST3_smx:INFO: # loops 0
09:09:57:ST3_smx:INFO: # loops 1
09:09:59:ST3_smx:INFO: # loops 2
09:10:01:ST3_smx:INFO: # loops 3
09:10:02:ST3_smx:INFO: # loops 4
09:10:04:ST3_smx:INFO: Total # of broken channels: 0
09:10:04:ST3_smx:INFO: List of broken channels: []
09:10:04:ST3_smx:INFO: Total # of broken channels: 0
09:10:04:ST3_smx:INFO: List of broken channels: []
09:10:06:ST3_smx:INFO: chip: 14-7 44.073563 C 1165.571835 mV
09:10:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:10:06:ST3_smx:INFO: Electrons
09:10:06:ST3_smx:INFO: # loops 0
09:10:07:ST3_smx:INFO: # loops 1
09:10:09:ST3_smx:INFO: # loops 2
09:10:11:ST3_smx:INFO: # loops 3
09:10:12:ST3_smx:INFO: # loops 4
09:10:14:ST3_smx:INFO: Total # of broken channels: 0
09:10:14:ST3_smx:INFO: List of broken channels: []
09:10:14:ST3_smx:INFO: Total # of broken channels: 2
09:10:14:ST3_smx:INFO: List of broken channels: [3, 70]
09:10:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:10:14:febtest:INFO: 01-00 | XA-000-08-002-001-007-165-10 | 37.7 | 1183.3
09:10:15:febtest:INFO: 08-01 | XA-000-08-002-001-007-199-01 | 28.2 | 1212.7
09:10:15:febtest:INFO: 03-02 | XA-000-08-002-001-007-193-01 | 37.7 | 1189.2
09:10:15:febtest:INFO: 10-03 | XA-000-08-002-001-007-167-10 | 28.2 | 1230.3
09:10:15:febtest:INFO: 05-04 | XA-000-08-002-001-007-207-01 | 21.9 | 1259.6
09:10:15:febtest:INFO: 12-05 | XA-000-08-002-001-007-171-10 | 47.3 | 1171.5
09:10:16:febtest:INFO: 07-06 | XA-000-08-002-001-007-244-08 | 47.3 | 1177.4
09:10:16:febtest:INFO: 14-07 | XA-000-08-002-001-008-001-10 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_27-09_08_05
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1225| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 30254 | SIZE: 62x124 | GRADE: B
MODULE_NAME: M8UL2B3010223A2
LADDER_NAME: L8UL201022
------------------------------------------------------------
VI_before_Init : ['2.449', '1.6090', '1.848', '2.3980', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0620', '1.850', '2.4050', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9900', '1.850', '0.5348', '0.000', '0.0000', '0.000', '0.0000']