07:38:44:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:38:44:ST3_Shared:INFO:	                         FEB-Sensor                         
07:38:44:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:39:00:ST3_ModuleSelector:INFO:	M8UL2B0010220A2
07:39:00:ST3_ModuleSelector:INFO:	08292
07:39:00:febtest:INFO:	Testing FEB with SN 1228
07:39:02:smx_tester:INFO:	Scanning setup
07:39:02:elinks:INFO:	Disabling clock on downlink 0
07:39:02:elinks:INFO:	Disabling clock on downlink 1
07:39:02:elinks:INFO:	Disabling clock on downlink 2
07:39:02:elinks:INFO:	Disabling clock on downlink 3
07:39:02:elinks:INFO:	Disabling clock on downlink 4
07:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO:	Disabling clock on downlink 0
07:39:02:elinks:INFO:	Disabling clock on downlink 1
07:39:02:elinks:INFO:	Disabling clock on downlink 2
07:39:02:elinks:INFO:	Disabling clock on downlink 3
07:39:02:elinks:INFO:	Disabling clock on downlink 4
07:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
07:39:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
07:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO:	Disabling clock on downlink 0
07:39:02:elinks:INFO:	Disabling clock on downlink 1
07:39:02:elinks:INFO:	Disabling clock on downlink 2
07:39:02:elinks:INFO:	Disabling clock on downlink 3
07:39:02:elinks:INFO:	Disabling clock on downlink 4
07:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO:	Disabling clock on downlink 0
07:39:02:elinks:INFO:	Disabling clock on downlink 1
07:39:02:elinks:INFO:	Disabling clock on downlink 2
07:39:02:elinks:INFO:	Disabling clock on downlink 3
07:39:02:elinks:INFO:	Disabling clock on downlink 4
07:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO:	Disabling clock on downlink 0
07:39:03:elinks:INFO:	Disabling clock on downlink 1
07:39:03:elinks:INFO:	Disabling clock on downlink 2
07:39:03:elinks:INFO:	Disabling clock on downlink 3
07:39:03:elinks:INFO:	Disabling clock on downlink 4
07:39:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:39:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:03:setup_element:INFO:	Scanning clock phase
07:39:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:03:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:39:03:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:39:03:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:39:03:setup_element:INFO:	Eye window for uplink 2 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:39:03:setup_element:INFO:	Eye window for uplink 3 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:39:03:setup_element:INFO:	Eye window for uplink 4 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:39:03:setup_element:INFO:	Eye window for uplink 5 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:39:03:setup_element:INFO:	Eye window for uplink 6 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
07:39:03:setup_element:INFO:	Eye window for uplink 7 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
07:39:03:setup_element:INFO:	Eye window for uplink 8 : ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:39:03:setup_element:INFO:	Eye window for uplink 9 : ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:39:03:setup_element:INFO:	Eye window for uplink 10: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
07:39:03:setup_element:INFO:	Eye window for uplink 11: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
07:39:03:setup_element:INFO:	Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:39:03:setup_element:INFO:	Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:39:03:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:39:03:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:39:03:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
07:39:03:setup_element:INFO:	Scanning data phases
07:39:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:09:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:39:09:setup_element:INFO:	Eye window for uplink 0 : __________XXXXXX________________________
Data delay found: 32
07:39:09:setup_element:INFO:	Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
07:39:09:setup_element:INFO:	Eye window for uplink 2 : ____XXXXX_______________________________
Data delay found: 26
07:39:09:setup_element:INFO:	Eye window for uplink 3 : _XXXXX__________________________________
Data delay found: 23
07:39:09:setup_element:INFO:	Eye window for uplink 4 : _XXXXX__________________________________
Data delay found: 23
07:39:09:setup_element:INFO:	Eye window for uplink 5 : XXX_________________________________XXXX
Data delay found: 19
07:39:09:setup_element:INFO:	Eye window for uplink 6 : _________________________________XXXX___
Data delay found: 14
07:39:09:setup_element:INFO:	Eye window for uplink 7 : _____________________________XXXXX______
Data delay found: 11
07:39:09:setup_element:INFO:	Eye window for uplink 8 : ___________________XXXXX________________
Data delay found: 1
07:39:09:setup_element:INFO:	Eye window for uplink 9 : ________________________XXXXXX__________
Data delay found: 6
07:39:09:setup_element:INFO:	Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
07:39:09:setup_element:INFO:	Eye window for uplink 11: _________________________XXXXXX_________
Data delay found: 7
07:39:09:setup_element:INFO:	Eye window for uplink 12: ________________________XXXXX___________
Data delay found: 6
07:39:09:setup_element:INFO:	Eye window for uplink 13: __________________________XXXXXX________
Data delay found: 8
07:39:09:setup_element:INFO:	Eye window for uplink 14: ___________________________XXXXX________
Data delay found: 9
07:39:09:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
07:39:09:setup_element:INFO:	Setting the data phase to 32 for uplink 0
07:39:09:setup_element:INFO:	Setting the data phase to 28 for uplink 1
07:39:09:setup_element:INFO:	Setting the data phase to 26 for uplink 2
07:39:09:setup_element:INFO:	Setting the data phase to 23 for uplink 3
07:39:09:setup_element:INFO:	Setting the data phase to 23 for uplink 4
07:39:09:setup_element:INFO:	Setting the data phase to 19 for uplink 5
07:39:09:setup_element:INFO:	Setting the data phase to 14 for uplink 6
07:39:09:setup_element:INFO:	Setting the data phase to 11 for uplink 7
07:39:09:setup_element:INFO:	Setting the data phase to 1 for uplink 8
07:39:09:setup_element:INFO:	Setting the data phase to 6 for uplink 9
07:39:09:setup_element:INFO:	Setting the data phase to 3 for uplink 10
07:39:09:setup_element:INFO:	Setting the data phase to 7 for uplink 11
07:39:09:setup_element:INFO:	Setting the data phase to 6 for uplink 12
07:39:09:setup_element:INFO:	Setting the data phase to 8 for uplink 13
07:39:09:setup_element:INFO:	Setting the data phase to 9 for uplink 14
07:39:09:setup_element:INFO:	Setting the data phase to 11 for uplink 15
07:39:09:setup_element:INFO:	Beginning SMX ASICs map scan
07:39:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:39:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:39:09:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:39:09:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:39:09:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:39:09:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:39:09:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:39:09:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:39:09:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:39:09:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:39:09:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:39:10:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:39:10:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:39:10:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:39:10:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:39:10:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:39:10:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:39:10:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:39:10:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:39:11:setup_element:INFO:	Performing Elink synchronization
07:39:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:39:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:39:12:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:39:12:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x0
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x1
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x2
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x3
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x4
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x5
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x6
07:39:12:ST3_emu_feb:DEBUG:	Chip address:  	0x7
07:39:12:febtest:INFO:	Init all SMX (CSA): 30
07:39:26:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:39:26:febtest:INFO:	01-00 | XA-060-08-002-003-007-021-06 |  44.1 | 1112.1
07:39:27:febtest:INFO:	08-01 | XA-064-08-002-003-007-021-13 |  47.3 | 1112.1
07:39:27:febtest:INFO:	03-02 | XA-061-08-002-003-007-021-13 |  50.4 | 1100.2
07:39:27:febtest:INFO:	10-03 | XA-065-08-002-003-007-021-06 |  40.9 | 1141.9
07:39:27:febtest:INFO:	05-04 | XA-062-08-002-003-007-021-09 |  53.6 | 1094.2
07:39:27:febtest:INFO:	12-05 | XA-066-08-002-003-007-021-02 |  40.9 | 1124.0
07:39:28:febtest:INFO:	07-06 | XA-063-08-002-003-007-021-02 |  37.7 | 1141.9
07:39:28:febtest:INFO:	14-07 | XA-067-08-002-003-007-021-09 |  50.4 | 1088.3
07:39:29:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:39:31:ST3_smx:INFO:	chip: 1-0 	 47.250730 C 	 1129.995435 mV
07:39:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:31:ST3_smx:INFO:		Electrons
07:39:31:ST3_smx:INFO:	# loops 0
07:39:33:ST3_smx:INFO:	# loops 1
07:39:34:ST3_smx:INFO:	# loops 2
07:39:36:ST3_smx:INFO:	# loops 3
07:39:37:ST3_smx:INFO:	# loops 4
07:39:39:ST3_smx:INFO:	Total # of broken channels: 0
07:39:39:ST3_smx:INFO:	List of broken channels: []
07:39:39:ST3_smx:INFO:	Total # of broken channels: 0
07:39:39:ST3_smx:INFO:	List of broken channels: []
07:39:41:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1124.048640 mV
07:39:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:41:ST3_smx:INFO:		Electrons
07:39:41:ST3_smx:INFO:	# loops 0
07:39:42:ST3_smx:INFO:	# loops 1
07:39:44:ST3_smx:INFO:	# loops 2
07:39:46:ST3_smx:INFO:	# loops 3
07:39:47:ST3_smx:INFO:	# loops 4
07:39:49:ST3_smx:INFO:	Total # of broken channels: 0
07:39:49:ST3_smx:INFO:	List of broken channels: []
07:39:49:ST3_smx:INFO:	Total # of broken channels: 0
07:39:49:ST3_smx:INFO:	List of broken channels: []
07:39:50:ST3_smx:INFO:	chip: 3-2 	 53.612520 C 	 1106.178435 mV
07:39:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:50:ST3_smx:INFO:		Electrons
07:39:51:ST3_smx:INFO:	# loops 0
07:39:52:ST3_smx:INFO:	# loops 1
07:39:54:ST3_smx:INFO:	# loops 2
07:39:55:ST3_smx:INFO:	# loops 3
07:39:57:ST3_smx:INFO:	# loops 4
07:39:58:ST3_smx:INFO:	Total # of broken channels: 0
07:39:58:ST3_smx:INFO:	List of broken channels: []
07:39:58:ST3_smx:INFO:	Total # of broken channels: 0
07:39:58:ST3_smx:INFO:	List of broken channels: []
07:40:00:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1147.806000 mV
07:40:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:00:ST3_smx:INFO:		Electrons
07:40:00:ST3_smx:INFO:	# loops 0
07:40:02:ST3_smx:INFO:	# loops 1
07:40:03:ST3_smx:INFO:	# loops 2
07:40:05:ST3_smx:INFO:	# loops 3
07:40:06:ST3_smx:INFO:	# loops 4
07:40:08:ST3_smx:INFO:	Total # of broken channels: 1
07:40:08:ST3_smx:INFO:	List of broken channels: [125]
07:40:08:ST3_smx:INFO:	Total # of broken channels: 0
07:40:08:ST3_smx:INFO:	List of broken channels: []
07:40:10:ST3_smx:INFO:	chip: 5-4 	 53.612520 C 	 1106.178435 mV
07:40:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:10:ST3_smx:INFO:		Electrons
07:40:10:ST3_smx:INFO:	# loops 0
07:40:11:ST3_smx:INFO:	# loops 1
07:40:13:ST3_smx:INFO:	# loops 2
07:40:14:ST3_smx:INFO:	# loops 3
07:40:16:ST3_smx:INFO:	# loops 4
07:40:18:ST3_smx:INFO:	Total # of broken channels: 0
07:40:18:ST3_smx:INFO:	List of broken channels: []
07:40:18:ST3_smx:INFO:	Total # of broken channels: 0
07:40:18:ST3_smx:INFO:	List of broken channels: []
07:40:19:ST3_smx:INFO:	chip: 12-5 	 44.073563 C 	 1135.937260 mV
07:40:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:19:ST3_smx:INFO:		Electrons
07:40:19:ST3_smx:INFO:	# loops 0
07:40:21:ST3_smx:INFO:	# loops 1
07:40:22:ST3_smx:INFO:	# loops 2
07:40:24:ST3_smx:INFO:	# loops 3
07:40:25:ST3_smx:INFO:	# loops 4
07:40:27:ST3_smx:INFO:	Total # of broken channels: 0
07:40:27:ST3_smx:INFO:	List of broken channels: []
07:40:27:ST3_smx:INFO:	Total # of broken channels: 0
07:40:27:ST3_smx:INFO:	List of broken channels: []
07:40:29:ST3_smx:INFO:	chip: 7-6 	 37.726682 C 	 1153.732915 mV
07:40:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:29:ST3_smx:INFO:		Electrons
07:40:29:ST3_smx:INFO:	# loops 0
07:40:30:ST3_smx:INFO:	# loops 1
07:40:32:ST3_smx:INFO:	# loops 2
07:40:33:ST3_smx:INFO:	# loops 3
07:40:35:ST3_smx:INFO:	# loops 4
07:40:37:ST3_smx:INFO:	Total # of broken channels: 0
07:40:37:ST3_smx:INFO:	List of broken channels: []
07:40:37:ST3_smx:INFO:	Total # of broken channels: 0
07:40:37:ST3_smx:INFO:	List of broken channels: []
07:40:38:ST3_smx:INFO:	chip: 14-7 	 53.612520 C 	 1094.240115 mV
07:40:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:38:ST3_smx:INFO:		Electrons
07:40:38:ST3_smx:INFO:	# loops 0
07:40:40:ST3_smx:INFO:	# loops 1
07:40:41:ST3_smx:INFO:	# loops 2
07:40:43:ST3_smx:INFO:	# loops 3
07:40:44:ST3_smx:INFO:	# loops 4
07:40:46:ST3_smx:INFO:	Total # of broken channels: 0
07:40:46:ST3_smx:INFO:	List of broken channels: []
07:40:46:ST3_smx:INFO:	Total # of broken channels: 0
07:40:46:ST3_smx:INFO:	List of broken channels: []
07:40:46:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:40:47:febtest:INFO:	01-00 | XA-060-08-002-003-007-021-06 |  47.3 | 1147.8
07:40:47:febtest:INFO:	08-01 | XA-064-08-002-003-007-021-13 |  50.4 | 1141.9
07:40:47:febtest:INFO:	03-02 | XA-061-08-002-003-007-021-13 |  53.6 | 1130.0
07:40:47:febtest:INFO:	10-03 | XA-065-08-002-003-007-021-06 |  40.9 | 1171.5
07:40:47:febtest:INFO:	05-04 | XA-062-08-002-003-007-021-09 |  53.6 | 1124.0
07:40:48:febtest:INFO:	12-05 | XA-066-08-002-003-007-021-02 |  44.1 | 1153.7
07:40:48:febtest:INFO:	07-06 | XA-063-08-002-003-007-021-02 |  40.9 | 1171.5
07:40:48:febtest:INFO:	14-07 | XA-067-08-002-003-007-021-09 |  56.8 | 1118.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_21-07_38_44
OPERATOR  : Kerstin S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1228| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 08292 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL2B0010220A2
LADDER_NAME: L8UL201022
------------------------------------------------------------
VI_before_Init : ['2.449', '1.6780', '1.849', '2.2510', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0840', '1.850', '2.3740', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0070', '1.850', '0.5257', '0.000', '0.0000', '0.000', '0.0000']