10:28:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:31:ST3_Shared:INFO:	                         FEB-Sensor                         
10:28:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:53:ST3_ModuleSelector:INFO:	M8UL2B1010221A2
10:28:53:ST3_ModuleSelector:INFO:	27173
10:28:53:febtest:INFO:	Testing FEB with SN 1229
10:28:55:smx_tester:INFO:	Scanning setup
10:28:55:elinks:INFO:	Disabling clock on downlink 0
10:28:55:elinks:INFO:	Disabling clock on downlink 1
10:28:55:elinks:INFO:	Disabling clock on downlink 2
10:28:55:elinks:INFO:	Disabling clock on downlink 3
10:28:55:elinks:INFO:	Disabling clock on downlink 4
10:28:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:28:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:55:elinks:INFO:	Disabling clock on downlink 0
10:28:55:elinks:INFO:	Disabling clock on downlink 1
10:28:55:elinks:INFO:	Disabling clock on downlink 2
10:28:55:elinks:INFO:	Disabling clock on downlink 3
10:28:55:elinks:INFO:	Disabling clock on downlink 4
10:28:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:28:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:28:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:55:elinks:INFO:	Disabling clock on downlink 0
10:28:55:elinks:INFO:	Disabling clock on downlink 1
10:28:55:elinks:INFO:	Disabling clock on downlink 2
10:28:55:elinks:INFO:	Disabling clock on downlink 3
10:28:55:elinks:INFO:	Disabling clock on downlink 4
10:28:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:28:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:56:elinks:INFO:	Disabling clock on downlink 0
10:28:56:elinks:INFO:	Disabling clock on downlink 1
10:28:56:elinks:INFO:	Disabling clock on downlink 2
10:28:56:elinks:INFO:	Disabling clock on downlink 3
10:28:56:elinks:INFO:	Disabling clock on downlink 4
10:28:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:28:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:56:elinks:INFO:	Disabling clock on downlink 0
10:28:56:elinks:INFO:	Disabling clock on downlink 1
10:28:56:elinks:INFO:	Disabling clock on downlink 2
10:28:56:elinks:INFO:	Disabling clock on downlink 3
10:28:56:elinks:INFO:	Disabling clock on downlink 4
10:28:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:28:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:56:setup_element:INFO:	Scanning clock phase
10:28:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:28:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:28:56:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:28:56:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:28:56:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:28:56:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:28:56:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:28:56:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:28:56:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:28:56:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:28:56:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:28:56:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:28:56:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:28:56:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:56:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:56:setup_element:INFO:	Eye window for uplink 12: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:28:56:setup_element:INFO:	Eye window for uplink 13: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:28:56:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:28:56:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:28:56:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
10:28:56:setup_element:INFO:	Scanning data phases
10:28:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:28:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:29:02:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:29:02:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
10:29:02:setup_element:INFO:	Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
10:29:02:setup_element:INFO:	Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
10:29:02:setup_element:INFO:	Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
10:29:02:setup_element:INFO:	Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
10:29:02:setup_element:INFO:	Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
10:29:02:setup_element:INFO:	Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
10:29:02:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
10:29:02:setup_element:INFO:	Eye window for uplink 8 : _______________________XXXXXX___________
Data delay found: 5
10:29:02:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:29:02:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
10:29:02:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXX_X___
Data delay found: 13
10:29:02:setup_element:INFO:	Eye window for uplink 12: _______________________XXXXXX___________
Data delay found: 5
10:29:02:setup_element:INFO:	Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
10:29:02:setup_element:INFO:	Eye window for uplink 14: _________________________XXXXX__________
Data delay found: 7
10:29:02:setup_element:INFO:	Eye window for uplink 15: ___________________________XXXXXX_______
Data delay found: 9
10:29:02:setup_element:INFO:	Setting the data phase to 36 for uplink 0
10:29:02:setup_element:INFO:	Setting the data phase to 31 for uplink 1
10:29:02:setup_element:INFO:	Setting the data phase to 32 for uplink 2
10:29:02:setup_element:INFO:	Setting the data phase to 30 for uplink 3
10:29:02:setup_element:INFO:	Setting the data phase to 26 for uplink 4
10:29:02:setup_element:INFO:	Setting the data phase to 21 for uplink 5
10:29:02:setup_element:INFO:	Setting the data phase to 20 for uplink 6
10:29:02:setup_element:INFO:	Setting the data phase to 17 for uplink 7
10:29:02:setup_element:INFO:	Setting the data phase to 5 for uplink 8
10:29:02:setup_element:INFO:	Setting the data phase to 11 for uplink 9
10:29:02:setup_element:INFO:	Setting the data phase to 8 for uplink 10
10:29:02:setup_element:INFO:	Setting the data phase to 13 for uplink 11
10:29:02:setup_element:INFO:	Setting the data phase to 5 for uplink 12
10:29:02:setup_element:INFO:	Setting the data phase to 8 for uplink 13
10:29:02:setup_element:INFO:	Setting the data phase to 7 for uplink 14
10:29:02:setup_element:INFO:	Setting the data phase to 9 for uplink 15
10:29:02:setup_element:INFO:	Beginning SMX ASICs map scan
10:29:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:29:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:29:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:29:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:29:02:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:29:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:29:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:29:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:29:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:29:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:29:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:29:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:29:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:29:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:29:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:29:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:29:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:29:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:29:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:29:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:29:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:29:05:setup_element:INFO:	Performing Elink synchronization
10:29:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:29:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:29:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:29:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:29:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:29:05:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x0
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x1
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x2
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x3
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x4
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x5
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x6
10:29:05:ST3_emu_feb:DEBUG:	Chip address:  	0x7
10:29:05:febtest:INFO:	Init all SMX (CSA): 30
10:29:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:29:20:febtest:INFO:	01-00 | XA-000-08-002-003-006-160-14 |  18.7 | 1195.1
10:29:21:febtest:INFO:	08-01 | XA-000-08-002-003-006-163-14 |  37.7 | 1124.0
10:29:21:febtest:INFO:	03-02 | XA-000-08-002-000-008-202-13 |  31.4 | 1141.9
10:29:21:febtest:INFO:	10-03 | XA-000-08-002-003-006-162-14 |  37.7 | 1118.1
10:29:21:febtest:INFO:	05-04 | XA-000-08-002-003-006-159-07 |  21.9 | 1171.5
10:29:21:febtest:INFO:	12-05 | XA-073-08-002-003-007-021-08 |  56.8 | 1064.3
10:29:22:febtest:INFO:	07-06 | XA-000-08-002-003-006-156-07 |  34.6 | 1141.9
10:29:22:febtest:INFO:	14-07 | XA-074-08-002-003-007-021-12 |  60.0 | 1064.3
10:29:23:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:29:25:ST3_smx:INFO:	chip: 1-0 	 18.745682 C 	 1200.969315 mV
10:29:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:25:ST3_smx:INFO:		Electrons
10:29:25:ST3_smx:INFO:	# loops 0
10:29:27:ST3_smx:INFO:	# loops 1
10:29:28:ST3_smx:INFO:	# loops 2
10:29:30:ST3_smx:INFO:	# loops 3
10:29:32:ST3_smx:INFO:	# loops 4
10:29:33:ST3_smx:INFO:	Total # of broken channels: 0
10:29:33:ST3_smx:INFO:	List of broken channels: []
10:29:33:ST3_smx:INFO:	Total # of broken channels: 1
10:29:33:ST3_smx:INFO:	List of broken channels: [19]
10:29:35:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1135.937260 mV
10:29:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:35:ST3_smx:INFO:		Electrons
10:29:35:ST3_smx:INFO:	# loops 0
10:29:37:ST3_smx:INFO:	# loops 1
10:29:38:ST3_smx:INFO:	# loops 2
10:29:40:ST3_smx:INFO:	# loops 3
10:29:42:ST3_smx:INFO:	# loops 4
10:29:43:ST3_smx:INFO:	Total # of broken channels: 0
10:29:43:ST3_smx:INFO:	List of broken channels: []
10:29:43:ST3_smx:INFO:	Total # of broken channels: 4
10:29:43:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7]
10:29:45:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1153.732915 mV
10:29:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:45:ST3_smx:INFO:		Electrons
10:29:45:ST3_smx:INFO:	# loops 0
10:29:47:ST3_smx:INFO:	# loops 1
10:29:48:ST3_smx:INFO:	# loops 2
10:29:50:ST3_smx:INFO:	# loops 3
10:29:52:ST3_smx:INFO:	# loops 4
10:29:53:ST3_smx:INFO:	Total # of broken channels: 0
10:29:53:ST3_smx:INFO:	List of broken channels: []
10:29:53:ST3_smx:INFO:	Total # of broken channels: 5
10:29:53:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 13, 25]
10:29:55:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1129.995435 mV
10:29:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:29:55:ST3_smx:INFO:		Electrons
10:29:55:ST3_smx:INFO:	# loops 0
10:29:57:ST3_smx:INFO:	# loops 1
10:29:59:ST3_smx:INFO:	# loops 2
10:30:00:ST3_smx:INFO:	# loops 3
10:30:02:ST3_smx:INFO:	# loops 4
10:30:04:ST3_smx:INFO:	Total # of broken channels: 0
10:30:04:ST3_smx:INFO:	List of broken channels: []
10:30:04:ST3_smx:INFO:	Total # of broken channels: 1
10:30:04:ST3_smx:INFO:	List of broken channels: [9]
10:30:05:ST3_smx:INFO:	chip: 5-4 	 25.062742 C 	 1177.390875 mV
10:30:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:05:ST3_smx:INFO:		Electrons
10:30:05:ST3_smx:INFO:	# loops 0
10:30:07:ST3_smx:INFO:	# loops 1
10:30:09:ST3_smx:INFO:	# loops 2
10:30:10:ST3_smx:INFO:	# loops 3
10:30:12:ST3_smx:INFO:	# loops 4
10:30:14:ST3_smx:INFO:	Total # of broken channels: 0
10:30:14:ST3_smx:INFO:	List of broken channels: []
10:30:14:ST3_smx:INFO:	Total # of broken channels: 4
10:30:14:ST3_smx:INFO:	List of broken channels: [2, 7, 13, 26]
10:30:15:ST3_smx:INFO:	chip: 12-5 	 59.984250 C 	 1076.295360 mV
10:30:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:15:ST3_smx:INFO:		Electrons
10:30:15:ST3_smx:INFO:	# loops 0
10:30:17:ST3_smx:INFO:	# loops 1
10:30:19:ST3_smx:INFO:	# loops 2
10:30:20:ST3_smx:INFO:	# loops 3
10:30:22:ST3_smx:INFO:	# loops 4
10:30:24:ST3_smx:INFO:	Total # of broken channels: 0
10:30:24:ST3_smx:INFO:	List of broken channels: []
10:30:24:ST3_smx:INFO:	Total # of broken channels: 4
10:30:24:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9]
10:30:25:ST3_smx:INFO:	chip: 7-6 	 37.726682 C 	 1147.806000 mV
10:30:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:25:ST3_smx:INFO:		Electrons
10:30:25:ST3_smx:INFO:	# loops 0
10:30:27:ST3_smx:INFO:	# loops 1
10:30:29:ST3_smx:INFO:	# loops 2
10:30:30:ST3_smx:INFO:	# loops 3
10:30:32:ST3_smx:INFO:	# loops 4
10:30:33:ST3_smx:INFO:	Total # of broken channels: 0
10:30:33:ST3_smx:INFO:	List of broken channels: []
10:30:33:ST3_smx:INFO:	Total # of broken channels: 3
10:30:33:ST3_smx:INFO:	List of broken channels: [2, 19, 21]
10:30:35:ST3_smx:INFO:	chip: 14-7 	 59.984250 C 	 1070.303835 mV
10:30:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:30:35:ST3_smx:INFO:		Electrons
10:30:35:ST3_smx:INFO:	# loops 0
10:30:37:ST3_smx:INFO:	# loops 1
10:30:38:ST3_smx:INFO:	# loops 2
10:30:40:ST3_smx:INFO:	# loops 3
10:30:41:ST3_smx:INFO:	# loops 4
10:30:43:ST3_smx:INFO:	Total # of broken channels: 0
10:30:43:ST3_smx:INFO:	List of broken channels: []
10:30:43:ST3_smx:INFO:	Total # of broken channels: 0
10:30:43:ST3_smx:INFO:	List of broken channels: []
10:30:43:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:30:43:febtest:INFO:	01-00 | XA-000-08-002-003-006-160-14 |  18.7 | 1224.5
10:30:44:febtest:INFO:	08-01 | XA-000-08-002-003-006-163-14 |  40.9 | 1153.7
10:30:44:febtest:INFO:	03-02 | XA-000-08-002-000-008-202-13 |  34.6 | 1171.5
10:30:44:febtest:INFO:	10-03 | XA-000-08-002-003-006-162-14 |  40.9 | 1147.8
10:30:44:febtest:INFO:	05-04 | XA-000-08-002-003-006-159-07 |  28.2 | 1201.0
10:30:45:febtest:INFO:	12-05 | XA-073-08-002-003-007-021-08 |  63.2 | 1094.2
10:30:45:febtest:INFO:	07-06 | XA-000-08-002-003-006-156-07 |  37.7 | 1165.6
10:30:45:febtest:INFO:	14-07 | XA-074-08-002-003-007-021-12 |  63.2 | 1088.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_23-10_28_31
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1229| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 27173 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M8UL2B1010221A2
LADDER_NAME: L8UL201022
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5770', '1.849', '2.0670', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0730', '1.850', '2.4130', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0090', '1.850', '0.5309', '0.000', '0.0000', '0.000', '0.0000']
10:30:47:ST3_Shared:INFO:	Listo of operators:Olga B.; Oleksandr S.; 
10:30:48:ST3_Shared:INFO:	Listo of operators:Olga B.;